CN101529790B - 串行数字数据通信接口 - Google Patents
串行数字数据通信接口 Download PDFInfo
- Publication number
- CN101529790B CN101529790B CN200780039238.3A CN200780039238A CN101529790B CN 101529790 B CN101529790 B CN 101529790B CN 200780039238 A CN200780039238 A CN 200780039238A CN 101529790 B CN101529790 B CN 101529790B
- Authority
- CN
- China
- Prior art keywords
- data
- clock
- signal
- bit
- frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/10—Arrangements for initial synchronisation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
- H04L7/042—Detectors therefor, e.g. correlators, state machines
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
- H04L7/046—Speed or phase control by synchronisation signals using special codes as synchronising signal using a dotting sequence
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Dc Digital Transmission (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US84617706P | 2006-09-21 | 2006-09-21 | |
| US60/846,177 | 2006-09-21 | ||
| PCT/US2007/020526 WO2008036413A1 (en) | 2006-09-21 | 2007-09-21 | Serial digital data communication interface |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101529790A CN101529790A (zh) | 2009-09-09 |
| CN101529790B true CN101529790B (zh) | 2015-05-20 |
Family
ID=39092977
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200780039238.3A Expired - Fee Related CN101529790B (zh) | 2006-09-21 | 2007-09-21 | 串行数字数据通信接口 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US8027421B2 (enExample) |
| EP (1) | EP2064828B1 (enExample) |
| JP (1) | JP5325107B2 (enExample) |
| CN (1) | CN101529790B (enExample) |
| WO (1) | WO2008036413A1 (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7890684B2 (en) * | 2006-08-31 | 2011-02-15 | Standard Microsystems Corporation | Two-cycle return path clocking |
| EP2341445B1 (en) * | 2009-12-30 | 2017-09-06 | Intel Deutschland GmbH | Method for high speed data transfer |
| US9712206B2 (en) * | 2010-12-27 | 2017-07-18 | Microchip Technology Incorporated | Preamble design and processing method for on-the-fly, frame-by-frame air data rate detection in wireless receivers |
| US8984197B2 (en) * | 2012-12-11 | 2015-03-17 | Agileswitch, Llc | Power stack control systems |
| JP6201331B2 (ja) * | 2013-02-15 | 2017-09-27 | オムロン株式会社 | 同期シリアルインタフェース回路 |
| US9037893B2 (en) * | 2013-03-15 | 2015-05-19 | Analog Devices, Inc. | Synchronizing data transfer from a core to a physical interface |
| US10386214B2 (en) | 2015-11-30 | 2019-08-20 | Analog Devices Global | Electromagnetic flow sensor interface allowing dc coupling |
| JP7070496B2 (ja) * | 2019-04-24 | 2022-05-18 | オムロン株式会社 | シリアルデータ通信装置 |
| CN112019318B (zh) * | 2020-08-20 | 2021-08-20 | 珠海格力电器股份有限公司 | 提高设备通信可靠性的方法 |
| CN113886300B (zh) * | 2021-09-23 | 2024-05-03 | 珠海一微半导体股份有限公司 | 一种总线接口的时钟数据自适应恢复系统及芯片 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0738057A2 (de) * | 1995-04-12 | 1996-10-16 | Siemens Aktiengesellschaft | Verfahren und Anordnung zur Bitsynchronisation |
| EP1434382A1 (en) * | 2001-10-02 | 2004-06-30 | Hitachi, Ltd. | Serial data transferring apparatus |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53119604A (en) * | 1977-03-28 | 1978-10-19 | Toshiba Corp | Transmission system for control signal of key telephone set |
| JPS6376640A (ja) * | 1986-09-19 | 1988-04-06 | Nec Corp | 調歩同期信号受信回路 |
| US4965884A (en) * | 1989-11-22 | 1990-10-23 | Northern Telecom Limited | Data alignment method and apparatus |
| US5727004A (en) | 1995-03-14 | 1998-03-10 | Adaptive Networks, Inc. | Method and apparatus for data encoding and communication over noisy media |
| JP2821438B2 (ja) * | 1996-08-14 | 1998-11-05 | 静岡日本電気株式会社 | マイクロコンピュータ |
| DE69612750T2 (de) | 1996-11-08 | 2002-02-28 | Alcatel, Paris | Datenübertragungssynchronisierungsverfahren zwischen einem Sender und einem Empfänger |
| JP2000174736A (ja) * | 1998-12-08 | 2000-06-23 | Sharp Corp | ビット同期回路 |
| US20020138540A1 (en) * | 2000-06-02 | 2002-09-26 | Enam Syed K. | Multiplier circuit |
| US7158592B2 (en) | 2000-10-31 | 2007-01-02 | Agere Systems, Inc. | Method and apparatus for synchronizing data transfer |
| US6892314B2 (en) | 2001-04-02 | 2005-05-10 | International Business Machines Corporation | Method and system of automatic delay detection and receiver adjustment for synchronous bus interface |
| KR100441606B1 (ko) * | 2001-10-05 | 2004-07-23 | 삼성전자주식회사 | 복수의 모듈들간의 데이터 송수신 시스템 및 송수신제어방법 |
| JP2003134098A (ja) * | 2001-10-24 | 2003-05-09 | Matsushita Electric Ind Co Ltd | シリアル受信装置 |
| US7317489B2 (en) * | 2004-01-09 | 2008-01-08 | Analog Devices, Inc | Teletext data detection by data content based synchronization and error reduction |
| KR100608362B1 (ko) * | 2004-04-22 | 2006-08-08 | 주식회사 하이닉스반도체 | 펄스 발생기 |
| US7890684B2 (en) * | 2006-08-31 | 2011-02-15 | Standard Microsystems Corporation | Two-cycle return path clocking |
-
2007
- 2007-09-21 EP EP07852423A patent/EP2064828B1/en not_active Not-in-force
- 2007-09-21 JP JP2009529261A patent/JP5325107B2/ja active Active
- 2007-09-21 WO PCT/US2007/020526 patent/WO2008036413A1/en not_active Ceased
- 2007-09-21 CN CN200780039238.3A patent/CN101529790B/zh not_active Expired - Fee Related
- 2007-09-21 US US11/903,529 patent/US8027421B2/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0738057A2 (de) * | 1995-04-12 | 1996-10-16 | Siemens Aktiengesellschaft | Verfahren und Anordnung zur Bitsynchronisation |
| EP1434382A1 (en) * | 2001-10-02 | 2004-06-30 | Hitachi, Ltd. | Serial data transferring apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2010504698A (ja) | 2010-02-12 |
| CN101529790A (zh) | 2009-09-09 |
| WO2008036413A1 (en) | 2008-03-27 |
| US8027421B2 (en) | 2011-09-27 |
| JP5325107B2 (ja) | 2013-10-23 |
| EP2064828A1 (en) | 2009-06-03 |
| US20080123790A1 (en) | 2008-05-29 |
| EP2064828B1 (en) | 2012-04-18 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150520 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |