CN101390045B - 用具可选次精度的浮点处理器执行浮点运算的方法和装置 - Google Patents
用具可选次精度的浮点处理器执行浮点运算的方法和装置 Download PDFInfo
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- CN101390045B CN101390045B CN2007800064904A CN200780006490A CN101390045B CN 101390045 B CN101390045 B CN 101390045B CN 2007800064904 A CN2007800064904 A CN 2007800064904A CN 200780006490 A CN200780006490 A CN 200780006490A CN 101390045 B CN101390045 B CN 101390045B
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49942—Significance control
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/3001—Arithmetic instructions
- G06F9/30014—Arithmetic instructions with variable precision
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30105—Register structure
- G06F9/30112—Register structure comprising data of variable length
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
- G06F9/30185—Instruction operation extension or modification according to one or more bits in the instruction, e.g. prefix, sub-opcode
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Computing Systems (AREA)
- Computational Mathematics (AREA)
- Software Systems (AREA)
- Nonlinear Science (AREA)
- Computer Hardware Design (AREA)
- Advance Control (AREA)
- Power Sources (AREA)
- Complex Calculations (AREA)
- Measurement And Recording Of Electrical Phenomena And Electrical Characteristics Of The Living Body (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/363,118 US8595279B2 (en) | 2006-02-27 | 2006-02-27 | Floating-point processor with reduced power requirements for selectable subprecision |
| US11/363,118 | 2006-02-27 | ||
| PCT/US2007/062908 WO2007101216A2 (en) | 2006-02-27 | 2007-02-27 | Floating-point processor with reduced power requirements for selectable subprecision |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101390045A CN101390045A (zh) | 2009-03-18 |
| CN101390045B true CN101390045B (zh) | 2011-12-21 |
Family
ID=38445306
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2007800064904A Active CN101390045B (zh) | 2006-02-27 | 2007-02-27 | 用具可选次精度的浮点处理器执行浮点运算的方法和装置 |
Country Status (10)
| Country | Link |
|---|---|
| US (1) | US8595279B2 (enExample) |
| EP (1) | EP1989614A2 (enExample) |
| JP (4) | JP5113089B2 (enExample) |
| KR (1) | KR100994862B1 (enExample) |
| CN (1) | CN101390045B (enExample) |
| BR (1) | BRPI0708284A2 (enExample) |
| CA (1) | CA2641334C (enExample) |
| MX (1) | MX2008010873A (enExample) |
| RU (1) | RU2412462C2 (enExample) |
| WO (1) | WO2007101216A2 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104750456A (zh) * | 2013-12-30 | 2015-07-01 | 三星电子株式会社 | 用于浮点到整数变换的舍入注入方案 |
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| CN109086815B (zh) * | 2018-07-24 | 2021-08-31 | 中国人民解放军国防科技大学 | 基于fpga的决策树模型中的浮点数离散化方法 |
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| US20050066205A1 (en) * | 2003-09-18 | 2005-03-24 | Bruce Holmer | High quality and high performance three-dimensional graphics architecture for portable handheld devices |
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-
2006
- 2006-02-27 US US11/363,118 patent/US8595279B2/en active Active
-
2007
- 2007-02-27 EP EP07757578A patent/EP1989614A2/en not_active Ceased
- 2007-02-27 WO PCT/US2007/062908 patent/WO2007101216A2/en not_active Ceased
- 2007-02-27 CA CA2641334A patent/CA2641334C/en active Active
- 2007-02-27 RU RU2008138564/08A patent/RU2412462C2/ru active
- 2007-02-27 CN CN2007800064904A patent/CN101390045B/zh active Active
- 2007-02-27 MX MX2008010873A patent/MX2008010873A/es active IP Right Grant
- 2007-02-27 JP JP2008557471A patent/JP5113089B2/ja not_active Expired - Fee Related
- 2007-02-27 KR KR1020087023592A patent/KR100994862B1/ko not_active Expired - Fee Related
- 2007-02-27 BR BRPI0708284-3A patent/BRPI0708284A2/pt not_active Application Discontinuation
-
2012
- 2012-06-07 JP JP2012130000A patent/JP2012230684A/ja not_active Withdrawn
-
2014
- 2014-12-19 JP JP2014258023A patent/JP2015133111A/ja not_active Withdrawn
-
2016
- 2016-10-21 JP JP2016206781A patent/JP6495220B2/ja active Active
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US20050066205A1 (en) * | 2003-09-18 | 2005-03-24 | Bruce Holmer | High quality and high performance three-dimensional graphics architecture for portable handheld devices |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104750456A (zh) * | 2013-12-30 | 2015-07-01 | 三星电子株式会社 | 用于浮点到整数变换的舍入注入方案 |
| CN104750456B (zh) * | 2013-12-30 | 2018-06-19 | 三星电子株式会社 | 用于浮点到整数变换的舍入注入方案 |
Also Published As
| Publication number | Publication date |
|---|---|
| CA2641334C (en) | 2015-07-21 |
| MX2008010873A (es) | 2008-09-04 |
| US8595279B2 (en) | 2013-11-26 |
| CN101390045A (zh) | 2009-03-18 |
| US20070203967A1 (en) | 2007-08-30 |
| KR20080098440A (ko) | 2008-11-07 |
| EP1989614A2 (en) | 2008-11-12 |
| CA2641334A1 (en) | 2007-09-07 |
| WO2007101216A2 (en) | 2007-09-07 |
| JP2017062804A (ja) | 2017-03-30 |
| JP5113089B2 (ja) | 2013-01-09 |
| RU2008138564A (ru) | 2010-04-10 |
| BRPI0708284A2 (pt) | 2011-05-24 |
| WO2007101216A3 (en) | 2008-01-03 |
| RU2412462C2 (ru) | 2011-02-20 |
| KR100994862B1 (ko) | 2010-11-16 |
| JP2012230684A (ja) | 2012-11-22 |
| JP2009528638A (ja) | 2009-08-06 |
| JP6495220B2 (ja) | 2019-04-03 |
| JP2015133111A (ja) | 2015-07-23 |
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