AU2002246904A1 - Method and apparatus for reducing power consuption in a digital processor - Google Patents

Method and apparatus for reducing power consuption in a digital processor

Info

Publication number
AU2002246904A1
AU2002246904A1 AU2002246904A AU2002246904A AU2002246904A1 AU 2002246904 A1 AU2002246904 A1 AU 2002246904A1 AU 2002246904 A AU2002246904 A AU 2002246904A AU 2002246904 A AU2002246904 A AU 2002246904A AU 2002246904 A1 AU2002246904 A1 AU 2002246904A1
Authority
AU
Australia
Prior art keywords
reducing power
digital processor
consuption
power consuption
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002246904A
Inventor
Daniel Hansson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ARC International UK Ltd
Original Assignee
ARC International UK Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ARC International UK Ltd filed Critical ARC International UK Ltd
Publication of AU2002246904A1 publication Critical patent/AU2002246904A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30083—Power or thermal control instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3228—Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3237—Power saving characterised by the action undertaken by disabling clock generation or distribution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3243—Power saving in microcontroller unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/30156—Special purpose encoding of instructions, e.g. Gray coding
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline, look ahead using instruction pipelines
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
AU2002246904A 2000-10-27 2001-10-25 Method and apparatus for reducing power consuption in a digital processor Abandoned AU2002246904A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US24407100P 2000-10-27 2000-10-27
US60/244,071 2000-10-27
PCT/US2001/051064 WO2002057893A2 (en) 2000-10-27 2001-10-25 Method and apparatus for reducing power consuption in a digital processor

Publications (1)

Publication Number Publication Date
AU2002246904A1 true AU2002246904A1 (en) 2002-07-30

Family

ID=22921254

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002246904A Abandoned AU2002246904A1 (en) 2000-10-27 2001-10-25 Method and apparatus for reducing power consuption in a digital processor

Country Status (2)

Country Link
AU (1) AU2002246904A1 (en)
WO (1) WO2002057893A2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006509291A (en) * 2002-12-04 2006-03-16 コーニンクレッカ　フィリップス　エレクトロニクス　エヌ　ヴィ Software-based control of microprocessor power consumption
US20060200651A1 (en) * 2005-03-03 2006-09-07 Collopy Thomas K Method and apparatus for power reduction utilizing heterogeneously-multi-pipelined processor
US8595279B2 (en) 2006-02-27 2013-11-26 Qualcomm Incorporated Floating-point processor with reduced power requirements for selectable subprecision
WO2008009366A1 (en) * 2006-07-21 2008-01-24 Sony Service Centre (Europe) N.V. System having plurality of hardware blocks and method of operating the same
US8918446B2 (en) 2010-12-14 2014-12-23 Intel Corporation Reducing power consumption in multi-precision floating point multipliers

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5485625A (en) * 1992-06-29 1996-01-16 Ford Motor Company Method and apparatus for monitoring external events during a microprocessor's sleep mode
JPH06332693A (en) * 1993-05-27 1994-12-02 Hitachi Ltd Issuing system of suspending instruction with time-out function
US5584031A (en) * 1993-11-09 1996-12-10 Motorola Inc. System and method for executing a low power delay instruction
GB9419246D0 (en) * 1994-09-23 1994-11-09 Cambridge Consultants Data processing circuits and interfaces
US5774709A (en) * 1995-12-06 1998-06-30 Lsi Logic Corporation Enhanced branch delay slot handling with single exception program counter
JP2001282548A (en) * 2000-03-29 2001-10-12 Matsushita Electric Ind Co Ltd Communication equipment and communication method

Also Published As

Publication number Publication date
WO2002057893A2 (en) 2002-07-25
WO2002057893A3 (en) 2003-05-30

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase