CN101383333B - 半导体封装 - Google Patents

半导体封装 Download PDF

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Publication number
CN101383333B
CN101383333B CN2007101936536A CN200710193653A CN101383333B CN 101383333 B CN101383333 B CN 101383333B CN 2007101936536 A CN2007101936536 A CN 2007101936536A CN 200710193653 A CN200710193653 A CN 200710193653A CN 101383333 B CN101383333 B CN 101383333B
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pad
connection
chip
thickness
signal
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CN101383333A (zh
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陈宪伟
许仕勋
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

本发明提供一种半导体封装，包括：芯片，设置于基板上；多个焊线，每一焊线连接基板上的接垫与芯片上的焊垫。多个焊线包括：信号线，连接基板上的信号接垫与芯片上的信号焊垫，信号线具有第一厚度；接地线，连接基板上的接地接垫与芯片上的接地焊垫，接地线具有第二厚度；以及电源线，连接基板上的电源接垫与芯片上的电源焊垫，电源线具有第二厚度；其中第二厚度大于第一厚度，其中该信号接垫沿着该芯片的周围设置，且该接地接垫与该电源接垫沿着该信号接垫的周围与其异行交错设置。本发明能够在固定的面积提供更多数量的I/O垫，从而在不牺牲元件电特性与功能为前提下，提供更紧密的封装体。

Description

半导体封装
技术领域
本发明有关于半导体封装及其制作方法。 
背景技术
集成电路(IC，Integrated Circuit)芯片上的集成电路通过输入/输出(I/O，Input/Output)垫耦接至外界。IC芯片必须先组装成封装体再耦接至外部装置作各种应用。随着半导体产业的持续进步，对集成度与尺寸缩小化的要求也越来越高。为了制作出更小的IC芯片，芯片的封装体也必须配合缩小。然而，随着IC芯片的复杂度提高，I/O垫的数量也跟着增加。IC芯片的每一个I/O垫必须连接到封装体上的一个导电接点以耦接至其它元件、接地、电源、或提供/接收电子信号。因此，如何在更小的区域加入更多的I/O垫便成为业界共同的挑战。 
为了达到上述目的，目前的先进工艺是朝向更小的I/O垫与更窄的I/O垫距离(pitch)来改善，但改善的成效却受限于焊线本身的尺寸。金是一种常用的焊线材料。如果将传统的粗焊线应用在太窄的I/O垫距离，相邻的焊线将容易短路而无法作用。反之，太细的焊线将导致性能不佳，例如造成电阻上升。 
因此，业界亟需针对焊垫的排列方式进行改善，以在固定的面积提供更多数量的I/O垫，在不牺牲元件电特性与功能为前提下，提供更紧密的封装体。 
发明内容
鉴于上述现有技术的不足，提出本发明。 
本发明提供一种半导体封装，包括：芯片，设置于基板上；多个焊线，每一焊线连接该基板上的接垫与该芯片上的焊垫，该多个焊线包括：信号线，连接该基板上的信号接垫与该芯片上的信号焊垫，该信号线具有第一厚度；接地线，连接该基板上的接地接垫与该芯片上的接地焊垫，该接地线具有第二厚度；以及一电源线，连接该基板上的电源接垫与该芯片上的电源焊垫，该电源线具有第二厚度；其中该第二厚度大于该第一厚度。 
如上所述的半导体封装，其中该第二厚度至少为该第一厚度的1.1倍。 
如上所述的半导体封装，其中该芯片设置于该基板内，该信号接垫沿着该芯片的周围设置，且该接地接垫与该电源接垫沿着该信号接垫的周围与其异行交错设置。 
如上所述的半导体封装，其中该第一厚度不大于约0.6mil，且该第二厚度不小于约0.8mil。 
如上所述的半导体封装，其中至少部分该接地线与该电源线重叠该信号线。 
如上所述的半导体封装，其中该接地焊垫与该电源焊垫具有第一距离，该信号焊垫具有第二距离，且该第一距离大于第二距离。 
本发明还提供另一种半导体封装，包括：芯片，设置于基板上；多个焊线，每一焊线连接该基板上的接垫与该芯片上的焊垫，该多个焊线包括：信号线，连接该基板上的信号接垫与该芯片上的信号焊垫，该信号线具有第一厚度且该信号接垫具有第一距离；接地线，连接该基板上的接地接垫与该芯片上的接地焊垫，该接地线具有第二厚度；以及电源线，连接该基板上的电源接垫与该芯片上的电源焊垫，该电源线具有第二厚度；其中该第二厚度大于该第一厚度，该接地接垫与该电源接垫具有大于第一距离的第二距离，该接地接垫与该电源接垫排列成第一排，与排列成第二排的该信号接垫异行交错设置，其中第二排介于第一排与该芯片的周边。 
如上所述的半导体封装，其中该芯片设置于该基板的内部，该信号接垫沿着该芯片的周围设置，且该接地接垫与该电源接垫在该基板上沿着该信号接垫的周围设置。 
本发明还提供又一种半导体封装，包括：芯片设置于至少两个封装基板上，包括内封装基板与外封装基板：多个焊线，每一焊线连接该芯片上的焊垫与对应的接垫，该多个焊线包括：信号线，连接信号接垫与该芯片上的信号焊垫，该信号线具有第一厚度；接地线，连接接地接垫与该芯片上的接地焊垫，该接地线具有第二厚度；以及电源线，连接电源接垫与该芯片上的电源焊垫，该电源线具有第二厚度；其中该第二厚度大于该第一厚度，该信号接垫、该接地接垫、该电源接垫设置于所述封装基板其中之一。该信号接垫沿着该芯片的周围设置，且该接地接垫与该电源接垫沿着该信号接垫的周围与其异行交错设置。 
如上所述的半导体封装，其中该内封装基板设置于该外封装基板上，且该信号接垫设置于该内封装基板上，而该电源接垫与该接地接垫设置于该外封装基板上。 
本发明能够在固定的面积提供更多数量的I/O垫，从而在不牺牲元件电特性与功能为前提下，提供更紧密的封装体。 
为让本发明的上述和其它目的、特征、和优点能更明显易懂，下文特举出优选实施例，并配合所附附图，作详细说明如下。 
附图说明
图1为剖面图，用以显示本发明实施例的各种焊线。 
图2为俯视图，用以显示本发明实施例中各种焊线的连接。 
图3为俯视图，用以显示本发明另一实施例中各种焊线的连接。 
图4为俯视图，用以显示本发明实施例中以交错方式排列的焊垫。 
图5为剖面图，用以显示本发明另一实施例的各种焊线。 
图6为俯视图，用以显示图5的实施例中各种焊线的连接。 
其中，附图标记说明如下： 
1～封装基板                 3～IC芯片 
5～电源/接地接垫            15～信号接垫 
7～电源/接地线焊垫          17～信号焊垫 
21～周边                    25、27～厚度 
33、37～距离                41、43～排 
47、49～距离                51、53～间距 
57～内排                    59～周边排 
101～内封装基板             105～外封装基板 
111、113～最小距离 
具体实施方式
本发明是关于设置于半导体封装体上或封装体中的IC芯片。IC芯片上的焊垫(bond pads)通过焊线(bond wires)与封装基板上的接垫(contact pads)作电连接与物理连接。焊线可由相同或不同材料构成，且可具有不同的厚度。半导体封装体可包含一个或多个封装基板，在某些实施例中这些封装基板可以互相堆叠。 
请参照图1，在该实施例中IC芯片3是设置在封装基板1的中央，但也可以设置在封装基板1的其它位置。在其它实施例中IC芯片3也可设置在封装基板1中的凹陷。IC芯片3包含集成电路或半导体装置以执行各种功能。 
IC芯片3包含多个焊垫以作为IC芯片3上集成电路或半导体装置的输出/输入。在该实施例中这些焊垫包含电源/接地焊垫7与信号焊垫17，其材质可为铝、金、各种金属合金、或其它半导体业界所用的适当导体。这些焊垫通常是设置在IC芯片3的周边(请参见图2至图6)，但也可能设置在其它任何位置。在图2至图6所示的实施例中，这些焊垫是设置成靠近IC芯片3周边的一排或多排，且大致与周边平行。半导体装置的输入/输出连接到电源、接地、与信号线。将IC芯片3的焊垫连接到封装基板1的焊线包括信号线9与电源/接地线11。电源/接地线11的厚度25大于信号线9的厚度27。电源/接地线11将IC芯片3的电源/接地焊垫7经由封装基板1的电源/接地接垫5连接到电源或接地。简而言之，电源/接地接垫5为连接至电源或接地的接垫。信号线9将IC芯片3的信号焊垫17经由封装基板1的信号接垫15连接至电子信号。简而言之，封装基板1的信号接垫15经由信号线9接收及/或传送信号至IC芯片3。 
信号线9与电源/接地线11可由相同或不同材料构成，例如金、铝、铝铜合金、铜、或其它金属合金、或其它信号传递媒介。信号线9与电源/接地线11皆可视为焊线。在实施例中，电源/接地线11的厚度25约为信号线9的厚度27的1.1倍至4倍。举例而言，信号线9的厚度27较细，不大于0.5或0.6mil，例如约0.4mil。电源/接地线11的厚度25较厚，约0.8mil或更厚。电源/接地线11与信号线9的关系可用I/O线数量的比例来表示，在实施例中电源/接地线11传送的功率为100瓦，每一信号线9传送的功率为25瓦，则信号线/电源/接地线的比例为4∶1∶1。在此例中，4个信号线所带的功率相当于1个电源线与1个接地线的功率。电源/接地线11必须适当地大于对应的信号线9。在图中所示的实施例中，较厚的电源/接地线11与较细的信 号线9重叠。 
图2至图3显示连接接垫5、15与焊垫7、17的各种排列方式。在图2中，电源/接地焊垫7与信号焊垫17沿着IC芯片3的周边21排成单排，接垫5、15沿着周边21的外侧排成单排，焊线之间互不重叠。电源/接地线焊垫7的距离(pitch)大于信号焊垫17的距离，电源/接地接垫5的距离大于信号接垫15的距离。 
图3显示半导体封装另一实施例的排列方式，其中IC芯片3设置于封装基板1的中央。电源/接地接垫5与信号接垫15沿着IC芯片3的周边外侧排成数排，其中信号接垫15设置于41排，电源/接地接垫5设置于43排，位于41排的外围。如此一来，信号接垫15沿着IC芯片3的周围设置，而电源/接地接垫5则沿着信号接垫15的周围设置。电源/接地线11与信号线9在许多位置重叠。电源/接地接垫5的距离33大于信号接垫15的距离37。图3亦显示电源/接地线焊垫7与信号焊垫17是以交错方式排列，此特征在图4可清楚看出。 
请再次参阅图2，电源/接地线焊垫7的距离49大于信号焊垫17的距离47。在实施例中，距离47不大于约50微米且距离49不小于约40微米。在大部分的实施例中，相邻信号焊垫17的间距(spacing)51一般小于相邻电源/接地线焊垫7的间距53。相邻信号焊垫17的间距51大约为35微米或更小，例如约9微米。相邻电源/接地线焊垫7的间距53大约为6微米或更大，例如约44微米。应注意的是，此处的数值仅为举例说明之用。 
图4显示电源/接地线焊垫7设置于内排57，信号焊垫17设置于靠近IC芯片3周边21的周边排59。由图中可看出，内排57的电源/接地线焊垫7与周边排59的信号焊垫17是以交错方式排列。应注意的是，图4的排列方式仅为举例说明之用。 
图5与图6显示本发明的其它实施例。在该实施例中，IC芯片3设置在堆叠的封装基板上。堆叠的封装基板包括内封装基板101与外(或周边)封装基板105。在该实施例中，IC芯片3设在内封装基板101与外封装基板105的中央，但在其它实施例中IC芯片3也可设置在其它位置。IC芯片3包含电源/接地线焊垫7与信号焊垫17，如前文所述。虽然在附图中电源/接地线焊垫7是设在内排，而信号焊垫17是设在周边排，但在其它实施例中也可 使用其它的排列方式。 
电源/接地线11与信号线9同前文所述。在本实施例中，电源/接地接垫5是设在外封装基板105，而信号接垫15是设在内封装基板101。如此一来，电源/接地接垫5是位于信号接垫15的外侧，且部分的电源/接地线11延伸过(重叠)信号线9。在其它实施例中，IC芯片3可以各种方式设置在一个或多个封装基板以构成半导体封装。内封装基板101上信号接垫15的最小距离(minimum pitch)111小于外封装基板105上电源/接地接垫5的最小距离113。在实施例中，信号接垫15的最小距离111约35微米，电源/接地接垫5的最小距离113约80微米。同样地，此处的数值也仅是举例说明之用。 
上述公开的实施例并非用以限制本发明，本领域技术人员在不脱离本发明的精神和范围内，当可作任意的变更与修饰。举例而言，信号焊垫17与电源/接地线焊垫7可用不同的排列方式设置在IC芯片3上。例如，两者可设置在同一排(如图2)或不同排(如图3-图6)。此原则亦适用于电源/接地接垫5与信号接垫15。例如，在前述实施例中，电源/接地接垫5与信号接垫15是以大致跟周边21等距的方式排列(如图2)，或者电源/接地接垫5是设置在信号接垫15的周边，然而在其它实施例中，信号接垫15亦可设置在一排至少含有部分电源/接地接垫5的周边。在其它有关堆叠封装基板的实施例中，内封装基板101可同时包含电源/接地接垫5与信号接垫15及/或外封装基板105可同时包含电源/接地接垫5与信号接垫15。由此可知，前述的实施例只是用来举例说明而已，不应就此限定本发明的各种排列方式。 
此外，所有的举例与条件都仅是用来帮助了解本发明的精神而非用来限定本发明的范围。因此，所有关于本发明特征、原则、实施例等描述都包含了结构上与功能上的等效变型，且该等效变型可为目前已知的等效变型或未来发展出的等效变型，例如可执行同样功能的任何元件，无论结构上相同与否。 
实施例中配合附图说明所提到的相对用语，例如“较低”、“较高”、“水平”、“垂直”、“上”、“下”、“顶部”、“底部”等，只是为了方便讨论图中所呈现的方位，并不代表该装置必须以特定方位设置或操作。除非特别说明，否则实施例中所提到连接或耦接的用语，例如“连接”或“内连接”代表结构之间以直接或间接方式彼此固定、或者以可移动的方 式连接。 
虽然本发明已以多个优选实施例公开如上，然其并非用以限定本发明，本领域技术人员在不脱离本发明的精神和范围内，当可作任意的变更与修饰，因此本发明的保护范围当视所附的权利要求书所界定的范围为准。 

Claims (6)

1.一种半导体封装结构，包括：
芯片，设置于基板上；
多个焊线，每一焊线连接该基板上的接垫与该芯片上的焊垫，该多个焊线包括：
信号线，连接该基板上的信号接垫与该芯片上的信号焊垫，该信号线具有第一厚度；
接地线，连接该基板上的接地接垫与该芯片上的接地焊垫，该接地线具有第二厚度；以及
电源线，连接该基板上的电源接垫与该芯片上的电源焊垫，该电源线具有该第二厚度；
其中该第二厚度大于该第一厚度，
其中该信号接垫沿着该芯片的周围设置，且该接地接垫与该电源接垫沿着该信号接垫的外侧周围与其在同一水平上异行交错设置。
2.如权利要求1所述的半导体封装结构，其中该第二厚度至少为该第一厚度的1.1倍。
3.如权利要求1所述的半导体封装结构，其中该第一厚度不大于0.6mil，且该第二厚度不小于0.8mil。
4.如权利要求1所述的半导体封装结构，其中至少部分该接地线与该电源线重叠该信号线。
5.如权利要求1所述的半导体封装结构，其中该接地焊垫与该电源焊垫具有第一距离，该信号焊垫具有第二距离，且该第一距离大于第二距离。
6.一种半导体封装结构，包括：
芯片，设置于基板上且位于其内部；
多个焊线，每一焊线连接该基板上的接垫与该芯片上的焊垫，该多个焊线包括：
多个信号线，连接该基板上的多个分离的信号接垫与该芯片上的多个分离的信号焊垫，该多个信号线具有第一厚度且该信号接垫具有第一距离；
多个接地线，连接该基板上的多个分离的接地接垫与该芯片上的多个分离的接地焊垫，该多个接地线具有第二厚度；以及
多个电源线，连接该基板上的多个分离的电源接垫与该芯片上的多个分离的电源焊垫，该多个电源线具有该第二厚度；
其中该第二厚度大于该第一厚度，该多个接地接垫与该多个电源接垫具有大于该第一距离的第二距离，该多个接地接垫与该多个电源接垫沿着该多个信号接垫的外侧周围排列成第一排，与沿着该芯片的周围排列成第二排的该多个信号接垫在同一水平上异行交错设置。
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