CN101295638A - Extension method of material for low forward voltage drop Schottky diode - Google Patents
Extension method of material for low forward voltage drop Schottky diode Download PDFInfo
- Publication number
- CN101295638A CN101295638A CNA2008100550792A CN200810055079A CN101295638A CN 101295638 A CN101295638 A CN 101295638A CN A2008100550792 A CNA2008100550792 A CN A2008100550792A CN 200810055079 A CN200810055079 A CN 200810055079A CN 101295638 A CN101295638 A CN 101295638A
- Authority
- CN
- China
- Prior art keywords
- minute
- liter
- hydrogen
- gas
- degree
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Abstract
The invention discloses an extension method for a material used for a lower positive pressure reduction schottky diode. The invention controls and optimizes the temperature rising time of each step by adjusting the program of temperature rising and the careful cooperation of hydrogen flux to lead the impurities of a wafer from an underlay to be expanded outwards during a heat treatment process and finally lead the transition area of a silicon epitaxial wafer to reach the range of 1.2 to 1.3 micron by expelling the air by hydrogen. The resistance rate uniformity in the wafer is less than 3 percent by adopting the method of the invention, thereby leading the transition area of the wafer to be controlled between 1.0 and 1.3 micron and leading the resistance rate uniformity in a furnace to be less than 5 percent; besides, the repetitiveness and the reproducibility of the resistance rate and the thickness between furnaces are good; the repetitiveness in the furnace and the transition area of the wafer is good; the uniformity and the consistency of the positive pressure reduction and negative pressure reduction of the schottky diode manufactured by the material are good.
Description
Technical field
The present invention relates to the epitaxy method of a kind of Schottky diode, especially a kind of epitaxy method of material for low forward voltage drop Schottky diode with material.
Background technology
For diode, its power consumption depends on diode current And if forward voltage drop Vf, because If is predetermined by application, the power consumption that therefore wants to reduce diode can only try every possible means to reduce forward voltage drop (VF).For the Schottky rectifier diode, forward voltage drop Vf depends on metal barrier and the active region that diode uses.Active region mainly comes from the epitaxial loayer of Schottky diode institute materials used, under common process, the normal growth transition region is generally greater than 1.3 microns, resistivity evenness is greater than 7% in the sheet, resistivity evenness in the stove＞10%, and GRR is poor between stove and the stove, use this made Schottky diode, when reverse breakdown voltage meets the demands, because transition region is longer, therefore corresponding extension effective thickness reduces, and therefore needs bigger extension gross thickness, and causes too high forward voltage drop.Therefore how regulating the transition region of epitaxial loayer and the uniformity in the sheet makes whole epitaxial wafer when all satisfying reverse breakdown voltage and to obtain low forward voltage drop be the problem of present Schottky with the research of material epitaxy needs.
Summary of the invention
The technical issues that need to address of the present invention provide a kind of epitaxy method of material for low forward voltage drop Schottky diode, this method makes material therefor delay transition region outward and is controlled between the 1.2-1.3 micron, resistivity evenness is better in the sheet, thereby makes the epitaxial material that obtains obtain the forward voltage drop lower than common process when satisfying the Schottky reverse breakdown voltage.
For addressing the above problem, the technical solution used in the present invention is: a kind of epitaxy method of material for low forward voltage drop Schottky diode, and this method may further comprise the steps:
1, a kind of epitaxy method of material for low forward voltage drop Schottky diode is characterized in that, this method may further comprise the steps:
1) substrate is put into reative cell, catch up with gas with nitrogen earlier, catch up with nitrogen with big flow hydrogen again;
2) hydrogen flowing quantity is turned down the 60--150 liter/minute, reaction chamber temperature is risen to 650 degree with 3-7 branch clock time from room temperature, rose to 900 degree with 8-12 minute from 650 degree, rose to 1150 degree with 9-11 minute from 900 degree, with 4-8 minute temperature is risen to 1190 degree from 1150, with temperature from 1150 rise to 1190 spend the journey hydrogen flowing quantity increase to the 180-220 liter/minute, open HCL simultaneously and catch up with gas;
3) reative cell feeding flow is 1--5 liter/minute HCL, corrosion substrate surface 3--8 minute;
4) turn off HCl, increase hydrogen flowing quantity to the 250-350 liter/minute, caught up with gas 3--5 minute;
5) reduced temperature to the 1140--1160 degree with 3--4 minute, hydrogen flowing quantity transfers to 130--180 liter/minute catch up with gas simultaneously, when hydrogen is caught up with gas, feed flow and be the 3--10 liter/minute trichlorosilane catch up with gas;
6) with flow be the 3-10 liter/minute trichlorosilane feed reative cell, finish the growth of ground floor intrinsic layer;
7) close trichlorosilane, elevated temperature is that 130--180 liter/minute hydrogen was caught up with gas 3--5 minute with flow to the 1170-1180 degree simultaneously;
8) reduce temperature to the 1140--1160 degree, cooling with flow be simultaneously the 3--10 liter/minute trichlorosilane and doped source feed reative cell simultaneously, with the hydrogen of 130-180 liter/shunt volume, 3--10 liter/minute trichlorosilane caught up with gas 3-5 minute, catch up with doped source simultaneously;
9) be that 3--10 liter/minute trichlorosilane feeds the reative cell deposition with flow, finish required growth thickness.
10) close trichlorosilane and doped source, with the 130--180 liter/minute hydrogen caught up with gas 1-3 minute, the slowly cooling 15 minutes of logical then big flow hydrogen feeds big flow nitrogen again and caught up with gas 3 minutes.
Above-mentioned steps 1) to catch up with the gas time be 3-10 minute to nitrogen in, and it is 4-15 minute that hydrogen is caught up with the nitrogen time.
Described doped source is phosphine or arsine.
Big flow in described big flow hydrogen and the big flow nitrogen be the 300-350 liter/minute.
Adopt the beneficial effect that technique scheme produced to be:
The program that the present invention heats up by adjusting reaches the careful cooperation with hydrogen flowing quantity, the heating-up time in each step of Control and Optimization, slice, thin piece is extended out from substrate impurity in heat treatment process, add hydrogen and catch up with gas, finally make the transition region of silicon epitaxial wafer reach the scope of 1.2-1.3 micron, thereby make the epitaxial material that obtains when satisfying the Schottky reverse breakdown voltage, obtain the forward voltage drop lower than common process.
Table 1 is interior 5 resistivity of common process sheet and uniformity
Table 2 is to adopt interior 5 resistivity of technology sheet of the present invention and uniformity
Table 1
| A left side | In | Right | On | Down | On average | Maximum | Minimum | Uniformity % |
| 0.70 | 0.75 | 0.69 | 0.72 | 0.65 | 0.0725 | 0.75 | 0.65 | 7.14 |
Table 2
| A left side | In | Right | On | Down | On average | Maximum | Minimum | Uniformity % |
| 0.76 | 0.74 | 0.75 | 0.73 | 0.72 | 0.074 | 0.76 | 0.72 | 2.70 |
The uniformity %=of table 1 and table 2 (5 middle maximum-5 middle minimum values) * 100/ (5 middle maximum+5 middle minimum values), these data are the epitaxial material test data of randomly drawing, by table 1 and table 2 as can be known, the interior resistivity evenness of sheet that adopts the method for the invention is less than 3%, thereby its transition region can be controlled between the 1.0--1.3 micron, resistivity evenness is less than 5% in the stove, and resistivity and thickness GRR are good between stove and the stove, reach transition region good reproducibility in the sheet in the stove, use Schottky diode forward voltage drop low and the reverse pressure drop uniformity and the high conformity of this made.
Description of drawings
Fig. 1 is the vertical distribution map of common process spreading resistance analysis;
Fig. 2 is the vertical distribution map of process spread Resistance Analysis of the present invention.
Embodiment
Below in conjunction with experimental result the present invention is done and to describe in further detail:
1, substrate is put into reative cell, catches up with gas 3 minutes with nitrogen earlier, then closes nitrogen, uses hydrogen (the hydrogen valve is opened to maximum) to catch up with nitrogen 4 minutes again;
2, hydrogen flowing quantity is turned down the 60-150 liter/minute, as common 100 liters/minute, reaction chamber temperature is risen to 650 degree with 5 fens clock times from room temperature, rose to 900 degree with 10 minutes from 650 degree, rose to 1150 degree from 900 degree, temperature is risen to 1190 degree from 1150 degree with 6 minutes with 8 minutes, as typical 1160 degree, the processes that rise to 1190 degree from 1150 degree, hydrogen flowing quantity increased to the 180-220 liter/minute, as common 200 liters/minute feed HCl simultaneously and catch up with gas;
3,1-5 liter/shunt volume HCL is continued to feed in the back of heating up, and corrosion substrate surface 3--8 minute was as common 3 liters/shunt volume HCL corrosion surface 5 minutes;
4, turn off HCl, increase hydrogen to the 250-350 liter/minute, as common 280 liters/minute, caught up with gas 3-5 minute;
5, reduced temperature to the 1140-1160 degree with 3-4 minute, as typical 1150 degree, simultaneously hydrogen flowing quantity transfer to the 130-180 liter/minute, catch up with gas as common 150 liters/minute, feed when hydrogen is caught up with gas certain flow such as 3--10 liter/minute trichlorosilane catch up with gas, as common 6 liters/minute;
6, the logical reative cell of trichlorosilane is finished the growth of ground floor intrinsic growth, as 1.2 microns thickness,
7, close the silicon source, caught up with gas 3-5 minute with the hydrogen of 130-180 liter/shunt volume, caught up with gas 4 minutes as 150 liters of/minute common hydrogen, elevated temperature is to the 1170-1180 degree simultaneously;
8, reduce temperature to the 1140-1160 degree, as typical 1150 degree, cooling simultaneously with the hydrogen of 130-180 liter/shunt volume, 3--10 liter/minute trichlorosilane caught up with gas 3-5 minute, catch up with doped source (phosphine) simultaneously, caught up with gas 4 minutes as 150 liters of/minute common hydrogen, 6 liters/minute trichlorosilane
9. trichlorosilane is fed reative cell, finishes required growth thickness,
10, close silicon source and doped source, with the 130-180 liter/minute hydrogen caught up with gas 1-3 minute, caught up with gas 2 minutes as 150 liters of/minute common hydrogen, logical then big flow (all open by the hydrogen valve, being generally 350 liters/minute) hydrogen slowly lowered the temperature 15 minutes, big flow (valve is opened entirely) nitrogen was caught up with gas 3 minutes, growth ending.
The x axle is represented the degree of depth (DEPTH) among Fig. 1 and Fig. 2, and unit is a micron, and the y axle is represented concentration, and unit is cm-
3Curve 1 is the spreading resistance curve, curve 2 is a resistivity curve, curve 3 is a concentration curve, these two figure are the vertical distributions with varied in thickness of a concentration of epitaxial loayer, the difference that comparison diagram 1 and Fig. 2 technology of the present invention as can be seen and old technology vertically distribute, the transition region of old technology is the 1.3-1.5 micron, the transition region of this technology is the 1.2-1.3 micron.
Claims (4)
1, a kind of epitaxy method of material for low forward voltage drop Schottky diode is characterized in that, this method may further comprise the steps:
1) substrate is put into reative cell, catch up with gas with nitrogen earlier, catch up with nitrogen with big flow hydrogen again;
2) hydrogen flowing quantity is turned down the 60--150 liter/minute, reaction chamber temperature is risen to 650 degree with 3-7 branch clock time from room temperature, rose to 900 degree with 8-12 minute from 650 degree, rose to 1150 degree with 9-11 minute from 900 degree, with 4-8 minute temperature is risen to 1190 degree from 1150, with temperature from 1150 rise to 1190 spend the journey hydrogen flowing quantity increased to the 180-220 liter/minute, open HCL simultaneously and catch up with gas;
3) reative cell feeding flow is 1--5 liter/minute HCL, corrosion substrate surface 3--8 minute;
4) turn off HCl, increase hydrogen flowing quantity to the 250-350 liter/minute, caught up with gas 3--5 minute;
5) reduced temperature to the 1140--1160 degree with 3--4 minute, hydrogen flowing quantity transfers to 130--180 liter/minute catch up with gas simultaneously, when hydrogen is caught up with gas, feed flow and be the 3--10 liter/minute trichlorosilane catch up with gas;
6) with flow be the 3-10 liter/minute trichlorosilane feed reative cell, finish the growth of ground floor intrinsic layer;
7) close trichlorosilane, elevated temperature is that 130--180 liter/minute hydrogen was caught up with gas 3--5 minute with flow to the 1170-1180 degree simultaneously;
8) reduce temperature to the 1140--1160 degree, cooling with flow be simultaneously the 3--10 liter/minute trichlorosilane and doped source feed reative cell simultaneously, with the hydrogen of 130-180 liter/shunt volume, 3--10 liter/minute trichlorosilane caught up with gas 3-5 minute, catch up with doped source simultaneously;
9) with flow be the 3--10 liter/minute trichlorosilane feed the reative cell deposition, finish required growth thickness.
10) close trichlorosilane and doped source, with the 130--180 liter/minute hydrogen caught up with gas 1-3 minute, the slowly cooling 15 minutes of logical then big flow hydrogen feeds big flow nitrogen again and caught up with gas 3 minutes.
2, to catch up with the gas time be 3-10 minute to nitrogen the epitaxy method of material for low forward voltage drop Schottky diode according to claim 1, above-mentioned steps 1), and it is 4-15 minute that hydrogen is caught up with the nitrogen time.
3, the epitaxy method of material for low forward voltage drop Schottky diode according to claim 1 is characterized in that described doped source is phosphine or arsine.
4, the epitaxy method of material for low forward voltage drop Schottky diode according to claim 1, it is characterized in that big flow in described big flow hydrogen and the big flow nitrogen be the 300-350 liter/minute.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2008100550792A CN100547728C (en) | 2008-06-17 | 2008-06-17 | The epitaxy method of material for low forward voltage drop Schottky diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2008100550792A CN100547728C (en) | 2008-06-17 | 2008-06-17 | The epitaxy method of material for low forward voltage drop Schottky diode |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101295638A true CN101295638A (en) | 2008-10-29 |
| CN100547728C CN100547728C (en) | 2009-10-07 |
Family
ID=40065812
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2008100550792A Active CN100547728C (en) | 2008-06-17 | 2008-06-17 | The epitaxy method of material for low forward voltage drop Schottky diode |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100547728C (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101783289A (en) * | 2010-03-05 | 2010-07-21 | 河北普兴电子科技股份有限公司 | Preparation method of inverse epitaxial wafer |
| CN102324382A (en) * | 2011-10-20 | 2012-01-18 | 上海先进半导体制造股份有限公司 | Method for growing high-resistance N type epitaxial layer on heavily-doped P type substrate |
| CN103489761A (en) * | 2013-09-17 | 2014-01-01 | 杭州立昂微电子股份有限公司 | Growing method of special epitaxial slice for Schottky chip |
| CN103996608A (en) * | 2014-06-06 | 2014-08-20 | 上海先进半导体制造股份有限公司 | Method for improving uniformity of electrical resistivity of epitaxial layer |
| CN105575772A (en) * | 2015-12-25 | 2016-05-11 | 河北普兴电子科技股份有限公司 | Preparation method of epitaxial wafer for FRD |
| CN106876246A (en) * | 2017-02-14 | 2017-06-20 | 河北普兴电子科技股份有限公司 | The method for improving resistivity evenness in epitaxial wafer piece |
| CN111489964A (en) * | 2020-04-27 | 2020-08-04 | 中国电子科技集团公司第四十六研究所 | Preparation method of thick-layer silicon epitaxial wafer for reducing pattern drift rate |
| CN115537922A (en) * | 2022-11-29 | 2022-12-30 | 中国电子科技集团公司第四十六研究所 | Method for reducing self-doping of epitaxial wafer |
-
2008
- 2008-06-17 CN CNB2008100550792A patent/CN100547728C/en active Active
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101783289A (en) * | 2010-03-05 | 2010-07-21 | 河北普兴电子科技股份有限公司 | Preparation method of inverse epitaxial wafer |
| CN101783289B (en) * | 2010-03-05 | 2011-11-30 | 河北普兴电子科技股份有限公司 | Preparation method of inverse epitaxial wafer |
| CN102324382A (en) * | 2011-10-20 | 2012-01-18 | 上海先进半导体制造股份有限公司 | Method for growing high-resistance N type epitaxial layer on heavily-doped P type substrate |
| CN103489761A (en) * | 2013-09-17 | 2014-01-01 | 杭州立昂微电子股份有限公司 | Growing method of special epitaxial slice for Schottky chip |
| CN103996608A (en) * | 2014-06-06 | 2014-08-20 | 上海先进半导体制造股份有限公司 | Method for improving uniformity of electrical resistivity of epitaxial layer |
| CN103996608B (en) * | 2014-06-06 | 2016-07-06 | 上海先进半导体制造股份有限公司 | The method improving epilayer resistance rate uniformity |
| CN105575772A (en) * | 2015-12-25 | 2016-05-11 | 河北普兴电子科技股份有限公司 | Preparation method of epitaxial wafer for FRD |
| CN106876246A (en) * | 2017-02-14 | 2017-06-20 | 河北普兴电子科技股份有限公司 | The method for improving resistivity evenness in epitaxial wafer piece |
| CN111489964A (en) * | 2020-04-27 | 2020-08-04 | 中国电子科技集团公司第四十六研究所 | Preparation method of thick-layer silicon epitaxial wafer for reducing pattern drift rate |
| CN111489964B (en) * | 2020-04-27 | 2022-05-10 | 中国电子科技集团公司第四十六研究所 | Preparation method of thick-layer silicon epitaxial wafer for reducing pattern drift rate |
| CN115537922A (en) * | 2022-11-29 | 2022-12-30 | 中国电子科技集团公司第四十六研究所 | Method for reducing self-doping of epitaxial wafer |
| CN115537922B (en) * | 2022-11-29 | 2024-01-09 | 中国电子科技集团公司第四十六研究所 | Method for reducing self-doping of epitaxial wafer |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100547728C (en) | 2009-10-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100547728C (en) | The epitaxy method of material for low forward voltage drop Schottky diode | |
| CN105261670B (en) | The low pressure diffusion technique of crystal silicon cell | |
| CN104114755B (en) | Silicon carbide substrates, semiconductor device and manufacture method thereof | |
| CN100530704C (en) | A diffusion technique applied on silicon solar battery | |
| CN100449692C (en) | Silicon extension of re-doped arsenic substrate | |
| CN101911252B (en) | Placing table apparatus, processing apparatus and temperature control method | |
| CN102844474A (en) | Epitaxial silicon carbide single-crystal substrate and method for producing the same | |
| CN101587918B (en) | Phosphoric diffusion technology for metallurgical-grade polysilicon solar cells | |
| CN106252403B (en) | A kind of HEMT epitaxial structure and preparation method | |
| CN103199008A (en) | Homoepitaxial method on zero offset 4H-SiC substrate | |
| CN100590794C (en) | Preparation of silicon epitaxial material for volticap | |
| CN1230907C (en) | Compensating device, circuit, method and application | |
| CN1795563A (en) | Method for annealing silicon thin films and polycrystalline silicon thin films prepared therefrom | |
| US20130200386A1 (en) | Crystallization of multi-layered amorphous films | |
| CN205635850U (en) | Formula epitaxial furnace preheats | |
| CN100485873C (en) | Control method for epitaxial layer transition zone on re-mixed arsenic underlay | |
| DE102017201744A1 (en) | A method of manufacturing a silicon carbide epitaxial wafer, a method of manufacturing a silicon carbide semiconductor device, and an apparatus for producing a silicon carbide epitaxial wafer | |
| CN103811491B (en) | A kind of tabilized current power supply integrated chip and manufacture method | |
| CN102569532A (en) | Secondary deposition and dispersion process for selective emitter battery | |
| CN106906339A (en) | A kind of galvanizing annealing furnace air-fuel ratio correction method | |
| CN107221559A (en) | A kind of varying doping semiconductor material slices and its manufacture method for power MOSFET device | |
| JP2009176784A (en) | Method of manufacturing thin film epitaxial wafer | |
| CN101123179A (en) | Control method for extension slice equability for 6 inch As back lining MOS part | |
| CN106206267A (en) | A kind of crystal silicon chip method for diffusing high sheet resistance | |
| CN103390553B (en) | Quick thermal annealing method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |