CN100590794C

CN100590794C - Preparation of silicon epitaxial material for volticap

Info

Publication number: CN100590794C
Application number: CN200810055078A
Authority: CN
Inventors: 赵丽霞; 薛宏伟
Original assignee: Puxing Electronic Science & Technology Co Ltd Hebei
Current assignee: Puxing Electronic Science & Technology Co Ltd Hebei
Priority date: 2008-06-17
Filing date: 2008-06-17
Publication date: 2010-02-17
Anticipated expiration: 2028-06-17
Also published as: CN101295637A

Abstract

The invention relates to a preparation method for an epitaxy material used for a diode, in particular to a preparation method for an epitaxy material used for a variable capacitance diode; in the method, impurities during a wafer manufacture process is taken away by H2 through corrosion by adopting the three-times HCl root position corrosion technique and controlling the proportion between HCl andH2, thus lightening autodoping, leading the thickness uniformity of the epitaxy material to be less than 2 percent, the resistance rate uniformity in the wafer to be less than 5 percent, the transition area of the edge and the middle to be between 0.7 to 0.9 micron and having good consistency of the effective epitaxial layer thickness in the wafer as well as good consistency of the resistance rate uniformity in the wafer.

Description

Preparation of silicon epitaxial material for volticap

Technical field

The present invention relates to a kind of diode expitaxial preparation methods, especially a kind of preparation of silicon epitaxial material for volticap.

Background technology

Variable capacitance diode is a kind of variable capacitance semiconductor device that utilizes PN junction electric capacity to make with the characteristic of the nonlinear change of applied voltage, the this non-linear of PN junction electric capacity--voltage can produce many effects, utilize these effects, variable capacitance diode has obtained to use widely at aspects such as microwave, amplification frequency multiplication, switch and rf modulations.

The variable capacitance diode vertical structure and the transversary difference of different purposes are very big, require also very inequality to extension, wherein tool typical meaning is to have the variable capacitance diode of using do electric tuning in the UHF of super abrupt junction and the VHF frequency range, this class varactor requires high to epitaxial loayer, require series resistance and reverse current little simultaneously.Any semiconductor diode all has power transformation to hold characteristic, but the special semiconductor diode that designs as the transfiguration device, require its characteristic to approach a desirable variable capacitance as far as possible, it is better little to be that loss is healed, because diffusion capacitance is accompanied by bigger loss conductance, so general varactor does not utilize the diffusion capacitance of PN junction, and utilize the barrier capacitance of PN junction, service area to be limited near the whole anti-district partially of zero-bias to puncture voltage.In order to guarantee the premium properties of super abrupt junction, under the prerequisite of the highest working inverse voltage that does not influence variable capacitance diode, the attenuate epitaxy layer thickness of should trying one's best, making the thickness of the residue epitaxial loayer after the substrate back-diffusion is zero.Therefore require interior resistivity of epitaxial wafer sheet and effective thickness uniformity, consistency necessarily will get well, when the processing variable capacitance diode was used epitaxial material, emphasis was the autodoping of control from heavily doped arsenic substrate.

Common process variable capacitance diode epitaxial material generally adopts following measure for the autodoping effect that reduces heavily doped substrate: 1, use back of the body envelope substrate usually; 2, pedestal bag silicon makes silicon chip seal polysilicon by mass transfer in the back side in corrosion and growth course.3, grow the intrinsic barrier layer, promptly long certain thickness intrinsic barrier layer stops the autodoping effect from substrate and pedestal simultaneously; 4, two step extensions, promptly grow one deck after, drive the gas that causes autodoping that remains in a standstill in the atmosphere for a long time away, and then the second layer of growing; 5, the alternating temperature unsteady flow is caught up with gas, promptly grown ground floor after, the alternating temperature unsteady flow makes detention layer by quiet change, reduces the autodoping effect in the gas phase as far as possible; No matter but adopt above-mentioned which kind of method all to have following problem:

1). be difficult to guarantee resistivity evenness in the sheet, especially epitaxy layer thickness is thinner, and when resistivity was big, often uniformity was difficult to be controlled at below 8% in the resistivity sheet;

2). epitaxial loayer effective thickness edge and middle differences are big, and when causing device to use, when not reaching the puncture voltage of requirement on devices in the centre, and break-through has just taken place at the edge;

3). thickness and resistivity evenness are poor between the interior sheet of stove.

Summary of the invention

The technical issues that need to address of the present invention provide a kind of preparation of silicon epitaxial material for volticap, make resistivity evenness high conformity in the epitaxial material sheet sheet that obtains, and the effective thickness difference of epitaxial loayer edge and centre is even.

For addressing the above problem, the technical solution used in the present invention is:

A kind of preparation of silicon epitaxial material for volticap, it may further comprise the steps: A, with pedestal corrosion bag silicon, with the silicon substrate shove charge, be warmed up to 1200-1230 ℃ after with HCl polishing 1-10 minute; B, in stove, feed big flow H ₂Silicon substrate to above-mentioned polishing washed 4-15 minute; C, be cooled to 1100-1150 ℃, with chemical vapour deposition technique growth one deck intrinsic epitaxial loayer; D, be warming up to 1200-1230 ℃, feed big flow H once more ₂Washed 4-15 minute, and at H ₂The middle HCl that adds; E, reduce temperature to 1100-1150 ℃, feed flow and be the 15-40 liter/minute trichlorosilane, carry out the growth of second stage; F, be warmed up to 1200--1230 ℃, feed big flow H for the third time ₂Washed 4-15 minute, and at H ₂The middle HCL that adds; G. be cooled to 1100-1150 ℃, feed flow and be the 15-40 liter/minute trichlorosilane and phosphine carry out the growth of phase III, grow into desired epitaxial thickness.

Feed big flow H among described step B, D and the F ₂Flow be the 300-350 liter/minute, HCl and H among step D and the F ₂Flow-rate ratio be 1/50--1/20.

The thickness of the intrinsic epitaxial loayer that second stage is grown in ground floor intrinsic epitaxial loayer and the step e among the above-mentioned steps C is the 0.7-1.2 micron.

Adopt the beneficial effect that technique scheme produced to be:

The first, the present invention takes HCl in-situ corrosion technology three times, the intrinsic polysilicon on the substrate back pedestal is shifted, because " suction silicon " effect of substrate back has reduced the volatilization of substrate back impurity, thereby reduced autodoping to the silicon back side; Second, because the thickness of solid phase autodoping has only several microns of zero points, suppose the epitaxial loayer of 2 microns of growths, all be doped with the impurity in the gas phase in the thickness that almost near surface is more than 1 micron, therefore impurity concentration can be than nearly substrate side concentration height, be subjected to the serious epitaxial loayer of gas phase autodoping with what HCl eroded nearly surface, can make epitaxial layer transition zone precipitous, and reduce autodoping.The 3rd, when growing intrinsic layer for the second time, once more the impurity in the gas phase is covered in the epitaxial loayer of just having grown, logical HCl erodes nearly surface once more and is subjected to the serious epitaxial thickness of gas phase autodoping, further reduced autodoping, by three in-situ corrosions, impurity overflows speed to be reduced, and the epitaxial loayer autodoping of growth is significantly reduced.

The applicant had once applied for a kind of silicon epitaxy method of heavily doped arsenic substrate on April 11st, 2007, the anti-technology of throwing of HCL has been mentioned in the inside, adopt the HCL in-situ corrosion twice, the amount of autodoping can decrease, the lower epitaxial material of Schottky homepitaxy layer resistivity is suitable for growing, but it is thin as 4 microns for growth thickness, resistivity is higher as＞5 ohm. centimetre epitaxial loayer the time, resistivity evenness and transition region etc. be edge and middle differing greatly because the influence of autodoping can become, and sheet and sheet, difference between stove and the stove is also bigger, is not suitable for adopting the HCL in-situ corrosion twice; If adopt the etching process more than 3 times, though can control autodoping preferably, but the time because of the corrosion front, the back side also can be because of growth polycrystalline variation, especially to the substrate of back of the body envelope, make the outer slice, thin piece of delaying to satisfy the requirement of photoetching, and adopt etching process 3 times, preferably resolve the relation at transition region and uniformity and the back side, make the outer silicon chip of delaying to satisfy the requirement of device parameters and the back side can roughening yet.

Table 1 is inhomogeneity comparison in this technology and the common process sheet,

Table 1

	Thickness evenness	Resistivity evenness	Sheet inward flange and intermediate transition zone
	Thickness evenness	Resistivity evenness	Sheet inward flange and intermediate transition zone	Common process	＜3％	＜10％	Uncontrollable
This technology	＜2％	＜5％	0.7-0.9 micron	Common process	＜3％	＜10％	Uncontrollable

As can be seen from Table 1, adopt this technology after, make thickness evenness＜2% of epitaxial material, resistivity evenness in the sheet＜5%, edge and middle transitional district between the 0.7-0.9 micron, effective high conformity in the epitaxy layer thickness sheet, resistivity evenness high conformity in the sheet.

Embodiment

Below the present invention is done and describes in further detail:

A kind of preparation of silicon epitaxial material for volticap, it may further comprise the steps, and A, with pedestal corrosion bag silicon prevents that the impurity in the pedestal from outwards volatilizing, with the silicon substrate shove charge, be warmed up to 1200--1230 ℃ after with HCl polishing 5 minutes, present embodiment adopts 1210 ℃ of optimum temperature schemes; B, to feed flow in stove be 350 liters/minute H ₂Washed 10 minutes, and made and be adsorbed on wafer, be trapped in impurity in the boundary-layer by H ₂Air-flow is taken away; C, with chemical vapour deposition technique growth one deck intrinsic epitaxial loayer, the intrinsic epitaxial loayer plays sealing process to wafer surface, stop the further outwards volatilization of impurity in the substrate, the thickness of this intrinsic epitaxial loayer can be determined according to the requirement of epilayer resistance rate, generally between the 0.7-1.2 micron; D, to feed flow once more be 350 liters/minute H ₂Washed 15 minutes, and at H ₂Middle HCl, the HCl of adding and the H of adding ₂Flow-rate ratio be 1/50-1/20, the present invention adopts preferred plan 1/30; Simultaneously serviceability temperature is 1200--1230 ℃, and the present invention adopts 1210 ℃ of preferred plans, will erode by the serious epitaxial loayer of gas phase autodoping, and will be adsorbed on wafer, is trapped in impurity in the boundary-layer by H ₂Air-flow is taken away, and further reduces impurity content; E, reduction temperature are to the 1100-1500 degree, and the present invention adopts 1130 ℃ of preferred plans, and through-current capacity is 30 liters/minute a trichlorosilane, carries out the growth of second stage intrinsic layer; The epitaxial loayer of 0.7 micron thickness of growing, is used big flow H for the third time at F ₂Washed 10 minutes, and at H ₂Middle HCl, the HCl of adding and the H of adding ₂Ratio be 1/50-1/20, the present invention adopts preferred plan 1/30 (suitable), serviceability temperature is 1200--1230 ℃ simultaneously, and the present invention adopts 1210 ℃ of preferred plans, once more the epitaxial loayer of just having grown is corroded, and take away impurity, make remaining epitaxial loayer impurity content quite little, G, be cooled to 1100-1150 ℃, the present invention adopts 1130 ℃ of preferred plans, feed flow and be the 15-40 liter/minute trichlorosilane and phosphine carry out the growth of phase III, grow into desired epitaxial thickness.

The present invention has adopted the HCl etching process 3 times, make in the thickness evenness stove＜2%, resistivity evenness in the sheet＜5%, edge and middle transitional district are between the 0.7-0.9 micron, effective high conformity in the epitaxy layer thickness sheet has improved the rate of finished products of device greatly, satisfies requirement on devices fully.

Claims

1, a kind of preparation of silicon epitaxial material for volticap, it is characterized in that: it may further comprise the steps:

A, pedestal corrosion bag silicon is formed silicon substrate, with the silicon substrate shove charge, after temperature in the stove is raised to 1200--1230 ℃ with HCl polishing 1-10 minute;

B, in stove, feed big flow H ₂Silicon substrate to above-mentioned polishing washed 4-15 minute;

C, temperature in the stove is reduced to 1100-1150 ℃, with chemical vapour deposition technique growth one deck intrinsic epitaxial loayer;

D, be warming up to 1200-1230 ℃, feed big flow H once more ₂Washed 4-15 minute, and at H ₂The middle HCl that adds;

E, reduce temperature to 1100-1150 ℃, feed flow and be the 15-40 liter/minute trichlorosilane, carry out the growth of second stage intrinsic layer;

F, be warmed up to 1200--1230 ℃, feed big flow H for the third time ₂Washed 4-15 minute, and at H ₂The middle HCL that adds;

G. be cooled to 1100-1150 ℃, feed flow and be the 15-40 liter/minute trichlorosilane and phosphine, carry out the growth of phase III, grow into desired epitaxial thickness.

2, preparation of silicon epitaxial material for volticap according to claim 1 is characterized in that feeding among above-mentioned steps B, D and the F big flow H ₂Flow be the 300-350 liter/minute, HCl and H among step D and the F ₂Flow-rate ratio be 1/50--1/20.

3, preparation of silicon epitaxial material for volticap according to claim 1 is characterized in that among the above-mentioned steps C that the thickness of the intrinsic epitaxial loayer of second stage growth is the 0.7-1.2 micron in the ground floor intrinsic epitaxial loayer and step e.