CN114188362A - SOI (silicon on insulator) with special structure and preparation method thereof - Google Patents
SOI (silicon on insulator) with special structure and preparation method thereof Download PDFInfo
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- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 18
- 239000010703 silicon Substances 0.000 title claims abstract description 18
- 238000002360 preparation method Methods 0.000 title claims abstract description 13
- 239000012212 insulator Substances 0.000 title abstract description 4
- 239000000758 substrate Substances 0.000 claims abstract description 30
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 25
- 150000001875 compounds Chemical class 0.000 claims abstract description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 19
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 15
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 15
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 15
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 12
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 12
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 10
- 235000012239 silicon dioxide Nutrition 0.000 claims abstract description 10
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 9
- 238000000151 deposition Methods 0.000 claims abstract description 6
- 239000010409 thin film Substances 0.000 claims abstract description 5
- 239000010408 film Substances 0.000 claims abstract description 3
- 238000004140 cleaning Methods 0.000 claims description 29
- 238000000034 method Methods 0.000 claims description 29
- 230000008569 process Effects 0.000 claims description 18
- 238000000137 annealing Methods 0.000 claims description 17
- 230000003647 oxidation Effects 0.000 claims description 14
- 238000007254 oxidation reaction Methods 0.000 claims description 14
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 claims description 8
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 8
- 235000011114 ammonium hydroxide Nutrition 0.000 claims description 8
- 239000008367 deionised water Substances 0.000 claims description 8
- 229910021641 deionized water Inorganic materials 0.000 claims description 8
- 239000003344 environmental pollutant Substances 0.000 claims description 8
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 8
- 239000011259 mixed solution Substances 0.000 claims description 8
- 231100000719 pollutant Toxicity 0.000 claims description 8
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 8
- 239000013078 crystal Substances 0.000 claims description 7
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 6
- 238000001035 drying Methods 0.000 claims description 6
- 239000001301 oxygen Substances 0.000 claims description 6
- 229910052760 oxygen Inorganic materials 0.000 claims description 6
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 6
- 238000005468 ion implantation Methods 0.000 claims description 5
- 238000004519 manufacturing process Methods 0.000 claims description 5
- 229920005591 polysilicon Polymers 0.000 claims description 5
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 230000008021 deposition Effects 0.000 claims description 4
- 239000001257 hydrogen Substances 0.000 claims description 4
- 229910052739 hydrogen Inorganic materials 0.000 claims description 4
- -1 hydrogen ions Chemical class 0.000 claims description 4
- GPRLSGONYQIRFK-UHFFFAOYSA-N hydron Chemical compound [H+] GPRLSGONYQIRFK-UHFFFAOYSA-N 0.000 claims description 4
- 238000002513 implantation Methods 0.000 claims description 4
- 239000012535 impurity Substances 0.000 claims description 4
- 239000000203 mixture Substances 0.000 claims description 4
- 239000012299 nitrogen atmosphere Substances 0.000 claims description 4
- 230000003213 activating effect Effects 0.000 claims description 2
- 235000012431 wafers Nutrition 0.000 claims 12
- 238000010276 construction Methods 0.000 claims 2
- 230000008901 benefit Effects 0.000 abstract description 12
- 239000000463 material Substances 0.000 abstract description 8
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 230000007547 defect Effects 0.000 description 3
- 125000004430 oxygen atom Chemical group O* 0.000 description 3
- 230000003071 parasitic effect Effects 0.000 description 3
- 230000004913 activation Effects 0.000 description 2
- 239000000356 contaminant Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 230000008859 change Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 230000005764 inhibitory process Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- 230000007480 spreading Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
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- Condensed Matter Physics & Semiconductors (AREA)
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Abstract
The invention discloses a preparation method of an SOI (silicon on insulator) with a special structure, belonging to the technical field of semiconductor preparation. The SOI with a special structure comprises a substrate layer, a device layer, an insulating layer and a thin film layer, wherein the substrate layer and the device layer are one of the following materials: III-V compounds such as silicon, silicon carbide and gallium nitride; the insulating layer is silicon dioxide and can be deposited only on the device layer or on the substrate layer and the device layer; the film layer is one of the following: the polycrystalline silicon layer and the amorphous silicon layer can be obtained by depositing on a substrate layer of a growth insulating layer or directly on the substrate layer. The SOI with the special structure is mainly applied to the field of radio frequency, and the radio frequency performance is greatly improved by introducing an amorphous or polycrystalline layer by depending on the advantages of III-V compounds, so that the SOI product with the special structure has extremely high market value and social value.
Description
The technical field is as follows:
the invention relates to the technical field of semiconductor material preparation, and particularly provides an SOI (silicon on insulator) with a special structure formed by bonding and splitting processes and a preparation method thereof, which are mainly applied to the field of radio frequency.
Background art:
the materials currently used for RF front end modules are as follows:
1. SOQ (silicon on quartz), SOS (silicon on sapphire): SOQ is the same as conventional SOI and it produces lower leakage current and due to its lower parasitic capacitance, circuit performance is improved at high frequencies. The advantage of SOS is its excellent electrical insulation, which effectively prevents radiation from stray currents from spreading to nearby components. Substrates such as SOQ and SOS can achieve excellent radio frequency performance, but the structures are so few that they are very expensive.
2. High-resistance substrate silicon: with a resistivity above 500 ohm-cm, this substrate is inferior to the first, which does not benefit from the advantages of SOI type structures, but they are lower cost.
3. High-resistance SOI substrate: such substrates have structural advantages but exhibit poorer performance than the first.
One reason for forming the low resistance layer is: because the low resistivity layer may have contaminants on the surface prior to bonding, these contaminants are encapsulated at the bonding interface and can diffuse to the high resistivity substrate during bonding; another reason for forming the low resistance layer is: the substrate has a high content of oxygen atoms and must be subjected to a heat treatment to precipitate the oxygen atoms to obtain a high-resistance substrate. However, the diffusion of oxygen atoms, a heat treatment process, results in a low surface resistivity of the resulting substrate. Both of these reasons are currently difficult to control.
4. The high-resistance SOI substrate type substrate is improved by adding a defect layer on the basis of the third type: to achieve this, several techniques have been tried, but all suffer from some drawbacks: the method is sensitive to heat generated in the processes of SOI manufacturing and subsequent IC device manufacturing, and materials with good thermal stability are not easy to manufacture.
In the conventional SOI, due to parasitic capacitance and leakage current, the circuit performance is poor at high frequency, and it is difficult to achieve a good rf performance even if the substrate resistivity is increased. Therefore, it is desired to obtain an SOI having a special structure with excellent technical effects. The chemical inertness, high thermal conductivity and excellent mechanical, electrical and high-temperature properties of the III-V group compound are reflected in the advantages of the high-temperature and high-frequency application field.
The invention content is as follows:
the invention aims to provide an SOI with a special structure and an excellent technical effect and a preparation method thereof. The method not only can retain the unique advantages of SOI, but also can fully exert the advantages of III-V group compounds.
The invention relates to an SOI with a special structure, which is characterized in that: it comprises the following components: the device comprises a substrate layer (1), a device layer (2), an insulating layer (3) and a thin film layer (4), wherein the substrate layer (1) and the device layer (2) are one of the following components: III-V compounds such as silicon, silicon carbide and gallium nitride; the insulating layer (3) is silicon dioxide and can be deposited only on the device layer (2) or on the substrate layer (1) and the device layer (2); the film layer (4) is one of the following: the polycrystalline silicon layer and the amorphous silicon layer can be deposited on the substrate layer (1) of the growth insulating layer (3) or can be directly deposited on the substrate layer (1).
The preparation method of the SOI with the special structure sequentially comprises the following steps:
(1) sequentially carrying out megasonic cleaning on III-V group compound chips (marked as A chips) such as a silicon chip, a silicon carbide chip, a gallium nitride chip and the like by using a mixed solution of HF, NH4OH and H2O2 and deionized water, removing a natural oxide layer and pollutants on the surface to obtain a high-quality surface, and carrying out spin-drying after cleaning for later use;
(2) sequentially carrying out megasonic cleaning on III-V group compound sheets (marked as B sheets) such as a silicon wafer, a silicon carbide wafer, a gallium nitride sheet and the like by using a mixed solution of HF, NH4OH and H2O2 and deionized water, removing a natural oxide layer and pollutants on the surface to obtain a high-quality surface, and carrying out spin-drying after cleaning for later use;
(3) and (3) respectively placing the B piece after the step (2) or the A piece after the step (1) in an oxidation furnace or CVD equipment, wherein the oxidation temperature is 950 ℃ and 1150 ℃, and preparing the silicon oxide layer with the required thickness by controlling the oxidation time.
(4) And (4) performing hydrogen ion implantation on the B wafer obtained in the step (3) to ensure that hydrogen ions penetrate through the silicon oxide layer and are implanted into the B wafer to reach the required depth, wherein the implantation dosage is 2e 16-1 e17cm < -2 >, and the energy is 65keV-100 keV. Then cleaning the mixture by sequentially adopting SPM, DHF, SC1 and SC2 for later use.
(5) Preparing an amorphous silicon/polysilicon layer on the surface of the A wafer after the step (1) or the step (3), wherein the preparation of the amorphous silicon/polysilicon layer is realized by LPCVD (low pressure chemical vapor deposition), the growth pressure is 0.1-5.0Torr, the reaction temperature is 400-900 ℃, oxygen can be introduced for multiple times for oxygen-doped deposition, and the deposition is carried out for 1-n times according to the actual condition; different oxygen crystal orientations may also be deposited. And then cleaning by using SC1 and SC2 in sequence to remove surface impurities.
(6) Combining the B sheet processed in the step (4) and the A sheet processed in the step (5) into a whole in a bonding mode, then carrying out annealing treatment, and cleaning the bonded whole by sequentially adopting SC1 and SC2 after annealing;
a. the bonding process conditions are as follows: activating plasma at normal temperature for 0-30 s;
b. the annealing process conditions are as follows: the temperature is 200-450 ℃, the flow rate is 0.01-20L/min under the oxygen or nitrogen atmosphere, and the annealing time is 1-5 hours.
(7) And (3) splitting the whole bonded in the step (6) by adopting microwave splitting/laser splitting equipment, wherein the splitting temperature is lower than 950 ℃, and finally, the A piece after splitting is the SOI with the special structure. The thickness of the device layer (4) after cleaving is 0.1-1.5 um.
The invention has the following advantages:
1. the method of the invention utilizes a bonding process and a splitting process to form a special SOI structure, wherein the structure is that a silicon dioxide layer, a polycrystalline silicon layer and an amorphous silicon layer which are formed on a III-V group compound material are combined with a silicon dioxide layer which is formed on an injected III-V group compound material through the bonding process, and then the silicon dioxide layer is stripped from an injection layer through the splitting technology to form the special SOI structure;
2. the method disclosed by the invention not only has the advantages of no latch-up, high speed, low power consumption, small electric leakage and the like of the SOI, but also can show the advantages of III-V group compound materials, and the novel SOI can show the characteristics of higher speed, higher upper limit of working temperature, smaller electric leakage, better radio frequency characteristic and the like.
4. The method of the invention also creatively adopts polysilicon and amorphous silicon as the main insulating layer material, which solves the problem of poor radio frequency characteristics of SOI caused by small effective resistance.
5. The polycrystalline layer and the amorphous silicon can be combined with silicon dioxide in the method, and the method has the technical advantages of high defect density, effective inhibition of surface parasitic conductance of the substrate, limitation of capacitance change, and reduction of power and radio frequency loss of generated harmonic waves.
5. The preparation process adopted in the method is simple and has high process compatibility.
7. Due to the introduction of the laser lobe technology in the method, the density of the device layer density defects is reduced, and the production efficiency and the product quality are improved.
In sum, the invention has expectable huge economic value and social value.
Description of the drawings:
FIG. 1 is a flow chart of the SOI of the particular structure;
fig. 2 is a schematic structural diagram of an SOI of a special structure of the present invention, wherein: 1-substrate layer, 2-device layer, 3-insulating layer and 4-thin film layer.
The specific implementation mode is as follows:
example 1
(1) Sequentially carrying out megasonic cleaning on 1 8-inch silicon single crystal wafer (marked as an A wafer) by using a mixed solution of HF, NH4OH and H2O2 and deionized water, removing a natural oxide layer and pollutants on the surface to obtain a high-quality surface, and carrying out spin-drying after cleaning;
(2) another 1 piece of 8-inch silicon carbide single crystal wafer (marked as a B piece) is sequentially cleaned by mixed solution of HF, NH4OH and H2O2 and deionized water through megasonic cleaning, a natural oxide layer and pollutants on the surface are removed, and a high-quality surface is obtained;
(3) placing the B sheet obtained in the step (2) in an oxidation furnace, wherein the oxidation temperature is 1050 ℃, and the oxidation time is 9 hours;
(4) and (4) performing hydrogen ion implantation on the B wafer obtained in the step (3) to ensure that hydrogen ions penetrate through the silicon oxide layer and are implanted into the B wafer to reach the required depth, wherein the implantation dose is 8e16 cm < -2 >, and the energy is 90 keV. Then cleaning the mixture by sequentially adopting SPM, DHF, SC1 and SC2 for later use.
(5) And (2) preparing an amorphous silicon layer on the surface of the A sheet obtained in the step (1), wherein the amorphous silicon layer is prepared by LPCVD (low pressure chemical vapor deposition), the growth pressure is 0.5Torr, and the reaction temperature is 600 ℃. And then cleaning by using SC1 and SC2 in sequence to remove surface impurities.
(6) Combining the B sheet processed in the step (4) and the A sheet processed in the step (5) into a whole in a bonding mode, then carrying out annealing treatment, and cleaning the bonded whole by sequentially adopting SC1 and SC2 after annealing;
a. the bonding process conditions are as follows: the temperature is normal temperature, the plasma is activated, and the activation time is 30 s;
b. the annealing process conditions are as follows: the temperature is 400 ℃, the nitrogen atmosphere, the flow rate is 10L/min, and the annealing time is 4 hours.
(7) And (4) splitting the bonded whole in the step (6) by adopting microwave splitting equipment, wherein the splitting temperature is 900 ℃, and finally, the A piece after splitting is the SOI with the special structure. The thickness of the device layer (4) after cleaving is 0.8 um.
Example 2
(1) Sequentially carrying out megasonic cleaning on 1 6-inch silicon carbide single crystal wafer (marked as an A wafer) by using a mixed solution of HF, NH4OH and H2O2 and deionized water, removing a natural oxide layer and pollutants on the surface to obtain a high-quality surface, and carrying out spin-drying after cleaning;
(2) sequentially carrying out megasonic cleaning on another 1 piece of 6-inch silicon carbide single crystal wafer (marked as a wafer B) by using a mixed solution of HF, NH4OH and H2O2 and deionized water, and removing a natural oxide layer and pollutants on the surface to obtain a high-quality surface;
(3) respectively placing the B sheet obtained in the step (2) and the A sheet obtained in the step (1) in an oxidation furnace, wherein the oxidation temperature of the B sheet is 1100 ℃, the oxidation time is 12 hours, the oxidation temperature of the A sheet is 950 ℃, and the oxidation time is 6 hours;
(4) and (4) performing hydrogen ion implantation on the B wafer obtained in the step (3) to ensure that hydrogen ions penetrate through the silicon oxide layer and are implanted into the B wafer to reach the required depth, wherein the implantation dosage is 1e17cm ^ -2, and the energy is 75 keV. Then cleaning the mixture by sequentially adopting SPM, DHF, SC1 and SC2 for later use.
(5) And (3) preparing an amorphous silicon layer on the surface of the A sheet obtained in the step (2), wherein the amorphous silicon layer is prepared in an LPCVD (low pressure chemical vapor deposition) mode, the growth pressure is 1Torr, and the reaction temperature is 630 ℃. And then cleaning by using SC1 and SC2 in sequence to remove surface impurities.
(6) Combining the B sheet processed in the step (4) and the A sheet processed in the step (5) into a whole in a bonding mode, then carrying out annealing treatment, and cleaning the bonded whole by sequentially adopting SC1 and SC2 after annealing;
a. the bonding process conditions are as follows: the temperature is normal temperature, the plasma is activated, and the activation time is 10 s;
b. the annealing process conditions are as follows: the temperature was 480 ℃, the nitrogen atmosphere, the flow rate was 5L/min, and the annealing time was 2 hours.
(7) And (4) splitting the whole bonded in the step (6) by adopting microwave splitting equipment, wherein the splitting temperature is 950 ℃, and finally, obtaining the SOI with the split A piece which is the special structure mentioned in the invention. The thickness of the device layer (4) after cleaving was 0.65 um.
The above description is only for the purpose of illustrating embodiments of the present invention and is not intended to limit the scope of the present invention; other equivalent changes and modifications which do not depart from the spirit of the disclosure are intended to be included within the scope of the appended claims.
Claims (4)
1. An SOI of special structure, characterized in that: it comprises the following components: the device comprises a substrate layer (1), a device layer (2), an insulating layer (3) and a thin film layer (4), wherein the substrate layer (1) and the device layer (2) are one of the following components: III-V compounds such as silicon, silicon carbide and gallium nitride; the insulating layer (3) is silicon dioxide and can be deposited only on the device layer (2) or on the substrate layer (1) and the device layer (2); the film layer (4) is one of the following: the polycrystalline silicon layer and the amorphous silicon layer can be deposited on the substrate layer (1) of the growth insulating layer (3) or can be directly deposited on the substrate layer (1).
2. The SOI of special construction according to claim 1, wherein: the SOI with special structure meets one or the combination of the following requirements:
firstly, the resistivity of III-V group compound sheets such as silicon wafers, silicon carbide wafers, gallium nitride and the like used as a substrate layer (1) and a device layer (2) is 0.1-10000 ohm.cm;
secondly, when the insulating layer (3) is a silicon dioxide layer, the thickness of the insulating layer is 0.01-1 um;
thirdly, the thin film layer (4) is an amorphous layer or a polycrystalline layer, and the thickness is 0.1-3 um;
fourthly, the diameter of the III-V group compound pieces such as the silicon piece, the silicon carbide piece, the gallium nitride and the like is one of the following three types: 100mm, 150mm, 200mm, 300 mm;
and fifthly, doping III-V compound wafers such as silicon wafers, silicon carbide wafers, gallium nitride and the like into any type and any crystal orientation.
3. A method for preparing SOI with special structure is characterized in that: the preparation method sequentially comprises the following steps:
(1) cleaning III-V compound chips such as silicon chips, silicon carbide chips, gallium nitride chips and the like for later use, and marking the compound chips as A chips; (2) cleaning III-V compound chips such as silicon chips, silicon carbide chips, gallium nitride chips and the like for later use, and marking the compound chips as B chips; (3) growing a silicon dioxide layer on the B sheet only or on the A sheet and the B sheet; (4) performing ion implantation on the B sheet, and cleaning for later use; (5) depositing a polycrystalline silicon layer or an amorphous silicon layer on the A sheet; (6) carrying out a low-temperature plasma bonding process and an annealing process on the A sheet and the B sheet; (7) and carrying out a splitting process on the AB bonded wafer to finally obtain a wafer A which is the SOI with the special structure mentioned in the invention.
4. A method for producing an SOI of special construction as claimed in claim 3, characterized in that: the preparation method of the SOI with the special structure sequentially comprises the following steps:
(1) sequentially carrying out megasonic cleaning on III-V group compound chips (marked as A chips) such as a silicon chip, a silicon carbide chip, a gallium nitride chip and the like by using a mixed solution of HF, NH4OH and H2O2 and deionized water, removing a natural oxide layer and pollutants on the surface to obtain a high-quality surface, and carrying out spin-drying after cleaning for later use;
(2) sequentially carrying out megasonic cleaning on III-V group compound sheets (marked as B sheets) such as a silicon wafer, a silicon carbide wafer, a gallium nitride sheet and the like by using a mixed solution of HF, NH4OH and H2O2 and deionized water, removing a natural oxide layer and pollutants on the surface to obtain a high-quality surface, and carrying out spin-drying after cleaning for later use;
(3) and (3) respectively placing the B piece after the step (2) or the A piece after the step (1) in an oxidation furnace or CVD equipment, wherein the oxidation temperature is 950 ℃ and 1150 ℃, and preparing the silicon oxide layer with the required thickness by controlling the oxidation time.
(4) And (4) performing hydrogen ion implantation on the B wafer obtained in the step (3) to ensure that hydrogen ions penetrate through the silicon oxide layer and are implanted into the B wafer to reach the required depth, wherein the implantation dosage is 2e 16-1 e17cm < -2 >, and the energy is 65keV-100 keV. Then cleaning the mixture by sequentially adopting SPM, DHF, SC1 and SC2 for later use.
(5) Preparing an amorphous silicon/polysilicon layer on the surface of the A wafer after the step (1) or the step (3), wherein the preparation of the amorphous silicon/polysilicon layer is realized by LPCVD (low pressure chemical vapor deposition), the growth pressure is 0.1-5.0Torr, the reaction temperature is 400-900 ℃, oxygen can be introduced for multiple times for oxygen-doped deposition, and the deposition is carried out for 1-n times according to the actual condition; different oxygen crystal orientations may also be deposited. And then cleaning by using SC1 and SC2 in sequence to remove surface impurities.
(6) Combining the B sheet processed in the step (4) and the A sheet processed in the step (5) into a whole in a bonding mode, then carrying out annealing treatment, and cleaning the bonded whole by sequentially adopting SC1 and SC2 after annealing;
a. the bonding process conditions are as follows: activating plasma at normal temperature for 0-30 s;
b. the annealing process conditions are as follows: the temperature is 200-450 ℃, the flow rate is 0.01-20L/min under the oxygen or nitrogen atmosphere, and the annealing time is 1-5 hours.
(7) And (3) splitting the whole bonded in the step (6) by adopting microwave splitting/laser splitting equipment, wherein the splitting temperature is lower than 950 ℃, and finally, the A piece after splitting is the SOI with the special structure. The thickness of the device layer (4) after cleaving is 0.1-1.5 um.
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| CN114496733A (en) * | 2022-04-15 | 2022-05-13 | 济南晶正电子科技有限公司 | High-resistivity composite substrate, preparation method and electronic component |
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2021
- 2021-12-14 CN CN202111524906.XA patent/CN114188362A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114496733A (en) * | 2022-04-15 | 2022-05-13 | 济南晶正电子科技有限公司 | High-resistivity composite substrate, preparation method and electronic component |
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