CN101213890B - Multilayer circuit board and manufacturing method thereof - Google Patents

Multilayer circuit board and manufacturing method thereof Download PDF

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Publication number
CN101213890B
CN101213890B CN2006800242127A CN200680024212A CN101213890B CN 101213890 B CN101213890 B CN 101213890B CN 2006800242127 A CN2006800242127 A CN 2006800242127A CN 200680024212 A CN200680024212 A CN 200680024212A CN 101213890 B CN101213890 B CN 101213890B
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break
hole conductor
path hole
layer
substrate
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CN101213890A (en
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及川善和
吉川孝义
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Murata Manufacturing Co Ltd
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Murata Manufacturing Co Ltd
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
    • H05K1/0265—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections
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    • H01—ELECTRIC ELEMENTS
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/15—Ceramic or glass substrates
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
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    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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    • H01L23/49838—Geometry or layout
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
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    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0352—Differences between the conductors of different layers of a multilayer
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    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
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    • H05K2201/09227—Layout details of a plurality of traces, e.g. escape layout for Ball Grid Array [BGA] mounting
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    • H05K2201/096—Vertically aligned vias, holes or stacked vias
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    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
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    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
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    • H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Geometry (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

In conventional technology, since a line conductor or a via-hole conductor has a connection land, when a ceramic board is fabricated, the connection land can prevent connection failures caused by a misalignment between the via-hole conductor and the line conductor, fabrication errors thereof, etc. However, as shown in view, for example, a connection land (3) protrudes from a via-hole conductor (2) toward an adjacent via-hole conductor (2), which restricts the reduction of the gap between the via-hole conductors (2). Multilayer wiring board (10) comprises a multilayer body (11) formed by stacking a plurality of ceramic layers (11A) and a wiring pattern (12) provided within the multilayer body (11). The ceramic layer (11A) includes as the wiring pattern (12), a through via-hole conductor (16) vertically passing through the ceramic layer (11A) and a semi-through via-hole conductor (16A) electrically connected to the through via-hole conductor (16) within the same ceramic layer (11A) and not passing through the ceramic layer (11A).

Description

Multi-layer wire substrate and manufacturing approach thereof
Technical field
The present invention relates to a kind of multi-layer wire substrate and manufacturing approach thereof, in more detail, relate to a kind of multi-layer wire substrate and manufacturing approach thereof that can realize high-density wiring and can improve connection reliability.
Background technology
In recent years, along with the tremendous development of the Micrometer-Nanometer Processing Technology of integrated circuit, the terminal for connecting quantity of integrated circuit increased, and the narrow and small spacingization of terminal for connecting is obvious all the more.And recently, integrated circuit is installed to ceramic substrate mainly adopts the flip-chip connected mode to carry out.Because connect the pad of usefulness at the surface configuration flip-chip of ceramic substrate, and corresponding with the narrow and small spacingization of the terminal for connecting of integrated circuit, can make connection with the also necessary narrow and small spacingization of pad, so up to the present proposed several method.
For example, a kind of ceramic wiring substrate that engages with pad that do not adopt is proposed in patent documentation 1.Though engaging with pad is to utilize print process to wait to form, if the quantity that engages with pad becomes many, then be difficult to utilization and print and form, even and can form, with the bond strength of path hole conductor a little less than, can not guarantee reliability.So; In the technology of in patent documentation 1, being put down in writing; Through adopting the percent of firing shrinkage conductor paste littler to make ceramic multi-layer baseplate than ceramic green sheet, thus with the conductor layer in the through hole (path hole conductor) as engaging with pad and making it outstanding from ceramic multi-layer baseplate.Through like this, do not printing under the situation about engaging with pad, can improve the bond strength that engages with pad and path hole conductor, and realize engaging narrow and small spacing with pad.But, in patent documentation 1, a bit do not relate to about the path hole conductor of ceramic multi-layer baseplate inside and the content of the syndeton between the line conductor.
On the other hand, proposition is a kind of in patent documentation 2 is being provided with terminal pad in order to improve the laminated ceramic electronic component of the syndeton between path hole conductor and the line conductor on the line conductor.Under the situation of connecting path hole conductor and line conductor, the ceramic green sheet that forms is respectively carried out contraposition, the duplexer of making, sintered ceramic raw cook.When on ceramic green sheet, forming path hole conductor and line conductor; Can not avoid these mismachining tolerances; And when making duplexer; Because be difficult to avoid the offset of path hole conductor and line conductor, so be easy to generate interior path hole conductor of duplexer and the bad connection between the line conductor.So, in this technology, through the diameter terminal pad bigger than path hole conductor external diameter is set, thereby prevent the bad connection that causes owing to above-mentioned mismachining tolerance and offset on line conductor.
In addition, a kind of manufacturing approach that can improve the multilayer ceramic substrate of wiring density is proposed in patent documentation 3.In this case, shown in Fig. 7 (a) and (b), the lower end of the path hole conductor 2 in being disposed at multilayer ceramic substrate 1 forms terminal pad 3, and when path hole conductor 2 was adjacent, each terminal pad 3 was formed in the mutually different ceramic layer.So path hole conductor 2 is connected with line conductor 4 through terminal pad 3.This technology is being provided with on terminal pad 3 this point technological identical with patent documentation 2.
Patent documentation 1: specially permit communique No. 2680443
Patent documentation 2: the spy opens the 2001-284811 communique
Patent documentation 3: the spy opens flat 11-074645 communique
But; Under the situation of the past technology of in patent documentation 2,3, being put down in writing; Though because line conductor or path hole conductor have terminal pad, so when making ceramic substrate, utilize terminal pad can prevent the bad connection that causes owing to the offset between path hole conductor and the line conductor and mismachining tolerance separately etc.; But for example shown in Fig. 7 (a); Because terminal pad 3 stretches out to adjacent path hole conductor 2 sides from path hole conductor 2, so the problem that exists is that this extension branch hinders path hole conductor 2, the narrow and small spacingization between 2.Promptly; If further make path hole conductor 2, the narrow and small spacingization between 2; Then as shown in Figure 8; Because between terminal pad 3 and adjacent path hole conductor 2, be short-circuited, perhaps when burning till because the difference of the thermal coefficient of expansion between ceramic layer and the terminal pad 3 and splitting takes place easily, so be used to prevent at path hole conductor 2, be short-circuited between 2 perhaps that the gap of splitting reaches essential bottom line; And increasing the size of stretching out of terminal pad 3 beyond in this gap, terminal pad 3 can hinder path hole conductors 2, the narrow and small spacingization between 2.
The present invention designs in order to address the above problem, and its purpose is: thus a kind of multi-layer wire substrate and manufacturing approach thereof that can realize the densification of wiring figure corresponding to the narrow and small spacingization of the terminal for connecting of integrated circuit and can improve the connection reliability of interlayer wiring figure is provided.
Summary of the invention
Multi-layer wire substrate of the present invention; It is characterized in that: in duplexer that forms having range upon range of a plurality of substrate layer and the multi-layer wire substrate that is arranged on the wiring figure in this duplexer; On the one deck at least among above-mentioned a plurality of substrate layers, have: the break-through path hole conductor of the above-mentioned substrate layer of break-through up and down as above-mentioned wiring figure; And in same substrate layer, be electrically connected and half break-through via hole of the above-mentioned substrate layer of not break-through with this break-through path hole conductor.
In addition, in multi-layer wire substrate of the present invention, preferably above-mentioned half break-through path hole conductor is a plurality of half break-through path hole conductors to be set continuously and the half break-through continuous path hole conductor that forms.
In addition, in multi-layer wire substrate of the present invention, the substrate layer that preferably has above-mentioned break-through path hole conductor and above-mentioned half break-through continuous path hole conductor is arranged on the top layer of above-mentioned duplexer.
In addition; In multi-layer wire substrate of the present invention; The substrate layer that preferably has above-mentioned break-through path hole conductor and above-mentioned half break-through continuous path hole conductor is arranged on the superiors of above-mentioned duplexer; And a side that will form above-mentioned half break-through continuous path hole conductor disposes the end face that above-mentioned break-through path hole conductor is occurred as inner surface on above-mentioned uppermost surface, thereby it can be connected with the terminal for connecting of the surface mount device that is installed in above-mentioned uppermost surface.
In addition, in multi-layer wire substrate of the present invention, best above-mentioned break-through path hole conductor through above-mentioned half break-through continuous path hole conductor, is connected with the face inner wire that on the in-plane of above-mentioned substrate layer, extends in above-mentioned duplexer.
In addition; In multi-layer wire substrate of the present invention; Best above-mentioned break-through path hole conductor comprises adjacent the 1st break-through path hole conductor and the 2nd break-through path hole conductor each other, and the 1 half break-through continuous path hole conductor that is connected with above-mentioned the 1st break-through path hole conductor extends setting on away from the direction of above-mentioned the 2nd break-through path hole conductor.
In addition, in multi-layer wire substrate of the present invention, the 2 half break-through continuous path hole conductor that preferably is connected with above-mentioned the 2nd break-through path hole conductor extends setting on away from the direction of above-mentioned the 1st break-through path hole conductor.
In addition; On multi-layer wire substrate of the present invention; Best above-mentioned break-through path hole conductor comprises and above-mentioned the 1st break-through path hole conductor or the 3rd adjacent break-through path hole conductor of above-mentioned the 2nd break-through path hole conductor that the 3 half break-through continuous path hole conductor that is connected with above-mentioned the 3rd break-through path hole conductor extends setting on away from the direction of above-mentioned the 1st break-through path hole conductor and the 2nd break-through path hole conductor.
In addition, in multi-layer wire substrate of the present invention, best above-mentioned substrate layer is made up of the low-temperature sintered ceramics material, and above-mentioned wiring figure is made up of the conductive material that with silver or copper is main component.
In addition; The manufacturing approach of multi-layer wire substrate of the present invention; It is characterized in that: when manufacturing have range upon range of a plurality of substrate layer and the duplexer that forms, when being arranged on the multi-layer wire substrate of the wiring figure in this duplexer, have: on the one deck at least among a plurality of substrate layers, form the above-mentioned substrate layer of break-through up and down reach through hole and be provided with continuously with this reach through hole and the 1st operation of half reach through hole of the above-mentioned substrate layer of not break-through; Thereby and through 2nd operation of the formation of filled conductive property material in above-mentioned reach through hole and above-mentioned half reach through hole as the break-through path hole conductor and the half break-through path hole conductor of above-mentioned wiring figure.
In addition, in the manufacturing approach of multi-layer wire substrate of the present invention, the continuous hole of half break-through that preferably above-mentioned half reach through hole is formed as a plurality of half reach through holes are set continuously, and form half break-through continuous path hole conductor according to this continuous hole of half break-through.
In addition, in the manufacturing approach of multi-layer wire substrate of the present invention,, thereby form above-mentioned reach through hole and the continuous hole of half break-through preferably through irradiating laser on above-mentioned substrate layer.
In addition, in the manufacturing approach of multi-layer wire substrate of the present invention, preferably utilize carrier film to support above-mentioned substrate layer, and from carrier film one side irradiating laser, thereby above-mentioned reach through hole and the continuous hole of half break-through formed.
In addition, in the manufacturing approach of multi-layer wire substrate of the present invention, preferably utilize carrier film to support above-mentioned substrate layer, and from above-mentioned substrate layer one side irradiating laser, thereby above-mentioned reach through hole and the continuous hole of half break-through formed.
In addition; In the manufacturing approach of multi-layer wire substrate of the present invention; Preferably the substrate layer in above-mentioned the 1st, the 2nd operation is the ceramic sheet that does not burn till, and has: the 3rd operation of make after the duplexer that does not burn till that comprises this substrate layer, burning till the above-mentioned duplexer that does not burn till.
If employing the present invention; Then a kind of multi-layer wire substrate and manufacturing approach thereof can be provided; It can be corresponding to narrow and small spacingization of the terminal for connecting of integrated circuit etc. and makes the wiring figure densification, and can improve the connection reliability of the wiring figure of interlayer.
Description of drawings
Fig. 1 is the profile of an example of expression multi-layer wire substrate of the present invention.
Fig. 2 (a) and (b) are the figure that represent the part of the multi-layer wire substrate shown in the enlarged drawing 1 respectively, (a) are its profiles, (b) are its vertical views.
Fig. 3 (a) and (b) are the figure of a part that represent the wiring figure of the multi-layer wire substrate different with the multi-layer wire substrate of Fig. 1 respectively, (a) are its profile, (b) are its vertical views.
Fig. 4 (a) and (b) are that the narrow and small spacingization that is respectively applied for multi-layer wire substrate shown in Figure 3 compares the key diagram of explaining with wiring figure in the past.
Fig. 5 (a)～(e) is the process chart of major part of an example of representing the manufacturing approach of multi-layer wire substrate of the present invention respectively by process sequence.
Fig. 6 (a)～(e) is the process chart of major part of other example of representing the manufacturing approach of multi-layer wire substrate of the present invention respectively by process sequence.
Fig. 7 is the figure of expression multi-layer wire substrate in the past, (a) is the profile of its major part of expression, (b) is the vertical view from path hole conductor one side of the syndeton of expression path hole conductor and line conductor.
Fig. 8 is the key diagram that produces the state of short circuit between path hole conductor and the line conductor that is illustrated in the multi-layer wire substrate shown in Figure 7.
Label declaration
10 multi-layer wire substrates
11 ceramic layers (substrate layer)
12 wiring figures
13 line conductors (face inner wire)
14 path hole conductors
16～18 break-through path hole conductors
16A～18A half break-through continuous path hole conductor
31 the 1st surface mount devices
32 the 2nd surface mount devices
100 carrier films
111 ceramic green sheets (substrate layer that does not burn till)
116 break-through path hole conductor portions
116A half break-through continuous path hole conductor portion
The H path hole conductor is with hole (reach through hole)
P groove (the continuous hole of half break-through)
Embodiment
According to Fig. 1～example shown in Figure 6 the present invention is described below.
The multi-layer wire substrate 10 of this example is for example as shown in Figure 1, has: range upon range of a plurality of substrate layers (for example ceramic layer) 11A and the duplexer 11 that forms; And being arranged on the wiring figure 12 in this duplexer 11, the mounting substrate of the 1st, the 2nd top surface mount device 31,32 that will be installed in duplexer 11 through wiring figure 12 and the motherboard of installation multi-layer wire substrate 10 etc. is electrically connected.The 1st surface mount device 31 is made up of for example active element such as silicon semiconductor element, gallium arsenide semiconductor element, and the 2nd surface mount device 32 is made up of for example passive component such as capacitor, reactor.
Because the further sharp narrow and small spacingization of terminal for connecting of the 1st, the 2nd surface mount device 31,32, the multi-layer wire substrate 10 of this example on duplexer 11 (installed surface) go up and form the surface electrode corresponding with it.In Fig. 1, utilize the end face of the path hole conductor that constitutes wiring figure 12 to form surface electrode.The terminal for connecting of the for example ball grid array structure of the 1st surface mount device 31 is electrically connected with the upper surface of path hole conductor through soldered ball B; In addition, the outer electrode of the 2nd surface mount device 32 is electrically connected with the upper surface of path hole conductor through fillet welding tin F.Be described in detail the wiring figure 12 that comprises path hole conductor below.In addition, surface mount device also can comprise the components and parts that directly are not connected with path hole conductor.
Wiring figure 12 is as shown in Figure 1, has: with the figure of regulation at formed inner wire on the interface of ceramic layer 11A up and down (below be called [line conductor]) 13; The path hole conductor 14 that break-through ceramic layer 11A is provided with for line conductor 13,13 that will be up and down etc. is electrically connected; And be arranged on orlop ceramic layer 11A in path hole conductor 14 be connected and with the figure of regulation at configuration of the lower surface of duplexer 11 and the surface electrode 15 that forms, the installation base plate of the motherboard of the 1st, the 2nd surface mount device 31,32 and installation multi-layer wire substrate 10 etc. is electrically connected.Be formed on the interior path hole conductor 14 of the ceramic layer 11A of the superiors of duplexer 11; Shown in same width of cloth figure; Can the narrow and small spacingization of corresponding realization with the terminal for connecting of the 1st, the 2nd surface mount device 31,32, and can guarantee the connection reliability between the 1st, the 2nd surface mount device 31,32 and the wiring figure 12.
Path hole conductor 14 has: the 1st, the 2nd, the 3rd break-through path hole conductor 16,17,18 and the independent break-through path hole conductor (being designated hereinafter simply as [independent path hole conductor]) 19 of break-through regulation ceramic layer 11A, the constituent ratio past path hole conductor of structure dwindle each spacing, can realize the structure of narrow and small spacingization.1st, the 2nd, the 3rd break-through path hole conductor 16,17,18 is electrically connected with such half break-through path hole conductor 16A, 17A, the 18A that forms of each ceramic layer of not break-through 11A in each same ceramic layer 11A.From the face (lower surface Fig. 1) of ceramic layer 11A one side begin to top centre, the such half break-through path hole conductor 16A of formation of not break-through ceramic layer 11A, 17A, 18A, lower surface forms the plane identical with ceramic layer 11A.Independent path hole conductor 19 forms that conduct is not connected with half break-through path hole conductor but self-existent break-through path hole conductor.Therefore, the multi-layer wire substrate 10 of this example is characterized in that having: the path hole conductor structure that break-through path hole conductor and half break-through path hole conductor are set in same ceramic layer 11A continuously.
Though it is different that the quantity of half break-through path hole conductor is set according to the distance between the 1st, the 2nd, the 3rd break-through path hole conductor 16,17,18 and the connected line conductor 13; But usually; According to the distance between the 1st, the 2nd, the 3rd break-through path hole conductor 16,17,18 and each line conductor 13, form the half break-through continuous path hole conductor that interconnects such continuous setting as a plurality of half break-through path hole conductors.The half break-through continuous path hole conductor that therefore, will in same ceramic layer 11A, be connected with the 1st, the 2nd, the 3rd break-through path hole conductor 16,17,18 respectively is called the 1st, the 2nd, the 3 half break-through continuous path hole conductor 16A, 17A, 18A respectively.The length of these half break-through continuous paths hole conductor 16A, 17A, 18A is preferably 30～500 μ m.When less than 30 μ m, the meaning that half break-through continuous path hole conductor is set is just very little, can not improve connection reliability.In addition, if surpass 500 μ m, then be difficult to break-through path hole conductor and half break-through continuous path hole conductor are formed as one.
Because can as after in same operation, break-through path hole conductor and half break-through continuous path hole conductor are formed as one stating; So can be with the part of half break-through continuous path hole conductor as line conductor; Can double as be whole line conductors perhaps; With form comparing in the past of path hole conductor and line conductor with other operation, the offset that need not guarantee path hole conductor and line conductor can promote narrow and small spacingization as surplus; And can positively connect break-through path hole conductor and half break-through continuous path hole conductor, improve connection reliability.In addition, the applicant is willing among the 2004-111976 multi-layer wire substrate on the ceramic layer about proposing the break-through path hole conductor is separately positioned on break-through continuous path hole conductor in Japanese Patent Laid.
Fig. 2 (a) and (b) are that the 2nd break-through path hole conductor 17 shown in Figure 1 and the figure of the 2 half break-through continuous path hole conductor 17A are amplified in expression.The 2nd break-through path hole conductor 17 is shown in this figure (a); Form roughly truncated cone shape; That kind that the 2 half break-through continuous path hole conductor 17A is also inferred as (b) according to this figure forms half break-through path hole conductor that sectional area ratio the 2nd break-through path hole conductor 17 the wants little truncated cone shape shape of overlapping that kind partly in the horizontal direction continuously.In this example,, on the side of half break-through continuous path hole conductor, form concavo-convex because adopt laser to form the hole that path hole conductor is used.The break-through path hole conductor all is rendered as truncated cone shape, and the lower surface of broad plays the function as terminal pad.But path hole conductor is not limited only to truncated cone shape, also can be cylindrical shape.
Though 1st, the 2nd, the 3rd break-through path hole conductor 16,17,18 is own as shown in Figure 1; Form with same form respectively; But also can shown in Fig. 3 (a) and (b), prolong the 1st, the 2nd, the 3 half break-through continuous path hole conductor 16A, 17A, the 18A that formation connects respectively with it in mutually different direction from the 1st, the 2nd, the 3rd break-through path hole conductor 16,17,18.Be preferably in away from prolonging on the direction of other break-through path hole conductor (comprising independent path hole conductor 19) except the 1st, the 2nd, the 3rd break-through path hole conductor 16,17,18 that connects respectively with it and form the 1st, the 2nd, the 3 half break-through path hole conductor 16A, 17A, 18A.Through like this, can realize respectively the 1st, the 2nd, the 3rd break-through path hole conductor 16,17,18 each other and and independent path hole conductor 19 between narrow and small spacingization.Particularly, through in the ceramic layer 11A of the superiors of duplexer 11, these break-through path hole conductors and half break-through path hole conductor being set, thereby can make its narrow and small spacingization corresponding with the 1st, the 2nd surface mount device 31,32.
Then; Explain with reference to Fig. 3, Fig. 4; Because the extending direction of the 1st, the 2nd, the 3 half break-through continuous path hole conductor 16A that is connected with the 1st, the 2nd, the 3rd break-through path hole conductor 16,17,18 respectively, 17A, 18A is different, thus can realize the 1st, the 2nd, the 3rd break-through path hole conductor 16,17,18 mutual and and independent path hole conductor 19 between narrow and small spacing this point.And, though Fig. 3, Fig. 4 the has wire structures different with multi-layer wire substrate shown in Figure 1 10 has same numeral wire structures is described on the part identical or suitable with Fig. 1.Fig. 3 (a) is the profile of the A-A line in Fig. 3 (b).
Shown in Fig. 3 (a), be center and left and right directions disposes the 1st, the 2nd break-through path hole conductor 16,17 symmetrically with independent path hole conductor 19.1st, the 2nd break-through path hole conductor 16,17 comprises respectively on away from the direction in adjacent independent path hole 19 and extends the 1st, the 2 half break-through continuous path hole conductor 16A, the 17A that is provided with, and the 1st, the 2nd break-through path hole conductor 16,17 is connected with line conductor 13,13 respectively through the 1st, the 2 half break-through continuous path hole conductor 16A, 17A respectively.Because 1st, 1st, the 2 half break-through continuous path hole conductor 16A of the 2nd break-through path hole conductor 16,17 through separately, 17A and be connected with separately line conductor 13,13; So do not stretch out to adjacent independent path hole conductor 19 from the 1st, the 2nd break-through path hole conductor 16,17; Dwindle and adjacent independent path hole conductor 13 between distance, can realize narrow and small spacingization.
In addition, shown in Fig. 3 (b), first row is laterally zygomorphic with the path hole conductor of the third line.Therefore; First row and the path hole conductor of the third line respectively as the 3rd, the 4th, the 5th break-through path hole conductor 18,20,21, will be extended the half break-through continuous path hole conductor that is arranged in the same ceramic layer 11A respectively as the 3rd, the 4th, the 5 half break-through continuous path hole conductor 18A, 20A, 21A since the 3rd, the 4th, the 5th break-through path hole conductor 18,20,21.In the figure, the 1st, the 2nd break-through path hole conductor 16,17 and the 3rd, the 4th, the 5th break-through path hole conductor 18,20,21 are center and being configured symmetrically up and down with independent path hole conductor 19.And, extend on respectively away from the direction of adjacent break-through path hole conductor the 3rd, the 4th, the 5 half break-through continuous path hole conductor 18A, 20A, 21A are set, and the terminal pad 13A that is provided with on the end through separately in extension is connected with line conductor 13.At the 3rd, the 4th, the 5th break-through path hole conductor 18,20, between 21, also set up and the 1st, the 2nd break-through path hole conductor 16,17 and independent path hole conductor 19 between same relation.
In this example, though be that line conductor 13 is provided with terminal pad 13A, terminal pad also can be arranged on half break-through continuous path hole conductor one side.In this case, when half break-through continuous path hole conductor is set,, thereby can realize for example through only feasible external diameter from break-through path hole conductor half break-through path hole conductor farthest is bigger than the external diameter of break-through path hole conductor.
Shown in Fig. 3 (b); With independent path hole conductor 19 is the center, with radial the extension the 1st, the 2 half break-through continuous path hole conductor 16A, 17A and the 3rd, the 4th, the 5 half break-through continuous path hole conductor 18A, 20A, 21A is set laterally from the 1st, the 2nd break-through path hole conductor 16,17 and the 3rd, the 4th, the 5th break-through path hole conductor 18,20,21.In addition; In (a) of this figure; Though in same ceramic layer 11A, form the 1st, the 2nd break-through path hole conductor 16,17 and the 1st, the 2 half break-through continuous path hole 16A, 17A respectively; But when might be respectively interfering,, and add independent path hole conductor 19 in darker part and get final product for example as long as the 2nd break-through path hole conductor 17 is arranged in other ceramic layer 11A different with the 1st break-through path hole conductor 16 with half break-through continuous path hole conductor of other break-through path hole conductor.
With reference to Fig. 4 (a) and (b) and with the relation between the 1st break-through path hole conductor 16 and the independent path hole conductor 19 is example, thereby break-through path hole conductor and half break-through path hole conductor that this example is described are compared with the path hole conductor in past and how can be realized the narrow and small spacingization of degree.In the past, shown in Fig. 4 (b),,, stretch out size M from break-through path hole conductor 2 except essential terminal pad 4 at adjacent break-through path hole conductor 2, between 2 in order positively to connect break-through path hole conductor 2 and line conductor 3 1, and between terminal pad 4 and adjacent break-through path hole conductor 2, be not short-circuited and the essential size G of bottom line of splitting 1Outside, even also add and the surplus M that has for the occurrence positions skew can not hang down the essential interval of subthreshold yet 2, such total must be arranged and the distance (M that obtains 1+ M 2+ G 1).As this distance (M 1+ M 2+ G 1), must reach usually about 200 μ m.Therefore, under the situation of wire structures in the past, break-through path hole conductor 2, distance shrinkage between 2 are realized that within 200 μ m narrow and small spacingization is a difficulty very.
Different therewith is; Under the situation of this example; Between adjacent the 1st break-through path hole conductor 16 and independent path hole conductor 19, must have between the 1st break-through path hole conductor 16 and adjacent independent path hole conductor 19, not being short-circuited and the essential size G of bottom line of splitting 2, and between the 1st break-through path hole conductor 16 and independent path hole conductor 19 in order when occurrence positions squints, not to be lower than spacing G yet 2And the surplus M that has 3Distance (the M that adds up to gained 3+ G 2).Size G in the wire structures of this example 2With the size G in the wire structures in past 1Come down to identical size, for size M 3Since the 1st break-through path hole conductor 16 that processing is wanted to be connected with line conductor 13 in same operation and with its independent path hole conductor 19 that disposes continuously; Therefore the main cause of error only is the via hole machining accuracy; The elongation of the figure when not having the circuit printing reaches the main causes such as mismachining tolerance increase that produce owing to through via hole processing and these 2 operations of circuit printing, and position offset diminishes.
Therefore, be as the 1st advantage of this example, need be for connection reliability the surplus M of the terminal pad 13A bigger than via hole diameter 1, as the 2nd advantage be the surplus M that when occurrence positions squints, is got for the generation that prevents the 1st adjacent break-through path hole conductor 16 and short circuit between the independent path hole conductor 19 and cracking (splitting) 2Also as long as less amount.Therefore, the 1st break-through path hole conductor 16 in this example and the distance between the independent path hole conductor 19 can narrow down to about the half the distance 100 μ m that for example pass by, and compare in the past, can realize narrow and small spacingization significantly.
And though in this example, be to be that example is explained with the ceramic layer as substrate layer, substrate layer not only is limited to ceramic layer.As substrate layer also can be the resin bed that for example is made up of thermosetting resin.Under the situation that is ceramic layer,, can use for example low-temperature sintered ceramics (LTCC:Low Temperature Co-fired Ceramic) (LTCC) material as ceramic material.So-called low-temperature sintered ceramics material is can sintering under the temperature below 1050 ℃ and the ceramic material that can burn till simultaneously with little silver of resistivity and copper etc.As the low-temperature sintered ceramics material, specifically can enumerate the glass complex class LTCC material that in the ceramic powders of aluminium oxide, zirconia, magnesia, forsterite etc., mixes borosilicate acids glass and generate; Adopt ZnO-MgO-Al 2O 3-SiO 2The sintered glass ceramics class LTCC material of the sintered glass ceramics of class; And employing BaO-Al 2O 3-SiO 2Class ceramic powders or Al 2O 3-CaO-SiO 2-MgO-B 2O 3The non-glass class LTCC material of class ceramic powders etc. etc.Material as ceramic layer 11A; Through adopting the low-temperature sintered ceramics material; Then as the material of wiring figure 12, that can adopt for example silver or copper etc. has low resistance and a low-melting metal, and can under the low temperature below 1050 ℃, burn till duplexer 11 and wiring figure 12 simultaneously.
In addition, also can use high temperature sintering pottery (HTCC:High TemperatureCo-fired Ceramic) (HTCC) material as ceramic material.As the high temperature sintering ceramic material, adopt the sintering adjuvant and the material after carrying out sintering more than 1100 ℃ that in for example aluminium oxide, aluminium nitride, mullite, other material, add glass etc.At this moment, as wiring figure 12, use is from molybdenum, platinum, palladium, tungsten, nickel and comprise the metal of selecting these the alloy.
An example of the manufacturing approach of multi-layer wire substrate of the present invention then, is described with reference to Fig. 5, Fig. 6.
At first, make the low-temperature sintered ceramics material (for example comprise Al 2O 3As filler, pyrex ceramic material as sintering adjuvant) in the adhesive of vinyl alcohol etc., disperse and be modulated into slurry after; Shown in Fig. 5 (a), Fig. 6 (a); Utilization is scraped the skill in using a kitchen knife in cookery etc. this slurry is coated on the carrier film 100, to make the ceramic green sheet 111 that low-temperature sintering is used.Then, ceramic green sheet is cut into the size of regulation.
Then, for the 1st, the 2nd, the 3rd break-through path hole conductor 16,17,18 and independent path hole conductor 19 are set, adopt for example CO 2The laser of laser etc., irradiation ceramic green sheet 111, the hole that the path hole conductor of using the figure of stipulating to form the regulation form is used.Because independent path hole conductor 19 is path hole conductors of break-through ceramic green sheet 111 up and down, thus when form with compulsory figure path hole conductor with the hole after, to this path hole conductor with the hole in filled conductive property paste, formation independent path hole conductor portion.Here, with reference to Fig. 5, Fig. 6 the situation that forms the 1st break-through path hole conductor 16 and the 1 half break-through continuous path hole conductor 16A is described.
When on ceramic green sheet 111, forming path hole conductor and use the hole, for example have from carrier film 100 1 side irradiating lasers with form path hole conductor with the method in hole and from raw cook 111 1 side irradiating lasers with the method for formation path hole conductor with the hole.
At first, explain from the method for carrier film 100 1 side irradiating lasers according to Fig. 5.In the method, shown in Fig. 5 (a), with the light source one side configuration of carrier film 100 towards laser L.
Then, shown in Fig. 5 (b), irradiating laser L on carrier film 100 makes laser L break-through carrier film 100 and ceramic green sheet 111, and the path hole conductor that is roughly rounding frustum shape with formation is used hole H.Then, the irradiation energy of laser L is reduced to not the irradiation energy of degree that can break-through ceramic green sheet 111, and laser L is moved from the position shown in Fig. 5 (b) to right-hand.The displacement of laser L is redefined for laser L and partly shines path hole conductor after the processing with the distance of the such degree among the H of hole.Each laser L moves, and then the break-through carrier film 100, and on ceramic green sheet 111, forms the groove of rounding frustum shape.Laser L is moved, shown in this figure (c), on the upper face side of ceramic green sheet 111, form the groove of rounding frustum shape continuously, final shown in this figure (d), with hole H elongated groove P is set continuously with path hole conductor.
At this moment, aspect the processing of hole H and groove P, the thickness of ceramic green sheet 111 is 10～250 μ m preferably at path hole conductor, and the thickness of carrier film is 25～100 μ m preferably.If their thickness is thicker than above-mentioned thickness, the very difficult path hole conductor that forms that then becomes is used hole H, if their thickness is thinner than above-mentioned thickness, then becoming is difficult to form groove P.The length of groove P is preferably in the scope of 30～500 μ m.Under the situation of less than 30 μ m, can not improve connection reliability, if surpass 500 μ m, then be difficult to path hole conductor with hole H and groove P in filled conductive property paste.The degree of depth of groove P is with respect to the thickness of ceramic green sheet 111, and reasonable on average is 15～95% the degree of depth, preferably 25～60% the degree of depth.Under situation less than 15% the degree of depth, can not improve connection reliability, surpassing under the situation of 95% the degree of depth, because the error in the processing, the break-through ceramic green sheet 111 sometimes.
Then; Formed path hole conductor from carrier film 111 side direction ceramic green sheets 111 with hole H and groove P in; Filling is the conductive paste of main component with Ag or Cu; And remove unnecessary conductive paste from carrier film 100, shown in Fig. 5 (e), form the 1st break-through path hole conductor portion 116 and the 1 half break-through continuous path hole conductor portion 116A.Then, shown in this figure (f), make ceramic green sheet 111 upwards, and utilize silk screen print method and graphic printing conductive paste, to form line conductor portion 113 to stipulate.
From the method for ceramic green sheet 111 1 side irradiating lasers, shown in Fig. 6 (a), with the light source side configuration of ceramic green sheet 111 towards laser L.Then; With above-mentioned main points shown in this figure (b)～(e); From ceramic green sheet 111 1 side irradiating laser L; Thereby on ceramic green sheet 111, form path hole conductor with hole H and groove P, and to these path hole conductors with hole H and groove P in filled conductive property paste, thereby form the 1st break-through path hole conductor portion 116 and the 1 half break-through continuous path hole conductor portion 116A; On ceramic green sheet 111, utilize silk screen print method etc. again and with the graphic printing conductive paste of regulation, to form line conductor portion 113.
According to said sequence; To a plurality of ceramic green sheets respectively as required formation need after the 1st, the 2nd, the 3rd break-through path hole conductor portion, the 1st, the 2nd, the 3 half break-through continuous path hole conductor portion, independent path hole conductor portion and the line conductor portion of quantity; Range upon range of these ceramic green sheets; And with the regulation pressure carry out crimping, to make half-finished duplexer.
Then, after on half-finished duplexer surface, being formed for cutting apart the cut-out groove of each multi-layer wire substrate, burn till half-finished duplexer with the set point of temperature below 1050 ℃, to obtain sintered body.After this sintered body is implemented electroplating processes, cut apart sintered body, thereby can obtain the multi-layer wire substrate 10 of a plurality of examples simultaneously.
As above state bright said; If adopt this example; Then because have: range upon range of a plurality of ceramic layer 11A and the duplexer 11 that forms and be arranged on the wiring figure 12 in this duplexer 11A have as wiring figure 12: the the 1st of break-through ceramic layer 11A the, the 2nd, the 3rd break-through path hole conductor 16,17,18 up and down; And be electrically connected in same ceramic layer 11A with these break-through path hole conductors 16,17,18 and the 1st, the 2nd, the 3 half break-through continuous path hole conductor 16A, 17A, the 18A of this ceramic layer of not break-through 11A; So with form comparing in the past of path hole conductor and line conductor with other operation; The offset that need not guarantee path hole conductor and line conductor is as surplus; Can promote narrow and small spacingization; Can positively in same ceramic layer 11A, be electrically connected with the 1st, the 2nd, the 3 half break-through continuous path hole conductor 16A, 17A, 18A simultaneously, improve connection reliability the 1st, the 2nd, the 3rd break-through path hole conductor 16,17,18.
Particularly; Because the ceramic layer 11A with the 2nd break-through path hole conductor 17 and the 2 half break-through continuous path hole conductor 17A is set to the ceramic layer 11A of duplexer 11 the superiors; Make a side that forms the 2 half break-through continuous path hole conductor 17A make inner surface; Dispose the end face that surface occurred of the 2nd break-through path hole conductor 17 at the ceramic layer 11A of the superiors; It can be connected with the terminal for connecting of the 1st, the 2nd surface mount device 31,32 on the ceramic layer 11A surface that is installed in the superiors; So can realize that the slimming of duplexer 11 is the low level of multi-layer wire substrate 10 simultaneously corresponding to the narrow and small spacingization of the 1st, the 2nd surface mount device 31,32.
In addition; Because 1st, the 2nd, the 3rd break-through path hole conductor 16,17,18 is connected with line conductor 13 through the 1st, the 2nd, the 3 half break-through continuous path hole conductor 16A, 17A, 18A in duplexer 11; So the terminal pad 13A of line conductor 13 does not stretch out to other path hole conductor 14 1 sides; Even wiring figure 12 densifications, also can prevent and other path hole conductor 14 between short circuit.In addition; Because path hole conductor 14 comprises the 1st, the 2nd, the 3rd adjacent break-through path hole conductor 16,17,18 each other; And the 1st, the 2nd, the 3 half break-through continuous path hole conductor 16A that is connected with the 1st, the 2nd, the 3rd break-through path hole conductor 16,17,18,17A, 18A extend setting on respectively away from the direction of other break-through path hole conductor; So on the 1st, the 2nd, the 3rd break-through path hole conductor 16,17,18, do not stretch out to other break-through path hole conductor one side respectively; Can dwindle each the 1st, the 2nd, the 3rd break-through path hole conductor 16,17, the interval between 18; Thereby realize narrow and small spacingization, and can make wiring figure 12 densifications.In addition, because ceramic layer 11A is made up of the low-temperature sintered ceramics material, wiring figure 12 is made up of the conductive material that with Ag or Cu is main component, so can burn till with the low temperature below 1050 ℃.
In addition; If adopt this example; Then when making multi-layer wire substrate 10, because have: the path hole conductor that in being used to form a plurality of ceramic green sheets 111 of a plurality of ceramic layer 11A, forms break-through ceramic green sheet 111 up and down with hole H and with the operation of this path hole conductor with the groove P of continuous setting of hole H and not break-through ceramic green sheet 111; And through to path hole conductor with hole H and groove P in filled conductive property paste form as the 1st break-through path hole conductor portion 116 of wiring figure 12 and the operation of the 1 half break-through path hole conductor 116A of portion; So can in same ceramic layer 11A, the 1st break-through path hole conductor 16 and the 1 half break-through path hole conductor 16A be formed as one; And can positively the two be electrically connected, can improve connection reliability.
In addition; Because through irradiating laser on the ceramic green sheet 111 of forming ceramic layer 11A; To form path hole conductor with hole H and groove P; Even so the 1st, the 2nd, the 3rd break-through path hole conductor 16,17,18 and the 1st, the 2nd, the 3 half break-through continuous path hole conductor 16A, 17A, 18A densification also can positively form them.Because utilize carrier film 100 to support ceramic green sheet 111, and pass through, to form path hole conductor with hole H and groove P, so can correctly form path hole conductor with hole H and groove P from carrier film 100 1 sides or from ceramic green sheet 111 1 side irradiating lasers.
And the present invention does not receive any restriction of above-mentioned each embodiment.For example; In above-mentioned example; Though the upper surface that is arranged on the break-through path hole conductor on the ceramic layer 11A of the superiors becomes the surface electrode of the connection usefulness of the 1st, the 2nd surface mount device 31,32; Unnecessary, then also can be set to the surface electrode of terminal pad in the upper surface of break-through path hole conductor but if the space has.In addition; In above-mentioned example; Though the break-through path hole conductor of the superiors is used as the terminal for connecting of the 1st, the 2nd surface mount device; But also can on undermost ceramic layer 11A, the break-through path hole conductor be set, and its lower surface is used as the terminal for connecting with the installation base plate of motherboard etc.
Practicality in the industry
The present invention can be suitable for as the multi-layer wire substrate that various surface mount devices are installed.

Claims (13)

1. a multi-layer wire substrate is characterized in that,
In duplexer of forming having range upon range of a plurality of substrate layer and the multi-layer wire substrate that is arranged on the wiring figure in this duplexer; On the one deck at least among said a plurality of substrate layers, have: the break-through path hole conductor of the said substrate layer of break-through up and down as said wiring figure; And be electrically connected in same substrate layer with this break-through path hole conductor and half break-through path hole conductor of the said substrate layer of not break-through.
2. the multi-layer wire substrate described in claim 1 is characterized in that,
Said half break-through path hole conductor is a plurality of half break-through path hole conductors to be set continuously and the half break-through continuous path hole conductor that constitutes.
3. the multi-layer wire substrate described in claim 2 is characterized in that,
Substrate layer with said break-through path hole conductor and said half break-through continuous path hole conductor is arranged on the top layer of said duplexer.
4. the multi-layer wire substrate described in claim 3 is characterized in that,
Substrate layer with said break-through path hole conductor and said half break-through continuous path hole conductor is arranged on the superiors of said duplexer; And a side that will form said half break-through continuous path hole conductor is as inner surface; And dispose the end face that said break-through path hole conductor is occurred on the surface of the said the superiors, thereby it can be connected with the terminal for connecting of surface mount device on being installed in said uppermost surface.
5. the multi-layer wire substrate described in claim 2 is characterized in that,
Said break-through path hole conductor through said half break-through continuous path hole conductor, is connected with the face inner wire that extends at said substrate layer in-plane in said duplexer.
6. the multi-layer wire substrate described in claim 2 is characterized in that,
Said break-through path hole conductor comprises: mutual adjacent the 1st break-through path hole conductor and the 2nd break-through path hole conductor, the 1 half break-through continuous path hole conductor that is connected with said the 1st break-through path hole conductor extends setting on away from the direction of said the 2nd break-through path hole conductor.
7. the multi-layer wire substrate described in claim 6 is characterized in that,
The 2 half break-through continuous path hole conductor that is connected with said the 2nd break-through path hole conductor extends setting on away from the direction of said the 1st break-through path hole conductor.
8. the multi-layer wire substrate described in each of claim 1～7 is characterized in that,
Said substrate layer is made up of the low-temperature sintered ceramics material, and said wiring figure is made up of the conductive material that with silver or copper is main component.
9. the manufacturing approach of a multi-layer wire substrate is characterized in that,
When manufacturing has: when range upon range of a plurality of substrate layers and the duplexer formed and the multi-layer wire substrate that is arranged on the wiring figure in this duplexer,
Have:
On the one deck at least among a plurality of substrate layers, form the said substrate layer of break-through up and down reach through hole and be provided with continuously with this reach through hole and the 1st operation of half reach through hole of the said substrate layer of not break-through; And
Thereby form the 2nd operation as the break-through path hole conductor and the half break-through path hole conductor of said wiring figure through filled conductive property material in said reach through hole and said half reach through hole.
10. the manufacturing approach of the multi-layer wire substrate described in claim 9 is characterized in that,
Said half reach through hole is formed the continuous hole of half break-through that a plurality of half reach through holes is set continuously and forms, and form half break-through continuous path hole conductor according to this continuous hole of half break-through.
11. the manufacturing approach of the multi-layer wire substrate described in claim 10 is characterized in that,
Through irradiating laser on said substrate layer, thereby form said reach through hole and the continuous hole of half break-through.
12. the manufacturing approach of the multi-layer wire substrate described in claim 11 is characterized in that,
Utilize carrier film to support said substrate layer, and pass through, thereby form said reach through hole and the continuous hole of half break-through from carrier film one side irradiating laser.
13. the manufacturing approach of the multi-layer wire substrate described in claim 11 is characterized in that,
Utilize carrier film to support said substrate layer, and pass through, thereby form said reach through hole and the continuous hole of half break-through from said substrate layer one side irradiating laser.
14. the manufacturing approach of the multi-layer wire substrate described in each of claim 9～13 is characterized in that,
Substrate layer in said the 1st, the 2nd operation is the ceramic green sheet that does not burn till, the 3rd operation of have after making the duplexer that does not burn till that comprises this substrate layer, burning till the said duplexer that does not burn till.
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