JP2005093945A - Method for manufacturing ceramic wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a ceramic wiring board in which a dielectric layer around a conductor is scarcely deformed even if the wiring structure is complicated or shrunk due to reduction in size or high integration of a semiconductor component, and flatness on the major surface of a substrate for forming component connection pads can be enhanced. <P>SOLUTION: A via hole is formed in a unit plate material 50' composed of a compacted ceramic material in the plate thickness direction and a conductor containing recess 30h for containing a layer conductor element 30 constituting a wiring part is formed on at least one major surface side of the unit plate material 50'. The via hole is filled with a metal material becoming a via conductor 35 and the conductor containing recess 30h is filled with a metal material constituting the layer conductor element 30 thus producing a unit plate material 55 filled with metal. A ceramic dielectric layer 50 is formed of the unit plate material 50' by laminating and pasting the unit plate materials 55 filled with metal in the plate thickness direction thus obtaining a ceramic wiring board 2 having a metal conductor layer formed of the layer conductor element 30. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a ceramic wiring board.

JP 2001-044323 A

  Conventionally, ceramic wiring boards capable of relatively high-density wiring have been widely used as wiring boards used for package boards and circuit modules (see, for example, Patent Document 1). The ceramic wiring board is obtained by alternately laminating ceramic dielectric layers and metal conductor layers, and a semiconductor component is mounted on the surface thereof as necessary. Conventionally, such ceramic wiring boards have been actively used for mobile communication devices such as mobile phones and wireless LANs, optical communication interfaces, etc., utilizing the high dielectric properties peculiar to ceramics. In recent years, the clock frequency of CPUs and microprocessors has shifted from a few hundreds of MHz to a high frequency of several GHz, and uses as package substrates for these semiconductor components are also expanding.

  In addition, when connecting a semiconductor component to a motherboard or the like via a package substrate, the constituent material on the motherboard side is mainly a polymer material having a relatively large linear expansion coefficient (for example, 15 to 50 ppm / ° C.), whereas the connection is made. In the case of a semiconductor component to be used, for example, in the case of a Si-based component, the linear expansion coefficient is as small as around 3 ppm / ° C. Therefore, in order to ensure the reliability of the connection between the semiconductor component / package substrate / motherboard, in particular, the flip-chip connected semiconductor component and the package substrate, the difference in linear expansion between the component material of the package substrate and the semiconductor component. Therefore, it is necessary to reduce the thermal stress derived from the heat generated during the solder reflow process and the component operation. Constructing the package substrate with a ceramic having a smaller linear expansion coefficient than that of the polymer material is also effective from this viewpoint.

  In recent years, ceramic wiring boards such as those described above have become increasingly complex as the wiring structure to be incorporated has become more complex due to the trend toward miniaturization or higher integration of mounted LSIs and ICs. Dimensions and arrangement intervals continue to shrink. Conventionally, a ceramic wiring board has a via hole drilled in a green sheet formed with ceramic powder and a resin binder, and a conductor element pattern such as a wiring portion is printed while filling the via hole using a metal paste. And then baked. However, this method causes considerable shrinkage of the green sheet laminate during firing, and the variation in the amount of shrinkage is large. It is no longer possible to ensure the accuracy of the position.

  Furthermore, in the above conventional method, as shown in FIG. 29, the conductor pattern 130 is printed and formed on the main surface of the green sheet 150 with a certain protruding height, and another green sheet 150 is laminated and pressure-bonded thereon. Therefore, the conductor pattern 130 tends to be crushed between the two green sheets 150 and 150, and the green sheet 150 is also deformed and corrugated corresponding to the shape of the conductor pattern 130. The conductor element 30 obtained by firing this laminated body has a reference plane BP ′ defined as an extension of the joint boundary BP of the ceramic conductor layers 50 and 50 based on the two green sheets 150 and 150. It is formed so as to straddle (or bite into) the ceramic conductor layers 50 and 50 on both sides. As shown on the left side of FIG. 30, the deformation of the green sheet 150 and the ceramic conductor layer 50 that occurs around the conductor element 30 accumulates in the thickness direction of the laminate, and therefore, on the main surface of the substrate on which the terminal connection pads 155 are formed. The resulting undulations are also increased, and there is a drawback that the coplanarity of the pad 155 is deteriorated and the reliability of connection of component terminals is likely to be lowered.

  Moreover, in the conventional ceramic wiring board, since it was premised on simultaneous firing of the ceramic and the metal paste pattern for forming the wiring and via, the ceramic having a high firing temperature such as alumina, silicon nitride, or aluminum nitride is used. If you need to use a high melting point metal (such as Mo or W) that does not melt or flow out even at the firing temperature as a conductor material, or conversely, if you want to use a highly conductive metal (such as Cu) The material selection is extremely large, such as the need to use a ceramic whose firing temperature is adjusted so that it can be fired simultaneously (for example, a composite ceramic material of high melting point ceramic and glass). There were restrictions. In the former case, the electrical conductivity of the conductor is likely to be difficult, and in the latter case, the ceramic material is limited due to restrictions on co-firing with the metal, for example, the difference in linear expansion coefficient from the semiconductor component is more than a certain value. The problem is that it cannot be reduced.

  The problem of the present invention is that even if the wiring structure to be incorporated becomes complicated or miniaturized as the semiconductor components to be mounted are miniaturized or highly integrated, these can be easily and accurately formed, and the periphery of the conductor element It is an object of the present invention to provide a method for manufacturing a ceramic wiring board that can substantially improve the flatness of a main surface of a substrate on which a pad for connecting terminals is formed with almost no deformation of the ceramic dielectric layer.

Means for Solving the Problems and Effects of the Invention

  In order to solve the above-described problems, a method for manufacturing a ceramic wiring board according to the present invention includes forming a via hole in a thickness direction of a unit plate material made of a densified ceramic material, and at least one main surface side of the unit plate material. Forming a conductor receiving recess for receiving a layered conductor element composed of a wiring portion, a surface conductor or a pad, filling a via hole with a metal material to be a via conductor, and filling the conductor receiving recess with a metal material forming the layered conductor element. A metal-filled unit plate material is prepared, and the metal-filled unit plate material is laminated in the plate thickness direction and bonded together, whereby a ceramic dielectric layer is formed by the unit plate material, and a metal conductor layer is formed by the layered conductor element. It is characterized in that a ceramic wiring board on which is formed is obtained.

  In the present invention, “densified ceramic material” refers to a ceramic material having a density of 85% or more at a relative density (the apparent density of the material (including voids) is normalized by the theoretical density). In the case of a fired ceramic produced by firing a powder raw material, it means a ceramic that has been densified above the relative density by firing. On the other hand, in the case of a glass material (including a composite material of a glass phase and a ceramic phase having a melting point higher than that (so-called glass ceramic material)), bubbles and the like are released by melting of the glass phase, and the above relative A ceramic with a density higher than the density.

  If the above method is adopted, it is of course possible to easily obtain a substrate structure in which one main surface of the layered conductor element coincides with the bonding surface of the ceramic dielectric layer in the layer thickness direction. The following beneficial and important technical effects can be obtained. That is, in the above-described method, via holes for forming via conductors and recesses for filling layered conductor elements are formed in a state of already densified ceramic material, and a metal material is formed in these via holes and recesses. To fill a metal-filled unit plate material. Of course, the metal-filled unit plate material does not need to be baked for densification like a conventional green sheet, so the subsequent steps (for example, densification of the filled metal material, heat treatment for bonding the unit plate material, etc.) ) Does not cause any significant shrinkage in dimension. Therefore, once the conductor receiving recesses and via holes are formed with high accuracy in the unit plate material, the accuracy can be inherited to the final wiring board without being affected by firing shrinkage as in the conventional process. In addition, since the layered conductor element including the wiring portion is already formed in the state of the already dense ceramic material, the width and thickness of the wiring portion can be freely controlled. For example, wiring with a large cross-sectional area for large currents can be formed densely. It is relatively easy to do. For example, if the wiring width of the wiring portion formed in the metal conductor layer is in a numerical range of 0.1 μm or more and 150 μm or less, conventionally, the variation in the wiring width in the substrate is 20 to 25 with respect to the average value of the wiring width. % Range. The cause is caused, for example, by the bleeding of the paste when the wiring pattern is formed by printing the metal paste, in addition to the above-described problem of firing shrinkage. However, by adopting the present invention, the variation in the wiring width in the substrate can be sufficiently kept within ± 10% with respect to the average value of the wiring width (for example, the average value of the wiring width is 50 μm or more). If it is 100 μm, the range of variation can be ± 5 μm to 10 μm).

  Further, according to the above method, two ceramic dielectric layers adjacent to each other through the metal conductor layer are bonded to each other at the bonding surface in a region where the layered conductor element of the metal conductor layer is not formed, It is possible to easily obtain a substrate structure in which a layered conductor element is formed at a bonding position of a ceramic dielectric layer, and one main surface of the layered conductor element is formed in a positional relationship with the bonding surface in the layer thickness direction. it can. As shown on the right side of FIG. 30, the wiring substrate of the present invention has two ceramic dielectric layers (50) adjacent to each other with a metal layered conductor element (30) forming a wiring portion, a surface conductor, or a pad interposed between the two layers. In the area | region in which a conductor element (30) is not formed, it couple | bonds by the flat bonding surface (10). At the bonding position of the ceramic dielectric layers (50), the layered conductor element (30) has one main surface (MPL) of the layered conductor element (30) in the layer thickness direction with the bonding surface (10). They are formed with the matching positional relationship. By adopting this structure, the ceramic dielectric layer hardly deforms around the conductor element (30) as compared with the conventional ceramic wiring substrate shown in the left of FIG. The flatness of the main surface can be greatly improved. The thin green sheet used in the conventional manufacturing method is too flexible and easily deforms even if a paste-like conductor pattern is sandwiched between them. It is absolutely impossible to obtain a structure in which the surface is flush with the surface (in many prior art documents describing the manufacturing process of a ceramic wiring board, the main surface of the wiring part and the ceramic dielectric layer Many of them are shown with the bonding surface in the same figure, but these are only convenient for visual understanding of the structure, and the actual substrate manufactured by laminating and firing green sheets It will be obvious to those skilled in the art that it does not assume such a form).

  The formation of the conductor accommodating recess and the via hole is relatively easy to perform with a dimensional accuracy on the order of micron or submicron by employing a micro processing technique such as a photolithography technique or laser processing. For example, in a conventional process using a ceramic green sheet, a photolithography technique is employed for forming a wiring printing mask, and laser processing is also employed for forming a via. In this case, at the stage of the ceramic green sheet, the accuracy of the positions and dimensions of the vias and wiring portions could be ensured to some extent. However, no matter how high-precision processing technology is adopted, simultaneous firing with metals with different shrinkage rates results in large variations in shrinkage, and the positions and dimensions of vias and wiring parts in the finally obtained wiring board There was absolutely no hope that the accuracy would be reflected.

  In addition, since the patterning scale of the above-mentioned micro processing technology is substantially in the submicron order, the width of the wiring part and the distance between the wirings can be considerably miniaturized only by considering the processing scale. However, in addition to the firing shrinkage of the ceramics described above, the wiring is excessive due to the printing accuracy using metal paste (ink), specifically the problem of paste bleeding and the pattern collapse when green sheets are stacked. If it is made finer, the occurrence frequency of disconnection or short circuit between adjacent wirings becomes very high. As a result, in the manufacturing process of the ceramic wiring substrate according to the conventional method, the wiring portion width and the distance between the wirings were fully reduced to about 100 μm.

  However, in the state of a densified ceramic material, it is possible to promote the miniaturization of the wiring portion to the limit of the above-described micromachining technology. That is, in order to form the wiring portion, it is only necessary to form the conductor accommodating recess as the wiring accommodating groove in the unit plate material, and arrange the wiring portion as the layered conductor element here, but it is highly densified with high rigidity. Since the wiring portion is accommodated in the concave portion formed in the ceramic plate (unit plate material), there is almost no fear that the wiring portion will be crushed even if they are laminated and bonded together. As a result, the wiring width and the wiring interval can be reduced as much as possible within the range allowed by the processing accuracy of the wiring receiving groove. As a result, both the wiring width of the wiring portion formed in the metal conductor layer and the width of the inter-wiring area (the width of the inter-line area located between the wiring receiving grooves adjacent in parallel) are both patterns on the green sheet. A level not possible with the conventional manufacturing method by printing / firing, that is, 0.1 μm or more and 70 μm or less can be realized, and this greatly contributes to further miniaturization or higher integration of the ceramic wiring board.

  Further, in the present invention, as one method of forming the wiring portion, it is possible to employ a step of filling the metal accommodating groove with a metal paste and subjecting this to secondary firing. However, even if the metal paste is used in the wiring pattern forming step, the problem of bleeding of the metal paste can be greatly suppressed due to the regulation effect by the wiring receiving groove. Furthermore, formation of layered conductor elements (wiring parts, surface conductors, pads) or via conductors using a plating method such as electroless plating can be easily realized (in the conventional process using green sheets, firing is performed after plating). Was practically impossible because of the need). By adopting this process, since no metal paste is used, the above-mentioned problems such as bleeding are essentially not generated, and the metal paste pattern is not required to be densified by secondary firing. Can be greatly simplified.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 schematically shows an example of a ceramic wiring board to which the present invention is applied in a sectional structure. The ceramic wiring substrate 2 includes a plurality of ceramic dielectric layers 50 made of a densified ceramic material, and a layered conductor element (hereinafter referred to by a reference numeral of the wiring part). A plurality of metal conductor layers 51 each having a structure (which may be described as an element 30) are alternately stacked. A terminal connection pad array 155 for connecting the semiconductor component 1 as an electronic component configured as an integrated circuit component is formed on the first main surface MP1 of the stacked body. Instead of the semiconductor component 1, another substrate such as an interposer may be connected as an electronic component.

  On the other hand, the semiconductor component 1 has component-side terminal pads 101, and the component-side terminal pads 101 are flip-chip connected to the board-side pad array 155 via the solder connection portions 102 to be surface-mounted. The component-mounted wiring board 40 is configured. On the other hand, in the ceramic wiring board 2, the layered conductor elements 30 included in the two metal conductor layers 51 separated by the ceramic dielectric layer 50 are formed so as to penetrate the ceramic dielectric layer 50 in the thickness direction. In addition, the via conductors 35 filling the via holes 35h are connected to each other. The via conductor 35 is coupled to a via receiving pad 154 formed in the metal conductor layer 51, or a surface conductor 56 functioning as a ground layer or a power supply layer. On the second main surface of the ceramic wiring board 2, a pad array 156 (for example, made of a BGA pad or a PGA pad) for mounting the board 2 itself on a connection destination board such as a mother board is formed.

  As shown in FIG. 2, two ceramic dielectric layers 50 adjacent to each other with the metal conductor layer 51 interposed therebetween are flat bonded surfaces 10 in regions where the layered conductor elements 30 of the metal conductor layer are not formed. It is combined with. The layered conductor element 30 is formed at the bonding position of the ceramic dielectric layers 50 in a positional relationship in which one main surface MPL of the layered conductor element 30 coincides with the bonding surface 10 in the layer thickness direction. . As described above, this structure greatly improves the flatness of the main surface of the substrate on which the terminal connection pad array 155 is formed, and the coplanarity of the pad array 155 in FIG. The occurrence of defects such as defects can be reduced.

  Returning to FIG. 2, in order to obtain a structure in which one main surface MPL of the layered conductor element 30 is aligned with the bonding surface 10 of the ceramic dielectric layer 50 in the layer thickness direction, as shown in FIG. It is necessary to prepare an element plate member 50 ′ to be 50, and to secure a conductor housing recess 30h for housing the conductor element 30 in advance on one main surface side of the element plate member 50 ′. As shown in FIG. 7, the conductor housing recess has a pad housing recess 154 h for housing a pad in addition to the wiring housing groove 30 h for housing the wiring portion, and further, although not shown, It is formed as a surface conductor accommodating recess for accommodating. In the following description, the wiring receiving groove 30h may be represented by a symbol and may be described as a conductor receiving recess 30h. Further, a via hole 35h for accommodating a via conductor is formed through the element plate 50 'in the thickness direction of the plate so as to communicate with the conductor receiving recess 30h (154h).

  The ceramic wiring board 2 can be manufactured by the method of the present invention, and the outline thereof is as follows. First, as shown in FIG. 16, the via hole 35h is formed in the thickness direction of the unit plate member 50 ′ made of a densified ceramic material, and the wiring portion 30 is formed on at least one main surface side of the unit plate member 50 ′. A conductor housing recess 30h for housing the layered conductor element 30 composed of the surface conductor 56 or the pad 154 is formed. Further, a metal material that becomes the via conductor 35 is filled in the via hole 35h, and a metal material that forms the layered conductor element 30 is filled in the conductor housing recess 30h, so that a metal-filled unit plate material 55 is produced (as described later, the conductor housing). The order of formation of the concave portion 30h and the metal material portion filled therein may be reversed). Then, as shown in FIG. 21 or FIG. 24, by laminating the unit plates 55 filled with metal in the thickness direction and bonding them together, a ceramic dielectric layer 50 is formed by the unit plates 50 ′, and the layered conductor element 30 is formed. Thus, the ceramic wiring board 2 on which the metal conductor layer is formed is obtained. The difference between the steps of FIG. 21 and FIG. 24 is that the metal-filled unit plate material 55 is bonded directly by thermocompression bonding or bonded via the adhesive layer 51, and the details will be described later.

  By adopting the above method, as shown in FIG. 2, it can be easily understood that a structure in which one main surface of the layered conductor element 30 is aligned with the bonding surface of the ceramic dielectric layer 50 in the layer thickness direction can be obtained. it can. In addition, a step of forming a via hole 35h for arranging the via conductor 35 and a recess 30h for filling the layered conductor element 30 in a state of the already densified ceramic material and filling the metal material therewith is adopted. Therefore, firing for densification after green sheet lamination is not performed as in the past. That is, the metal-filled unit plate material 55 to be laminated has already been shrunk in the lamination stage, and the subsequent steps (for example, densification of the filled metal material or heat treatment for bonding the unit plate materials) There is no significant dimensional reduction. Therefore, once the conductor accommodating recess 30h and the via hole 35h are formed in the unit plate member 50 'with high accuracy by various methods described later, the accuracy of the final wiring can be reduced without being affected by firing shrinkage. The substrate 2 can be taken over.

  For example, the wiring portion 30 is disposed in the wiring receiving groove 30h formed in the unit plate material 50 ′, but the wiring portion 30 is placed in the recess 30h in the state of a highly rigid and dense ceramic plate (unit plate material) 50 ′. Are stacked and bonded together, so that there is almost no fear of crushing at the time of stacking unlike a paste printing pattern. As a result, as shown in FIG. 3, the wiring width L and the wiring interval S (the width of the inter-line region 32 located between the plurality of wiring receiving grooves 39h adjacent in parallel) allow processing accuracy of the wiring receiving groove 30. Any number of reductions can be made within the range. As a result, the wiring width L and the width S of the inter-wiring region can both be 0.1 μm or more and 70 μm or less. This numerical value can hardly be realized by a conventional manufacturing method by pattern printing / firing on a green sheet, and greatly contributes to further miniaturization or higher integration of the ceramic wiring board 2.

  This will be described in more detail below. In recent years, there is a tendency for a ceramic wiring board to have a low profile, and the ceramic dielectric layer 50 (unit plate material 50 ') is also required to be as thin as 5 μm to 200 μm (preferably 50 μm to 100 μm). In the present invention, it is necessary to handle the unit plate material 50 ′ having the above-mentioned thickness independently when manufacturing the substrate, and at the time of manufacturing, in order to manufacture 10 to 20 wiring boards at a time, a plurality of unit plate members 50 ′ are vertically and horizontally. Handling in a large format in which substrates are arranged and integrated in a grid is required. Therefore, it is desirable to select a material having a rigidity as high as possible, that is, a material having a Young's modulus as high as possible (specifically, 10 GPa or more) so that it can sufficiently withstand the deflection displacement even in a large area.

  Specifically, the ceramic dielectric layer 50 (unit plate material 50 ') can be formed of a glass material plate. The glass material has an advantage that the melting point (or softening point) can be easily adjusted by the composition, and a thin plate having a small number of bubbles can be efficiently produced. Specifically, as shown in FIG. 4, the glass material plate 62 obtained by forming the molten glass 60 into a plate shape can be adjusted with high accuracy by adopting a roll forming method using a roll 61, for example. It can be carried out, has high production efficiency and is inexpensive.

As the glass material, specifically, silica-based glass whose skeleton component is silica dioxide (silica) can be used. In order to adjust the physical properties suitable for use as a ceramic dielectric layer, various glass additive components other than SiO ₂ can be blended. From the viewpoint of improving the fluidity of the molten glass and suppressing the residual of bubbles and the like, an alkaline metal oxide such as Na ₂ O, K ₂ O or LI ₂ O, B ₂ O ₃ (boric acid) The formulation is effective. However, if the former compounding amount is excessive, the dielectric constant characteristics of the glass may be deteriorated. If the B ₂ O ₃ compounding amount is excessive, the solubility of the glass in water increases, and water and aqueous solutions In some cases, glass elution in a subsequent process involving contact (for example, a plating process) becomes a problem.

  On the other hand, when an alkaline earth metal oxide such as BaO or SrO is added, the dielectric constant characteristics of the glass material can be improved. However, excessive addition tends to cause an increase in the linear expansion coefficient of the glass, and consequently an increase in the difference in linear expansion coefficient from the component side, which may lead to a connection failure due to thermal stress. Further, the increase in the glass softening point causes a significant decrease in fluidity, which may lead to problems such as residual bubbles.

In order to suppress an increase in the linear expansion coefficient of glass, it is effective to increase the content of the SiO ₂ component (for example, 70% by mass or more (including 100% by mass)) or to blend ZnO as a glass additive component. On the other hand, oxides of Ti, Zr or Hf are effective for improving the water resistance of the glass in addition to improving the dielectric constant characteristics of the glass, but excessive addition may decrease the fluidity due to an increase in the glass softening point. It may become noticeable and cause problems such as residual bubbles.

The silica-based glass material (oxide-based glass material) has a Si component content of 68% by mass or more and 99% by mass or less in terms of SiO ₂ , and a cationic component other than Si has a temperature range from room temperature to 200 ° C. In which an oxide having a larger linear expansion coefficient than SiO ₂ (hereinafter referred to as an oxide for adjusting the linear expansion coefficient) is formed of an oxide-forming cation, so that an average of 1 ppm / ° C. from room temperature to 200 ° C. By adopting a material whose linear expansion coefficient is adjusted to 1 ppm / ° C. or more and 7 ppm / ° C. or less, depending on the type and content of the oxide component (the linear expansion coefficient is larger than SiO ₂ ), the wire of the glass material The expansion coefficient can be freely adjusted to an arbitrary value of 1 ppm / ° C. or higher. As a result, in FIG. 1, the ceramic wiring substrate 2 can reduce the difference in coefficient of linear expansion from the mounted semiconductor component 1 as much as possible, and the pad array 155 on the substrate side via the solder connection portion 102. And the component-side terminal pad 101 can be greatly broken due to thermal shearing stress based on the difference in linear expansion coefficient, and the connection reliability can be improved. When the semiconductor component 1 is a Si semiconductor component (average linear expansion coefficient from room temperature to 200 ° C .: 3 ppm / ° C.), the linear expansion coefficient of the silica-based glass material is 1 ppm to 6 ppm, particularly 2 ppm / ° C. to 5 ppm / ° C. The following adjustment is desirable. On the other hand, when the semiconductor component 1 is a compound semiconductor component made of a group III-V compound lattice-matched with GaAs (for example, a GaAs-based next-generation high-speed CPU or MMIC (Monolithic Microwave Integrated Circuit)), the linear expansion coefficient of the semiconductor Is about 5-6 ppm / ° C., the linear expansion coefficient of the silica-based glass material is preferably adjusted to 4 ppm / ° C. or more and 7 ppm / ° C. or less.

Oxides having a larger linear expansion coefficient than SiO ₂ include alkali metal oxides (Na ₂ O, K ₂ O, Li ₂ O: 20 to 50 ppm / ° C.), alkaline earth metal oxides (BeO, MgO, CaO, Various examples such as SrO, BaO: 8 to 15 ppm / ° C., ZnO (6 ppm / ° C.), Al ₂ O ₃ (7 ppm / ° C.) can be exemplified, and they are appropriately selected in consideration of dielectric properties, melting point, and glass fluidity. do it. The content of SiO ₂ is adjusted to 68% by mass or more and 99% by mass or less (preferably 80% by mass or more and 85% by mass or less) so that the linear expansion coefficient is within the above range, and the balance is the above. The linear expansion coefficient adjusting oxide can be used. If the content of SiO ₂ is less than 68% by mass, it becomes difficult to keep the linear expansion coefficient of the glass material at 7 ppm / ° C. or less, and the difference in linear expansion coefficient from the semiconductor component cannot be sufficiently reduced. When it exceeds 99% by mass, the glass melting point increases, and the production cost of glass of high quality glass with small residual bubbles and the like increases. Moreover, it may be difficult to ensure the linear expansion coefficient of the glass material to 1 ppm / ° C. or higher.

The following are specific examples of glass compositions that can be employed in the present invention:
SiO _2: 80.9 _{wt%, B} 2 O 3: 12.7 _{wt%, Al} 2 O 3: 2.3 _wt%, Na 2 O: 4.0 _wt%, K 2 O: 0.04 wt% , Fe ₂ O ₃ : 0.03 mass%
Softening point: 821 ° C., linear expansion coefficient (average value from 20 ° C. to 200 ° C.): 3.25 ppm / ° C.

  On the other hand, the ceramic dielectric layer 50 (unit plate material 50 ') can also be constituted by a fired ceramic plate obtained by firing a powder ceramic raw material. As shown in FIG. 5, a known ceramic green sheet 130 (ceramic raw material powder is kneaded with a binder made of a polymer material, and further, a dispersant, a peptizer, a solvent, etc., and formed into a sheet shape. Is fired, the fired ceramic plate 64 can be easily obtained.

  In this case, the difference from the conventional process is that the ceramic green sheet 130 is fired as a single unit without being laminated in a state where the wiring pattern is not formed. As for the via hole, it is more desirable to drill the plate material after firing from the viewpoint of improving the accuracy of the dimensions and the formation position, but the via hole can be formed in the state of the ceramic green sheet 130. As in the conventional process, if firing is performed in a state where multiple layers are superimposed on a conductive pattern made of metal powder (paste), such as wiring parts, surface conductors, pads or vias, the firing shrinkage rate of ceramic and metal powder is reduced. Since it is significantly different, the deformation and misalignment of the pattern become significant due to the influence of non-uniform stress accompanying the difference in shrinkage rate. However, if the ceramic green sheet 130 is fired alone, the influence of the firing shrinkage difference with the metal powder is eliminated, and the accuracy of the dimensions or forming position is not comparable even if the via hole is formed and fired. (As a method of forming a via hole in the ceramic green sheet 130, punching or laser processing can be adopted).

  When adopting a fired ceramic plate, the specific material of the ceramic to be used is excellent in dielectric constant characteristics, and has rigidity (Young's modulus) that can withstand the handling described later even in a thin plate state, and has a linear expansion coefficient. As a relatively small material, a silicon nitride fired ceramic (about 3 ppm / ° C.) or an aluminum nitride fired ceramic (about 4 ppm / ° C.) can be preferably used. In this case, a composition having a main phase content of silicon nitride or aluminum nitride of 80% by mass or more and 99% by mass or less and the balance being a glass phase derived from the sintering aid component should be used. Is desirable. When the content ratio of the main phase exceeds 99% by mass, it becomes difficult to densify the ceramic. When the content ratio is less than 80% by mass, the grain boundary phase derived from the sintering aid (the glass phase ratio increases and the expected linear expansion Silicon nitride or aluminum nitride has a coefficient of linear expansion close to that of Si, and is effective in reducing the difference in coefficient of linear expansion from Si semiconductor components.

  Via holes and conductor accommodating recesses can be individually formed on the unit plate material made of a densified ceramic by various methods. First, a method for forming a via hole will be described. FIG. 8 shows a method using shot blast processing. That is, as in step 1, the main surface of the unit plate member 50 ′ is first covered with the mask member 201 having the via hole window 202. Next, as in step 2, shot blasting is performed to project the abrasive grains 162 onto the covered main surface, and a via hole 35 h is formed with a pattern corresponding to the via hole window 202. The ceramic grinding speed by shot blasting is considerably higher than the chemical etching speed described later, and there is an advantage that the via hole can be processed quickly. The mask material 201 can be made of a polymer material. By using a photosensitive polymer material or a photoresist, a fine via hole pattern can be easily formed by a well-known photolithography technique.

  By using a shot blast nozzle 160 having a projection area that can include a plurality of via hole windows 202, a large number of via holes 35h can be efficiently formed. Further, when the wear of the mask material 201 progresses extremely quickly during the shot blasting process, the mask is significantly consumed before the via hole 35h having a sufficient depth is formed, and the via hole window 202 is enlarged and the expected result is obtained. A via hole 35h having an opening size cannot be obtained. Therefore, the mask material 201 is preferably composed of a polymer elastic material that is less likely to wear than a ceramic material (that is, a material that easily absorbs collisions of abrasive grains due to its own elastic deformation). As a commercially available polymer material for such a mask material, ALPHA202J40 (Nichigo Morton Co., Ltd .: alkali development dry film (acrylic): layer thickness of about 40 μm) can be exemplified.

  On the other hand, FIG. 9 shows an example in which a via hole is formed by etching. That is, the main surface of the unit plate member 50 ′ is covered with the mask material 203 having the via hole window 204, and the covered main surface is etched to form a via hole 35 h with a pattern corresponding to the via hole window 202. . Etching can be performed by chemical etching, and the etchant is selected according to the material of the unit plate material 50 '. For example, in the case of a silica-based glass material, a hydrofluoric acid-based etchant can be used. The mask material 203 can be made of a well-known photoresist, and the hole window 202 can be patterned using a normal photolithography technique. Although the drilling speed of via holes is smaller than that of shot blasting, there is an advantage that via holes can be formed simply by immersing the unit plate material 50 ′ in an etchant bath, and the advantage that a large area unit plate material 50 ′ can be collectively processed. There is also.

A via hole 35h can be drilled in the unit plate member 50 ′ with a laser LB. In this case, as a usable laser LB, for example, a carbon dioxide laser can be suitably employed in the present invention because the equipment is relatively simple and the processing efficiency is high. On the other hand, when finer processing is desired, it is effective to use a laser having a shorter oscillation wavelength (for example, a YAG laser, an excimer laser, or a semiconductor laser) so that the laser beam diameter can be narrowed down. In order to promote heat absorption from laser light and increase processing efficiency, it may be preferable to add a coloring pigment such as Cr ₂ O ₃ to the ceramic constituting the unit plate member 50 ′ (particularly, , When using highly translucent glass materials).

  Next, a method for forming the conductor housing recess will be described. Basically, a method similar to the formation of a via hole can be adopted. FIG. 11 shows a method using shot blasting, in which the main surface of the unit plate material 50 ′ is covered with a mask material 201 ′ having a concave pattern window 202 ′, and grinding abrasive grains 162 are applied to the covered main surface. The shot blasting process to project is performed, and the conductor accommodating recessed part 30h corresponding to the recessed part pattern window 202 'is formed. Thereby, the process of the conductor accommodating recessed part 30h can be performed rapidly. Again, it is desirable that the mask material 201 ′ is made of a polymer elastic material that is less likely to wear than a ceramic material during the shot blasting process.

  FIG. 12 shows an example in which the conductor housing recess 30h is formed by etching. That is, the main surface of the unit plate member 50 ′ is covered with the mask material 203 ′ having the concave pattern window 204 ′, and the covered main surface is etched, so that the conductor is formed in a pattern corresponding to the concave pattern window 204 ′. A housing recess 30h is formed. Only by immersing the unit plate material 50 ′ in the etchant bath, there is a convenience that can form the conductor housing recess 30 h including a complicated wiring pattern. In addition, since the conductor containing recess 30h is shallower than the via hole 35h, the etching allowance is small, and the large area unit plate material 50 'can be processed at the same time, and there is an advantage that the processing can be performed more efficiently than when the via hole is formed by etching. is there.

  In addition, when forming a via hole and the conductor accommodating recessed part connected to this in the same unit board | plate material 50 ', as shown in FIG. 6, it is preferable to form a via hole first, as shown in FIG. That is, it is preferable to form a mask material having a concave pattern window on the unit plate material after the formation, and to form the conductor containing concave portion using the mask material. As shown in FIG. 7, the opening area of the via hole 35h is smaller than the opening area of the conductor receiving recess (here, the pad receiving recess 154h), and if the conductor receiving recess is formed first, the via hole 35h opening at the bottom thereof. When the mask material is formed, the mask material is recessed at the position of the conductor housing recess, and it becomes difficult to perform focusing when forming the via hole window by photolithography. Further, when the mask material is removed, a part of the mask material tends to remain in the vicinity of the bottom inner edge of the conductor accommodating recess, which may cause contamination.

  FIG. 13 shows an example in which the conductor accommodating recess 30h is formed in the unit plate member 50 'by the laser LB. Although there is an advantage that the wiring pattern can be engraved without a mask by scanning with the laser LB, since it takes time to process a complicated wiring pattern, it is suitable for manufacturing a substrate sample or the like individually.

  FIG. 15 shows a method for forming a conductor receiving recess using a marking member. In this case, the unit plate material 50 'needs to be made of a glass material. Specifically, the unit plate member 50 ′ is heated to a temperature higher than the softening point of the glass material, and in this state, the marking member 205 having the convex pattern 206 corresponding to the conductor housing concave portion 30h is replaced with the softened unit plate member 50 ′. By pressing against the main surface, the convex portion pattern 206 is imprinted and transferred to form the conductor containing concave portion 30h. The marking member 205 can be made of metal, and can be easily formed even with the convex pattern 206 corresponding to fine wiring by combining photolithography and etching.

  In each of the methods described above, a part of the prepared ceramic plate is removed or deformed to form the conductor receiving recess, but a new ceramic layer is added on the main surface of the ceramic plate. It is also possible to form a conductor housing recess. FIG. 14 shows an example. A unit plate material 50 ′ having a conductor receiving recess 30h can be obtained by adding a recess forming dielectric layer 50b having a constant thickness on the main surface of the ceramic plate 50a in a state where the conductor receiving recess 30h is patterned. it can. According to this method, there is an advantage that it is not necessary to form a conductor receiving recess in the subsequent process such as shot blasting or etching. Specifically, the concave portion forming dielectric layer 50b is formed by printing a ceramic powder paste coating layer 50b ′ on the ceramic plate 50a in a pattern in which the conductor containing concave portion 30h is patterned, and further forming the coating layer 50b ′. It can be formed by secondary firing. In this case, it is desirable to use a material that can be fired at a lower temperature than the ceramic plate 50a for the recess forming dielectric layer 50b (ceramic powder paste) from the viewpoint of preventing deformation of the ceramic plate 50a. For example, when the ceramic plate 50a is a glass material plate, the recess forming dielectric layer 50b can be formed of a glass material having a lower softening point. Further, when the ceramic plate 50a is a fired ceramic such as the aforementioned silicon nitride ceramic or aluminum nitride ceramic, the recess forming dielectric layer 50b is made of a glass material that is softened at a temperature lower than the melting point of the fired ceramic. Good. In the case where the recess forming dielectric layer 50b is configured as a glass material layer as described above, the glass material layer can be used as an adhesive layer for bonding the unit plate members 50 together.

  On the other hand, as shown in Step 1 of FIG. 28, the concave portion forming dielectric layer can also be formed by a densified ceramic plate 50b formed by patterning the through portion 30h to be a conductor accommodating concave portion. . The ceramic plate 50b is bonded to the ceramic plate 50a (via hole 35h) to be the main body of the dielectric layer 50 by thermocompression bonding as shown in step 2a, or as shown in step 2B. A unit plate material 50 ′ is obtained by bonding through the adhesive phase 1. According to this method, since the conductor housing recess is formed as the through portion 30h in the densified ceramic plate 50b, the formation accuracy of the conductor housing recess can be further improved.

Next, the formation mode of the layered conductor element and the via conductor will be described.
First, as shown in FIG. 17, the layered conductor element 30 is filled with the metal powder 130 as a constituent material in the conductor containing recess 30 h formed in the ceramic dielectric layer 50 (unit plate material 50 ′). The ceramic dielectric layer 50 may be formed by secondary firing at a temperature lower than the melting point of the ceramic constituting the ceramic dielectric layer 50. The via conductor 35 is filled with the metal powder 130 as a constituent material in the via hole 35h, and then subjected to secondary firing at a temperature lower than the melting point of the ceramic constituting the ceramic dielectric layer 50 (unit plate member 50 ′). It can be formed as formed. In FIG. 17, the secondary firing is performed using a firing furnace F.

  In forming the layered conductor element 30 and the via conductor 35, the process of forming the pattern with the metal paste (metal powder) 130 and firing the pattern is the same as the conventional process of forming the pattern with the metal paste on the green sheet and firing. At first glance it looks similar. However, in the conventional process, since simultaneous firing of the ceramic and the metal paste was premised, in the case of a ceramic having a high firing temperature such as alumina, silicon nitride, or aluminum nitride, a refractory metal that does not melt or flow out even at the firing temperature (for example, , Mo, W, etc.) must be used as the conductor material, or conversely, when a highly conductive metal (such as Cu) is to be used, the firing temperature is adjusted so that simultaneous firing is possible. The material selection was extremely limited, such as the need to use ceramic as the material for the dielectric layer. In the former case, the electrical conductivity of the conductor tends to be difficult, and in the latter case, simultaneous firing with metal and linear expansion coefficient adjustment (specifically, to reduce the difference in linear expansion coefficient with semiconductor parts as much as possible) ) Is generally difficult to achieve. However, by using an already densified ceramic plate as the unit plate material, the temperature of the secondary firing of the metal powder 130 can be freely set within a range below the melting point of the ceramic. As a result, the range of ceramic or metal material selection can be greatly expanded, and the optimization of the linear expansion coefficient of the ceramic and the improvement of the electrical conductivity of the conductor can be easily achieved at the same time. become.

In addition, the following effects can be achieved by adopting metal plating:
(1) Since the conductor to be formed is dense from the beginning and the conductor shrinkage does not become a problem as in the case of using the secondary firing of the metal paste, it is possible to increase the bonding force of the conductor to the conductor receiving recess and the inner surface of the via hole. .
(2) The plating process has an advantage that it is easier to obtain a conductor having a low carbon content because there is little interposition of a substance that becomes a carbon contamination source such as an organic binder.

  A conventional green sheet is too low in rigidity, and it is impossible to form a wiring pattern or the like directly on the green sheet by plating in consideration of shrinkage due to firing. That is, despite the fact that it is a ceramic wiring board, it is possible to form the layered conductor element 30 (the same applies to the via conductor 35) by metal plating as in the case of the organic wiring board. Is one of the major features of the present invention.

  On the other hand, as shown in FIG. 18, the layered conductor element 30 is composed of a metal plating layer 30 (P) filled in a conductor containing recess 30h formed in the ceramic dielectric layer 50 (unit plate material 50 ′). You can also Further, the via conductor 35 may be a metal plating layer 35 (P) filled in the via hole. In this case, the conductor is not limited to a metal that can be plated, but is still not restricted by the firing temperature or melting point of the ceramic. In this case, it is preferable to perform the plating by electroless plating because it is not necessary to form a plating conduction path on the unit plate member 50 '. Considering the ease of electroless plating, it is preferable to employ electroless Cu plating or electroless Ni plating, and it is most desirable to employ electroless Cu plating in view of improving the conductivity of the conductor.

  Specifically, as in step 1, a unit plate member 50 'having conductor receiving recesses 30h or via holes 35h is prepared, and the surface is subjected to activation treatment as pretreatment. Next, as shown in Step 2, a plating resist layer 207 made of a photoresist is formed on the surface of the unit plate member 50 ′ excluding the portion to be plated such as the conductor receiving recess 30 h or the via hole 35 h. Then, as shown in step 3, if the electroless plating layer 30 (P) or 35 (P) is filled and formed in the conductor containing recess 30h or the via hole 35h and the plating resist layer 207 is removed as shown in step 4, A layered conductor element 30 or a via conductor 35 made of a metal plating layer can be obtained. In addition, without forming the plating resist layer 207, a metal plating layer may be formed on the entire surface of the unit plate member 50 ′, and thereafter, the plating layer formed in a region other than the portion to be plated may be removed by etching. .

  In FIG. 17, both the layered conductor element 30 and the via conductor 35 are formed by metal paste filling and secondary firing. In this method, when the conductor containing recess 30h is filled with the metal paste 130, the via hole 35h is simultaneously filled with the paste, and further subjected to secondary firing, whereby the layered conductor element 30 and the via conductor 35 are obtained collectively. There is an advantage that can be. In FIG. 18, both the layered conductor element 30 and the via conductor 35 are formed by metal plating (specifically, electroless plating), and the layered conductor element 30 and the via conductor 35 are collectively formed by plating. There are benefits that can be obtained. However, it is also possible to combine both methods, that is, one of the layered conductor element 30 and the via conductor 35 is formed by metal paste filling and secondary firing, and the other is formed by metal plating. For example, if the aspect ratio of the via hole (ratio of hole depth to hole diameter) is large and filling by plating is difficult, fill the via hole with the via conductor first (for example, filling with a metal paste and performing secondary firing), then A method of filling the conductor housing recess with a metal plating layer may be employed.

  On the other hand, it is possible to employ a process as shown in FIG. That is, as shown in step 1, the densified ceramic plate material 50a is prepared in a state in which the via hole 35h has been formed before the conductor housing recess 30h is formed. Next, as shown in step 2 and step 3, the via conductor 35 is filled into the via hole 35h of the ceramic plate 50a, and the layered conductor element 30 is formed to protrude on the main surface of the ceramic plate 50a. In the present embodiment, in Step 2, the mask MK is overlaid on the ceramic plate material 50a, and the metal paste 130 is applied to the layered conductor element 30 and the via hole 35h using a mask window formed in a pattern corresponding to the layered conductor element 30. As shown in step 3, the via conductor 35 and the layered conductor element 30 are collectively formed by secondary firing.

  Next, as shown in step 4 and step 5, the recess forming dielectric layer 50b is formed so as to cover the background region of the layered conductor element 30 on the main surface. In the present embodiment, as shown in Step 4, ceramic powder (for example, glass frit) is applied to the background region of the layered conductor element 30 using a mask (not shown) to form the ceramic coating layer 50b ′. As shown in FIG. 5, this is fired to obtain a recess forming dielectric layer 50b (the integrated recess forming dielectric layer 50b and the ceramic plate 50a are unit plates 50 'and thus the ceramic dielectric layer). 50 will be formed). As a result, the conductor accommodating recess 30h can be formed in such a manner that the boundary surface with the layered conductor element 30 is the inner side surface and the main surface of the ceramic plate member 50a is the bottom surface. According to this method, shot, blasting, and etching are not involved, and in this case, for example, by combination of pattern printing and secondary firing, the ceramic powder is softened and fluidized at a lower temperature than the metal constituting the layered conductor element 30. Glass material powder may be used. When such a glass material powder is applied including the surface of the layered conductor element 30 and fired at a temperature at which the powder melts, the fluidized glass is repelled on the surface of the layered conductor element 30 with low wettability, and the layered The surface of the conductor element 30 can be exposed in a self-regulating manner. In this case, a mask is not necessary for forming the recess forming dielectric layer 50.

  In the present invention, as described above, the layered conductor element 30 is formed in a dense state on the unit plate material 50 ′ instead of a paste, regardless of whether the metal paste is formed by secondary firing or metal plating. Then, since they are laminated and bonded in the state of the metal-filled unit plate material 55 (FIG. 21), there is no fear of crushing at the time of lamination as in the paste print pattern formed on the green sheet. Therefore, even when the layered conductor element 30 is formed using a metal paste, the metal paste to be used does not have to have a strong viscosity, and becomes a carbon contamination source for the finally obtained layered conductor element 3. The amount of organic binder can be greatly reduced. In particular, as shown in FIG. 17, when the step of filling the conductor containing recess 30 h with the metal paste 130 is adopted, the flow of the metal paste 130 can be regulated by the recess wall, so a metal paste containing no organic binder is used. It is no longer impossible to use. On the other hand, when metal plating is adopted, the metal paste itself is not used, so that carbon contamination by an organic binder or the like does not occur essentially. As a result, it is possible to greatly reduce the carbon content of the obtained layered conductor element 30, specifically to 100 ppm or less. Thereby, the electrical conductivity of the layered conductor element 30 can be greatly improved.

  Further, since the layered conductor element 30 does not need to be fired simultaneously with the constituent ceramic of the unit plate member 50 ′, an inorganic filler that has been conventionally added to adjust the difference in shrinkage coefficient with the ceramic, etc., even when a metal paste is used. The amount of can be greatly reduced. When metal plating is employed, the inorganic filler is essentially not involved in the process. Therefore, it is possible to easily obtain a final layered conductor element having a volume fraction of the contained inorganic filler component of less than 5%. This brings about a very remarkable effect in improving the conductivity of the layered conductor element. However, for the purpose of reducing the difference in coefficient of linear expansion between the layered conductor element 30 and the ceramic constituting the unit plate member 50, it is of course possible to add an inorganic filler component up to about 20% by volume as usual.

  Specific materials for via conductors or layered conductor elements include electrical conductivity, cost, secondary firing at a relatively low temperature (eg, 200 ° C. or higher and 1200 ° C. or lower), or easy electroless plating. In view of the above, it is preferable to adopt a Cu-based metal (metal containing Cu as a main component: “main component” is 50% by mass or more) or an Ag-based metal (metal containing Ag as a main component). . In particular, when a wiring portion having a wiring width and a width of a region between wirings of 150 μm or less (particularly 70 μm or less) is formed by secondary firing of a metal paste (powder), the average particle size of the metal powder is 2 μm or more and 3 μm. You should adopt one. As described above, in the present invention, since the carbon content and the inorganic filler can be easily reduced, a layered conductor element or via having a composition substantially similar to pure Cu (that is, the Cu content is 95% by mass or more). Conductors can also be obtained easily. As a result, the electrical conductivity of the layered conductor element, particularly a fine wiring portion, can be greatly improved, and the signal transmission efficiency in the high frequency region (especially 1 GHz or more) in which the effective area of the energized region is reduced by the skin effect. Can greatly increase.

  Next, in the present invention, after forming the layered conductor element 30 on the unit plate member 50 ′ (dielectric layer 50) made of a densified ceramic as a retrofit, the layered conductor element 30 is laminated to form a substrate. If the coupling force between the conductor element 30 and the unit plate member 50 ′ is insufficient, the layered conductor element 30 is likely to fall off even with a slight impact when the conductor-filled unit plate member 55 is handled for bonding. , Cause the failure. In particular, when the step of filling the metal containing recess 30h with the metal paste and performing secondary firing is adopted, the paste is fired and contracted, so that the layered conductor element 30 and the inner side surface of the conductor containing recess 30h are obtained. A gap may occur, and it can be said that insufficient bonding force between the layered conductor element 30 and the unit plate member 50 ′ is more likely to occur.

In order to improve the bonding force, it is desirable to roughen the contact surface between the layered conductor element 30 and the unit plate member 50 ′ (ceramic dielectric layer 50) as shown in FIG. The surface roughening treatment can be performed by etching, shot blasting, or the like after the conductor accommodating recess 30h is formed in the unit plate member 50 ′ and before the conductor is filled. For etching, either chemical etching or gas phase etching (for example, ion etching or plasma etching) may be used. In the case of chemical etching, an etchant is appropriately selected depending on the material of the unit plate material 50 ′ (ceramic dielectric layer 50). (For example, when a glass material mainly composed of SiO ₂ is used, a hydrofluoric acid-based etchant is effective for surface roughening treatment).

  In FIG. 2, the surface roughening process is performed on both the bottom surface and the inner surface of the conductor housing recess 30h. However, if the etching directivity is high and the inner surface roughening process is difficult, such as vapor phase etching, the bottom surface Etching may be applied only to. In addition, when the conductor accommodating recess 30h is formed by shot blasting, the inner surface of the recess may already be in the desired roughened state, and in this case, the roughening process can be omitted. The degree of surface roughness needs to be adjusted appropriately so that the required anchor effect can be obtained according to the dimensions of the layered conductor element 30 (width and height in the case of a wiring portion). When the width is 30 μm or more and 100 μm or less, the roughness of the inner surface of the concave portion after surface roughening is preferably adjusted to about 0.1 μm or more and 1 μm or less at the arithmetic average roughness Ra specified in JIS: B0601.

  On the other hand, the via conductor 35 may have insufficient bonding strength with the unit plate member 50 ′ (dielectric layer 50) for the same reason as the layered conductor element 30. Therefore, as shown in FIG. 2, it is effective to subject the inner surface of the via hole 35h to surface roughening. However, in the case of the via hole 35h having a small diameter (for example, 50 μm or more and 100 μm or less) and a large aspect ratio (for example, 1.5 or more and 3 or less), it may be difficult to roughen the inner surface. Therefore, as an alternative method, as shown in FIG. 26, the via hole 35h has a diameter larger than the opening diameter to the main surface of the ceramic dielectric layer 50 (unit plate member 50 ′) at a midway position in the hole depth direction. It can be formed as having a large diameter portion FP. As a result, it is possible to effectively prevent problems such as the via conductor 35 filled in the via hole 35h falling off from the opening of the unit plate member 50 '.

  Specifically, one or more convex curved surfaces (FIG. 26) or two or more are provided in the hole depth direction so that the inner circumferential surface of the via hole 35h bulges outward in the radial direction at an intermediate position in the hole depth direction. (FIG. 27) It can have a formed shape. Such a curved surface can be formed by a relatively simple method, and the effect of preventing the via conductor 35 from falling off is also remarkable. The specific method will be described below.

  As shown in FIG. 26, the unit plate member 50 ′ can be formed by firing a single green sheet 150 in which ceramic raw material powder is bonded with a polymer material binder. A spherical body 151 made of a material that evaporates or decomposes during firing (for example, an acrylic resin ball) is embedded in the via hole formation position of the green sheet 150 and fired. Then, after the spherical body 151 disappears during firing, a hole having a spherical inner surface remains and can be used as the via hole 35h. If the spherical body 151 is embedded in the highly flexible green sheet 150, the ceramic plate having the via hole 35h is obtained from the beginning by firing, and thus the process is simple.

  On the other hand, when the via hole is formed by laser processing, the via hole 35h having a large diameter portion on the inner surface can also be formed by adjusting the irradiation condition of the laser beam on the ceramic plate. For example, when performing laser irradiation while performing focus tracking so that the bottom of the hole being formed is always in focus, the power of the laser beam can be increased once at a position in the depth direction of the hole and then powered down again. In this case, the amount of ceramic to be burned out becomes a maximum at an intermediate position in the depth direction, so that a large diameter portion can be formed at this position.

  On the other hand, instead of adjusting the intensity of the laser beam itself, as shown in FIG. 27, the focal position is such that the laser beam LB is deeper than the surface of the ceramic plate 50 ′ (ie, overfocus). There is also a method of obtaining a via hole 35h in which a large-diameter portion is formed on the inner surface by intentionally shifting. Specifically, when processing is performed with the focal point of the laser beam LB fixed to a position at a certain depth from the main surface of the ceramic plate 50 ′, the laser beam LB first appears as the recess 251 is dug. It becomes overfocus, and after changing to the just focus state, it changes to the under focus state. Since the concentration of the laser power on the material is greatest at the just focus position, the large diameter portion FP can be formed at the position. In order to obtain this effect remarkably, it is effective to set the focal length of the irradiation optical system of the laser beam LB to be somewhat short (that is, to reduce the depth of focus). In FIG. 27, the large-diameter portion FP is formed using the overfocus while the focal position of the laser beam LB is moved stepwise to form via holes 35h having a plurality of large-diameter portions FP in the hole depth direction. Forming.

  Next, in FIG. 2, in order to increase the bonding force between the layered conductor element 30 and the ceramic dielectric layer 50, the layered conductor element 30 is compressed in the conductor housing recess 30 h formed in the ceramic dielectric layer 50. It is also effective to fill them. Specifically, as shown in Step 3 of FIG. 3, the layered conductor element 30 is disposed in the conductor receiving recess 30h so as to protrude from the opening of the recess, and in this state, the layered conductor element 30 is By press-fitting the protrusion 30b into the conductor housing recess 30h, the layered conductor element 30 can be filled in the conductor housing recess 30h in a compressed state. In particular, in the method of obtaining the layered conductor element 30 by filling the metal paste 130 into the conductor housing recess 30h and performing secondary firing, the layered conductor element 30 and the inner surface of the conductor housing recess 30h are formed by firing shrinkage of the metal paste 130. However, if the conductor obtained after firing is crushed by compression, the layered conductor element 30 spreads in the recess, so that the gap can be eliminated.

  In order to form the layered conductor element 30 in the conductor housing recess 30h so as to protrude from the recess opening, the metal paste 130 is raised so as to protrude from the opening of the conductor housing recess 30h, as shown in step 1 of FIG. It is effective to fill them. For example, if the mask MSK having a window corresponding to the conductor receiving recess 30h is overlaid on the main surface of the unit plate member 50 ′, and the recess 30h is filled with the metal paste 130 through the window, the metal paste 130 is applied to the mask MSK. The height corresponding to the thickness can be raised. The raised height is adjusted so that the protrusion 30b remains even after firing in consideration of the shrinkage of the metal paste 130 during secondary firing. Then, if the mask MSK is removed as in step 2 and further subjected to secondary firing as in step 3, the layered conductor element 30 having the protruding portion 30b from the recess opening can be obtained.

  On the other hand, FIG. 25 shows another method that does not use the mask MSK. That is, the metal paste 130 which is filled with the conductor containing recesses 30h and is still excessive is applied to the entire main surface of the unit plate member 50 'including the peripheral region of the conductor containing recesses 30h. In this state, when the secondary firing is performed at a temperature higher than the melting temperature of the metal paste, the molten metal is repelled on the surface of the ceramic unit plate material 50 'having low wettability and is self-adjusting while being gathered by the surface tension. Gather in the conductor housing recess 30h. If it cools after that, the layered conductor element 30 which has the protrusion part 30b of the height corresponding to the metal paste applied excessively can be obtained.

  If compression of the layered conductor element 30 can cause lateral crushing displacement beyond the clearance with the inner surface of the conductor housing recess 30h, the compressive force from the inner surface of the conductor housing recess 30h can be increased, The fixing force of the layered conductor element 30 into the layered conductor element 30 is further increased. Since the upper surface side of the layered conductor element 30 in the conductor housing recess 30h is open, it is desirable that the layered conductor element 30 is compressed with plastic deformation.

Finally, a method for laminating and bonding the metal-filled unit plate materials 55 obtained as described above will be described.
In FIG. 2, adjacent ceramic dielectric layers 50 are directly bonded together by thermocompression bonding. As shown in FIG. 21, this structure is obtained by directly bonding the metal-filled unit plate material 55 by thermocompression bonding. Specifically, as shown in step 1, a plurality of the metal-filled unit plate members 55 are laminated to form a laminate, and then, as shown in step 2, the laminate is heated while being pressurized. In the present embodiment, a hot press is used in which the laminate is heated between punches 210 and 210 while being heated in a heating furnace.

In this case, the heating temperature and the applied pressure are appropriately set according to the material of the ceramic constituting the unit plate member 50. Specifically, the metal constituting the layered conductor element 30 or the via conductor 35 of the unit plate material 55 filled with metal does not melt, and the ceramic constituting the unit plate material 50 ′ has thermal diffusion activity or softening that is convenient for bonding. Select the temperature range where this occurs. For example, when the metal is mainly composed of Cu (for example, pure copper) and the unit plate member 50 ′ is made of glass mainly composed of SiO ₂ , the pressure bonding temperature is set to 500 ° C. or higher and lower than the melting temperature of the glass. It is good. When the temperature is less than 500 ° C., a good adhesion state cannot be obtained between the unit plate members 50 ′, and the conductors between the adjacent metal-filled unit plate members 55 (for example, the via conductor 35 and the layered conductor element 30) are electrically connected. The connection status may not be secured. Further, since the content of glass additive components other than SiO ₂ inevitably increases, the required physical properties (particularly, the linear expansion coefficient characteristic ratio close to semiconductor components and the dielectric constant characteristics required for high-frequency wiring boards) May not be obtained.

  As shown in FIG. 21, in the metal-filled unit plate 55, the layered conductor element 30 can be provided with a protruding portion 30b protruding from the conductor housing recess 30h by the method already described. In this case, thermocompression bonding can be performed while compressing the layered conductor element 30 in such a manner that the protruding portion 30b is pushed into the conductor housing recess 30h. Thereby, the electrical connection between the layered conductor element 30 and the via conductor 35 can be more reliably performed. In addition, when moderate softening has arisen in the ceramic which comprises unit board 50 ', the protrusion part 30b of the layered conductor element 30 can also be made to bite into the main surface of the softened unit board | plate material 55 used as a bonding destination. . As a result of this biting, the main surface of the layered conductor element 30 may not coincide with the main surface of the unit plate material 55 that becomes the bonding surface.

  As described above, the method using thermocompression bonding allows the layered conductor element 30 and the via conductor 35 to be in direct contact with each other in the laminated state (or the subsequent heating / pressurized state), and there is no concern about the presence of an adhesive layer or the like. There is an advantage that a good conduction state can be reliably formed between the two. Naturally, the application of an adhesive layer is also unnecessary, contributing to a reduction in man-hours.

  Next, as shown in FIG. 22, the adjacent ceramic dielectric layers 50 can be bonded together via the adhesive layer 11. The structure is obtained by bonding the metal-filled unit plate material 55 through the adhesive layer 11. In this aspect, instead of requiring an application step of the adhesive layer, heating at a high temperature such as thermocompression bonding is not required, so even when the unit plate material 50 ′ is made of a high melting point ceramic, for example, There is an advantage that there are few restrictions on adhesion (when glass or hot melt type adhesive is used, some heating is required, but much more than the melting temperature or softening point of the ceramic constituting the unit plate 50 '. Can be bonded at low temperature).

  The adhesive layer 11 can use an organic adhesive such as an epoxy resin adhesive, but can also use an inorganic adhesive, particularly from the constituent ceramic of the ceramic dielectric layer 50. If it is made of a glass material having a low melting point, a strong and heat-resistant adhesive state can be easily obtained.

  What should be noted when forming the adhesive layer 11 is that the adhesive layer 11 itself is insulative, so that the adhesive is applied to the surface of the layered conductor element 30 and the via conductor 35 exposed on the main surface of the unit plate member 50 ′. If it adheres, there is a possibility that conduction between the two after bonding may be hindered. There are several ways to solve this problem. First, in order to avoid forming the adhesive layer 11 on the surface of the layered conductor element 30 or the via conductor 35 as much as possible, an adhesive (in the case of a glass material) is selectively applied only to the background region of the layered conductor element 30 or the via conductor 35. Glass material powder paste or slurry). In order to ensure the conduction after bonding, the layered conductor element 30 is disposed so as to protrude from the main surface of the unit plate member 50 ′, and the adhesive layer 11 is applied within the thickness range of the protrusion allowance. desirable.

  In order to form the adhesive layer 11 only in the background region of the layered conductor element 30 or the via conductor 35, a method using a mask that covers only the layered conductor element 30 or the via conductor 35 can be considered. It is quite difficult to cover up exactly. Therefore, as a simpler method, an adhesive is applied over the entire main surface of the unit plate member 50 ′ including the regions of the layered conductor element 30 and the via conductor 35, and then remains on the layered conductor element 30 and the via conductor 35. There is a method of scraping off the excess adhesive using a squeegee SKG. When a glass material is used as an adhesive layer, the average particle size of the glass powder to be used is sufficiently smaller than the line width (for example, so that the paste or slurry of the glass material powder can be accurately filled in a narrow space between the wiring portions (for example, (1/10 or less) It is desirable to adjust.

  In the above method, particularly when a glass material is used, glass having a melting point lower than that of the layered conductor element 30 and the via conductor 35 is used, and at the time of bonding (or prior to bonding), the adhesive layer 11 made of the glass material is temporarily formed. It is effective to melt. Since the glass melt having low wettability with the metal surface is repelled on the surface of the layered conductor element 30 or the via conductor 35, poor conduction due to glass residue can be effectively prevented. If necessary, a small amount of glass remaining on the surface of the layered conductor element 30 or the via conductor 35 is lightly etched with an etching solution such as hydrofluoric acid before the metal-filled unit plate material 55 is laminated. May be removed.

When a glass material mainly composed of SiO ₂ is used as an adhesive layer, the blending amount of the soldering material such as alkali metal oxide, boric acid or lead oxide is increased (for example, 20% by mass to 50% by mass in total: in particular Lithium oxide is effective in improving fluidity), but is effective in increasing the fluidity of the glass during melting and preventing the layered conductor element 30 and via conductor 35 from remaining on the surface. Further, when one or more metal oxides of Mo, W, Ni, Co, Fe and Mn are added within a range of, for example, 10% by mass (desirably 1% by mass or more), the glass at the time of melting The effect of improving fluidity can be further enhanced.

  On the other hand, there may be a method in which the bonding is performed with the adhesive layer 11 remaining on the surface of the layered conductor element 30 or the via conductor 35 and the insulating state by the adhesive layer 11 is eliminated at the time of the bonding. That is, as shown in FIG. 24, the layered conductor element 154 is arranged on one bonding surface side of the two unit plate members 50 ′ to be bonded, and the adhesive layer 11 is not arranged with the arrangement region of the layered conductor element 154. Two unit plate members 50 ′ are overlapped with each other so as to extend over both of the regions. Then, by heating in this state, the layered conductor element 154 that is adjacent to the adhesive layer 11 and the via conductor 35 on the unit plate member 50 ′ side are heated to the layered conductor element 154 or the constituent metal material of the via conductor 35. Conductive connection is made by penetrating the adhesive layer 11 based on the expansion. This method has an advantage that the process is simple because the adhesive layer 11 can be applied all over the layered conductor element 30 and the via conductor 35. However, it is necessary to keep the thickness of the adhesive layer 11 interposed between the two materials at a certain level or less so that the metal material can be easily broken by heat expansion. Moreover, it is necessary to use a heat-resistant adhesive (for example, a glass layer) so as to withstand the heat history for the conductive connection. If heat treatment is performed at a temperature at which at least a part of the layered conductor element 30 or the via conductor 35 melts, the volume expansion of the metal is large at the time of melting, so that the adhesive layer 11 easily penetrates, and the molten metal penetrates into the through hole. Thus, there is an advantage that a conductive connection state can be easily obtained.

The cross-sectional schematic diagram which shows an example of the ceramic wiring board used as the application object of this invention. The figure which expands and shows the partial cross section. The conceptual explanatory drawing of wiring width and the area | region width between wiring. The schematic diagram which shows the method of manufacturing a unit board | plate material with a glass material. The schematic diagram which shows the method of manufacturing a unit board | plate material with a sintered ceramic. The conceptual explanatory drawing which forms a via hole and a conductor accommodation recessed part in a unit board | plate material. The top view which illustrates the various formation pattern of a conductor accommodation recessed part. Process explanatory drawing which shows the example which forms a via hole by shot blasting. Process explanatory drawing which shows the example which forms a via hole by an etching. Process explanatory drawing which shows the example which forms a via hole by laser processing. Process explanatory drawing which shows the example which forms a conductor accommodating recessed part by shot blasting. Process explanatory drawing which shows the example which forms a conductor accommodation recessed part by an etching. Process explanatory drawing which shows the example which forms a conductor accommodating recessed part by laser processing. Process explanatory drawing which shows the example which forms a conductor accommodating recessed part by the additional formation of the dielectric material layer for recessed part formation. Process explanatory drawing which shows the example which forms a conductor accommodating recessed part with a marking member. The concept explanatory drawing which fills and forms a via conductor and a layered conductor element in a via hole and a conductor accommodating recessed part. Process explanatory drawing which shows the example which forms a via conductor and a layered conductor element by secondary baking of a metal paste. Process explanatory drawing which shows the example which forms a via conductor and a layered conductor element by metal plating. Process explanatory drawing which shows the example which forms a layered conductor element in a ceramic board previously, and additionally forms the dielectric layer for recessed part formation in the background area | region. Process explanatory drawing which shows the example which compresses and fills a conductor accommodation recessed part with a layered conductor element. Process explanatory drawing which shows the example which bonds a metal-filled unit board | plate material by thermocompression bonding. The cross-sectional schematic diagram which shows the structural example which bonded the metal-filled unit board | plate material through the contact bonding layer. Process explanatory drawing which shows the 1st example which bonds a metal-filled unit board | plate material through an adhesive layer. Process explanatory drawing which shows the 2nd example which bonds a metal-filled unit board | plate material through an adhesive layer. Process explanatory drawing which shows another example which fills and forms a layered conductor element in a conductor accommodating recessed part so that it may protrude from recessed part opening. Process explanatory drawing which shows the 1st example of formation of the via hole which has a large diameter part. Process explanatory drawing which shows the 2nd example of formation of the via hole which has a large diameter part. Process explanatory drawing which shows another example which forms a conductor accommodation recessed part by the additional formation of the dielectric material layer for recessed part formation. Explanatory drawing which shows the manufacturing process of the conventional ceramic wiring board. The figure explaining the effect of the ceramic wiring board obtained by the manufacturing method of this invention compared with the conventional ceramic wiring board.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor component 2 Ceramic wiring board 10 Bonding surface 11 Adhesive layer 30 Wiring part (layered conductor element)
30 (P) metal plating layer 30 h conductor receiving recess 35 via conductor 35 (P) metal plating layer 35 h via hole 40 component mounted wiring board 50 ceramic dielectric layer 50 ′ unit plate material 50 a ceramic plate material 50 b ′ recess forming dielectric layer 51 Metal conductor layer
56 plane conductor (layered conductor element)
130 Metal paste (metal powder)
150 Green sheet 151 Spherical body 154 Pad (layered conductor element)
155 Terminal connection pad array 201 Mask material 202 Via hole window 203 'Mask material 204' Concave pattern window 205 Marking member 206 Convex pattern FP Large diameter part

Claims (14)

  Conductor accommodation for forming a via hole in the thickness direction of a unit plate material made of a densified ceramic material, and accommodating a layered conductor element made of a wiring portion, a surface conductor or a pad on at least one main surface side of the unit plate material A metal-filled unit plate material is produced by forming a recess, filling a via hole with a metal material that becomes the via conductor, and filling the conductor-receiving recess with a metal material that forms the layered conductor element. A method of manufacturing a ceramic wiring board, wherein a ceramic dielectric layer is formed by the unit plate material and a metal conductor layer is formed by the layered conductor element by laminating and bonding the plate materials in the thickness direction.   The conductor accommodating recess for accommodating the wiring part is formed as a wiring accommodating groove, the wiring width of the wiring part accommodated in the wiring accommodating groove, and the width of the inter-line region located between a plurality of parallel adjacent wiring accommodating grooves The method for producing a ceramic wiring board according to claim 1, wherein both are adjusted to 0.1 μm or more and 70 μm or less.   The main surface of the unit plate material is covered with a mask material having a via hole window, shot blasting is performed to project abrasive grains onto the covered main surface, and the via hole is formed in a pattern corresponding to the via hole window. The manufacturing method of the ceramic wiring board of Claim 1 or Claim 2 to provide.   3. The main surface of the unit plate material is covered with a mask material having a via hole window, the covered main surface is etched, and the via hole is formed in a pattern corresponding to the via hole window. The manufacturing method of the ceramic wiring board as described in any one of Claims 1-3.   The method for manufacturing a ceramic wiring board according to claim 1, wherein the via hole is formed in the unit plate material by a laser.   Cover the main surface of the unit plate material with a mask material having a concave pattern window, perform shot blasting to project abrasive grains onto the covered main surface, and perform the conductor in a pattern corresponding to the concave pattern window The method for manufacturing a ceramic wiring board according to claim 1, wherein the housing recess is formed.   The mask material having a recess pattern window covers the main surface of the unit plate material, and the covered main surface is etched to form the conductor-accommodating recess in a pattern corresponding to the recess pattern window. The method for manufacturing a ceramic wiring board according to any one of claims 1 to 5.   8. The via conductor is formed by filling the via hole formed in the unit plate material with the metal powder and then performing secondary firing at a temperature lower than the melting point of the ceramic constituting the ceramic dielectric layer. The manufacturing method of the ceramic wiring board of any one of these.   9. The method of manufacturing a ceramic wiring board according to claim 1, wherein the via conductor is formed by filling and plating a metal in the via hole formed in the unit plate member.   2. The layered conductor element is formed by filling a metal powder into the conductor housing recess formed in the unit plate material and then performing secondary firing at a temperature lower than the melting point of the ceramic constituting the ceramic dielectric layer. The manufacturing method of the ceramic wiring board of any one of Claim 9 thru | or 9.   The method for manufacturing a ceramic wiring board according to any one of claims 1 to 10, wherein the layered conductor element is formed by filling and plating a metal in the conductor receiving recess formed in the unit plate material.   The layered conductor element is arranged in the conductor receiving recess so as to protrude from the opening of the recess, and in this state, the protruding portion of the layered conductor element is press-fitted into the conductor receiving recess, whereby the layered conductor element is inserted into the conductor receiving recess. The method for manufacturing a ceramic wiring board according to any one of claims 1 to 11, wherein the housing recess is filled in a compressed state.   The method for manufacturing a ceramic wiring board according to any one of claims 1 to 12, wherein the metal-filled unit plate members are directly bonded together by thermocompression bonding.   The ceramic wiring board according to claim 1, wherein the metal-filled unit plate material is bonded through an adhesive layer.

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