KR100900671B1 - Method of forming conductive via for multilayer interconnection substrate - Google Patents

Abstract

A multilayer wiring board and a method of forming a conductive via used therein, and an aspect of the present invention is a multilayer wiring board having at least one conductive via for electrical connection between layers, the conductive via having a maximum inside thereof. Provided is a multilayer wiring board having a shape in which the diameter decreases from the diameter area toward the outside along the stacking direction of the multilayer wiring board.

It is possible to provide a multi-layered wiring board capable of high integration and thinning due to a short circuit between layers on the substrate or a short circuit between the wiring baton and the conductive via, and a method of forming a conductive via used therein.

Ceramic Board, Conductive Vias, LTCC, Multilayer Wiring Boards

Description

A method of forming a conductive via for a multilayer wiring board {METHOD OF FORMING CONDUCTIVE VIA FOR MULTILAYER INTERCONNECTION SUBSTRATE}

The present invention relates to a multilayer wiring board and a method of forming a conductive via used therein, and more particularly, to a multilayer wiring board and a method of forming a conductive via used therein, which can improve electrical characteristics by optimizing the conductive via structure.

In general, a multilayer wiring board is used as a composite component of an active element such as a semiconductor IC chip and a passive element such as a capacitor, an inductor, and a resistor, or a simple semiconductor IC package. More specifically, the multilayer wiring board is widely used to configure various electronic components such as PA module substrates, RF diode switches, filters, chip antennas, various package components, and composite devices.

Conductive via structures are generally employed for electrical connection between layers of such multilayer wiring boards.

1 and 2 illustrate a method of forming a conductive via according to the prior art and correspond to a perspective view and a cross-sectional view, respectively.

Referring to FIG. 1, a method for forming a conductive via is described. As shown in FIG. 1, after forming a ceramic sheet 10 constituting a layer in a multilayer wiring substrate, for example, a multilayer ceramic substrate, a predetermined through hole of the ceramic sheet 10 ( Form H). Subsequently, the through hole H is filled with a conductive material such as silver (Ag) to form a conductive via (V).

In the above process, the process of forming the hole (H) in the ceramic sheet 10 was performed by a mechanical method using a drill or the like, but recently, processing through a laser is mainly used due to the demand for a smaller size. In the case of forming a hole by using a laser, due to the characteristics of the laser, the through hole has a tapered shape as shown in FIG. 2.

As described above, in the case of stacking the ceramic sheets 10a and 10b having the tapered holes, the conductive vias Va and Vb are different from each other in an area in contact with each other, thus having an unstable structure. Unbalanced pressure may cause breakage, cracking, etc. in the contact area. Such breakage and cracking have a problem leading to a short circuit or loss of an electrical signal.

In addition, as indicated by arrows in FIG. 2A, due to the inconsistency of the areas in the contact areas of the ceramic sheets 10a and 10b, a large loss may occur during transmission of an electrical signal, thereby decreasing efficiency.

On the other hand, in the case of the prior art, the performance deterioration is concerned in the field where a conductive via of a small size is required. That is, as shown in FIG. 2B, the filling of the conductive material for forming the conductive via is not easy in the minute through holes having the top of about 70 μm and the bottom of about 40 μm. Therefore, as the size of the through-hole is smaller, the filling density of the conductive material is lowered, and thus the electrical characteristics may be greatly reduced.

In addition, as shown in FIG. 2C, after the conductive material is filled in the through hole, a process of flattening the filled conductive material using the crimping tool 20 is required. The diameter of the electrode flattened by the flattening process is required. This can be larger than originally designed.

As described above, when the diameter of the via electrode is difficult to control and the size thereof is increased, a wiring pattern and a short circuit may occur, and further, it is more difficult to reduce the size of the substrate.

Therefore, there is a need in the art for conductive vias having an optimized structure that can solve the above problems.

The present invention is to solve the above problems, an object of the present invention is to improve the defect caused by the short circuit between the interlayer or wiring baton and the conductive via on the substrate, a multi-layer capable of high integration, thinning by the conductive vias of fine size It is to provide a wiring board.

Another object of the present invention is to provide a method for forming conductive vias used in the multilayer wiring board.

In order to achieve the above object, one embodiment of the present invention,

A multilayer wiring board having at least one conductive via for electrical connection between layers, wherein the conductive via has a shape in which the diameter decreases toward the outside along a stacking direction of the multilayer wiring board from a maximum diameter region therein. A multilayer wiring board is provided.

Here, the maximum diameter region is preferably located in the center of the conductive via with respect to the stacking direction of the multilayer wiring board.

Further, the conductive via may have a symmetrical structure with respect to the maximum diameter region.

The maximum diameter of the conductive via may be 150 to 160 μm, and the minimum diameter of the conductive via is 60 to 70 μm, in terms of miniaturization of the substrate.

Meanwhile, the conductive via may include at least one material selected from the group consisting of Ag, Cu, and Ni.

It is preferable that the said multilayer wiring board is a low temperature co-fired ceramic board.

Another aspect of the invention,

Forming a through hole having a shape in which the diameter of the first and second substrates decreases in a thickness direction, filling each of the through holes formed in the first and second substrates with a conductive material; and And bonding the first and second substrates such that the largest diameter regions are in contact with each other.

In this case, it is preferable that the step of forming the through holes in the first and second substrates is performed by a laser processing.

In a preferred embodiment of the present invention, the first and second substrates may have the same thickness as each other, and further, the through holes formed in the first and second substrates may have the same shape.

Additionally, after filling the conductive material into each of the through holes formed in the first and second substrates, the method may further include planarizing a portion of the conductive material exposed to the outside.

In addition, it is preferable that the said 1st and 2nd base material is a ceramic sheet | seat.

On the other hand, the step of bonding the first and second substrate is preferably carried out by pressing while applying heat to the first and second substrate.

In some embodiments, the filling of the conductive material into each of the through holes formed in the first and second substrates may be performed after the bonding of the first and second substrates.

According to the present invention, it is possible to provide a multilayer wiring board capable of high integration and thinning by a small size of conductive vias and a defect due to short circuit between the wiring baton and the conductive vias on the substrate, and a method of forming a conductive via used therein. have.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

However, embodiments of the present invention may be modified in various other forms, and the scope of the present invention is not limited to the embodiments described below. In addition, embodiments of the present invention is provided to those skilled in the art to more fully describe the present invention. Accordingly, the shape and size of elements in the drawings may be exaggerated for clarity, and the elements denoted by the same reference numerals in the drawings are the same elements.

3 is a cross-sectional view illustrating the shape of a conductive via manufactured according to an embodiment of the present invention.

As shown in FIG. 3, conductive vias V formed inside the ceramic sheet 100 constituting some layers of a multilayer wiring substrate, such as a multilayer ceramic substrate, are provided for electrical connection with other ceramic sheets not shown.

More specifically, the ceramic sheet 100 may be used in a low temperature co-fired ceramic substrate, in this case, it may be made of a glass and a binder, including a ceramic filler. However, in some embodiments, a PCB substrate or the like may be used instead of the ceramic sheet.

In the case of this embodiment, the said conductive via V has a shape from which the diameter becomes small toward the outer side along the lamination direction of a multilayer wiring board from the largest diameter area inside. That is, it is a shape in which two taper-shaped vias contact parts with large diameters mutually. Since the conductive via V having such a shape is structurally stable and there is no section in which the diameter is discontinuously changed as compared with the related art, an improvement in electrical characteristics can be expected. In terms of structural stability, as shown in FIG. 3, the conductive via V is most preferably a symmetrical structure with respect to a maximum diameter region therein, but is not limited thereto. In some cases, an asymmetrical structure may also be employed. Can be.

In addition, as will be described later, when the through-hole is formed by processing using a laser, the through-hole formed is tapered, and the maximum diameter is generally 150 to 160 µm and the minimum diameter is about 60 to 70 µm. to be. Therefore, in the case of the conductive via V, which can be understood as a structure in which two ceramic sheets on which a through-hole is formed are bonded to each other, the maximum diameter d ₂ is 150 to 160 μm, and the minimum diameter d ₁ is 60 to. It becomes 70 micrometers.

In detail, the portion directly connected to the wiring pattern formed on the ceramic sheet 100 becomes the minimum diameter portion, and the size thereof is 60 to 70 μm, which can be viewed as a relatively small size, as described above. It can reduce the occurrence of short circuit. Accordingly, the size of the entire substrate can also be made small, resulting in light and thin shortening of the electronic component.

FIG. 4 is a view for explaining a method of forming the conductive via shown in FIG. 3, and FIG. 4A is a perspective view illustrating a through hole formed by processing using a laser, and FIG. 4B is a view illustrating bonding two ceramic sheets. It is sectional drawing which shows. 4C is a cross-sectional view illustrating a method of forming a conductive via according to a modified embodiment of the present invention.

First, as shown in FIG. 4A, a through hole H is formed in the first ceramic sheet 100. In the present embodiment, the laser L is irradiated to the first ceramic sheet 100 to form a through hole H, and the through hole H is the first ceramic sheet 100 due to the nature of processing using a laser. It has a shape in which the diameter decreases toward the thickness direction.

The processing by the laser (L) is preferable, but if necessary, the through-hole may be formed by mechanical processing using a drill or the like, and may also be possible when the cross-section of the through-hole is not circular.

Although not shown in FIG. 4A, the second ceramic sheet is provided to form through holes through the same process. In this case, as will be described later, since the through hole forming portions of the first and second ceramic sheets are in contact with each other, there may be some errors, but the size of the first and second ceramic sheets, the position and size of the through holes are formed. It is preferable that they are the same as each other.

Next, the through-holes H of the first and second ceramic sheets are filled with a material containing a conductive material, for example, Ag, Cu, Ni, and the like, and may be executed through a known process such as screen printing. In addition, although not necessarily required, after filling the conductive material, an operation of planarizing the filled conductive material beyond the through hole region may be required. In this case, as described in the prior art, the maximum diameter of the conductive via may be substantially larger than the diameter of the through hole (H).

Next, as shown in FIG. 4B, the first and second ceramic sheets 100a and 100b are pressed together. In this case, in order to obtain the conductive via V having the shape shown in FIG. 3, the vias formed to correspond to each other are contacted with the first and second ceramic sheets 100a and 100b, but the portions having the larger diameters contact each other.

The first and second ceramic sheets 100a and 100b may be easily bonded to each other by pressing them while applying heat.

The bonded two ceramic sheets 100a and 100b constitute one layer when stacked on a multilayer wiring board, and the maximum diameter region exists inside, and the region exposed to the outside to connect with the wiring pattern has the largest diameter. It becomes a small area. As a result, since the wiring pattern is formed around the region having a small diameter of about 60 to 80 µm, the possibility of short-circuit with each other becomes low, and a free wiring pattern can be designed.

Meanwhile, in addition to the above process of bonding the ceramic sheet after filling the through hole with the conductive material, as shown in FIG. 4C, the first and second ceramic sheets 100a and 100b are first bonded and then filled with the conductive material. Conductive vias V may be formed.

That is, the embodiment shown in Figure 4b may be more generally employed, but when the filling process after bonding as shown in Figure 4c, it may be suitable in terms of process convenience by reducing the number of filling.

FIG. 5 is a cross-sectional view illustrating a multilayer wiring board according to another aspect of the present invention, wherein the conductive via shown in FIG. 3 is employed.

The multilayer wiring board according to the present embodiment includes an laminate structure 100 having an internal electrode 10 and conductive vias V, and an external electrode 50 formed on one surface of the laminate structure 100.

The multilayer wiring board may be manufactured by a low temperature co-firing process, and may be obtained by firing the laminate structure 100 at a predetermined temperature.

In the case of the present embodiment, it is a main feature to have the conductive vias shown in FIG. 3, and the manufacture of the multilayer wiring board can be carried out by a known lamination and firing process, and thus detailed description is omitted.

As described above, the multilayer wiring board according to the present embodiment has a stable conductive via (V) structure for electrical connection between the layers, and has a relatively small via area connected to the wiring pattern, which is suitable for miniaturization.

Hereinafter, the shape of the conductive via according to the present invention and the prior art is compared in more detail.

6 and 7 are optical micrographs showing conductive vias formed in accordance with the prior art.

First, FIGS. 6A and 6B are filled with a conductive material in a ceramic sheet, and correspond to tapered minimum diameter regions and maximum diameter regions, respectively.

As described above, in the case of the conductive via formed by processing using a laser, the minimum diameter is about 60 to 70 m (Fig. 6A), and the maximum diameter is about 150 to 160 m (Fig. 6B). In the prior art, both the minimum and maximum diameter regions are exposed to be directly connected with the wiring pattern, and in particular, the planarization operation may allow the maximum diameter of FIG. Uneasy.

On the other hand, Figure 7 shows a stack of ceramic sheets in which conductive vias are formed according to the prior art, it can be seen that the conductive vias do not form a stable bond due to different contact areas between the layers.

FIG. 8 is an optical micrograph showing the conductive via shown in FIG. 3.

8A and 8B are images of the upper and lower portions of the conductive via, respectively, and correspond to the minimum diameter region, unlike the prior art of FIG. 6. That is, the diameters of the conductive vias shown in FIGS. 8A and 8B are both small in size of about 60 to 70 μm and high in stability of the conductive structure therein. Furthermore, as the conductive via structure having a small diameter, the electrode filling density therein can be expected to be relatively very high as compared with the case of FIG. 2B, which may lead to an improvement in electrical characteristics.

The present invention is not limited by the above-described embodiment and the accompanying drawings, but is intended to be limited by the appended claims. Accordingly, various forms of substitution, modification, and alteration may be made by those skilled in the art without departing from the technical spirit of the present invention described in the claims, which are also within the scope of the present invention. something to do.

1 and 2 illustrate a method of forming a conductive via according to the prior art and correspond to a perspective view and a cross-sectional view, respectively.

3 is a cross-sectional view illustrating the shape of a conductive via manufactured according to an embodiment of the present invention.

FIG. 4 is a view for explaining a method of forming the conductive via shown in FIG. 3, and FIG. 4A is a perspective view illustrating a through hole formed by processing using a laser, and FIG. 4B is a view illustrating bonding two ceramic sheets. It is sectional drawing which shows. 4C is a cross-sectional view illustrating a method of forming a conductive via according to a modified embodiment of the present invention.

FIG. 5 is a cross-sectional view illustrating a multilayer wiring board according to another aspect of the present invention, wherein the conductive via shown in FIG. 3 is employed.

6 and 7 are optical micrographs showing conductive vias formed in accordance with the prior art.

FIG. 8 is an optical micrograph showing the conductive via shown in FIG. 3.

<Description of the symbols for the main parts of the drawings>

100: ceramic sheet 100a, 100b: first and second ceramic sheets

10: internal electrode 50: external electrode

H: Through Hole V: Conductive Via

Claims (18)

delete delete delete delete delete delete delete Forming a through hole having a shape in which the diameter of the first and second substrates decreases in the thickness direction; Filling a conductive material into each of the through holes formed in the first and second substrates; And Bonding the first and second substrates such that maximum diameter regions of the through holes are in contact with each other; Conductive via formation method comprising a. The method of claim 8, And forming through holes in the first and second substrates by a laser processing. The method of claim 8, And the first and second substrates have the same thickness as each other. The method of claim 10, The through-holes formed in the first and second substrates have the same shape as each other. The method of claim 8, The conductive via forming method of the through hole formed in the first and the second substrate is 150 ~ 160㎛. The method of claim 8, The conductive via forming method of the through hole formed in the first and the second substrate is 60 ~ 70㎛. The method of claim 8, And filling a conductive material into each of the through holes formed in the first and second substrates, and then planarizing a portion of the conductive material exposed to the outside. The method of claim 8, And wherein the conductive material comprises at least one material selected from the group consisting of Ag, Cu, and Ni. The method of claim 8, And the first and second substrates are ceramic sheets. The method of claim 8, Bonding the first and second substrates is performed by pressing the first and second substrates while applying heat to the first and second substrates. The method of claim 8, Filling the conductive material into each of the through holes formed in the first and second substrates is carried out after the bonding of the first and second substrates.

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