CN101212213B - 模拟-数字变换装置以及ic芯片 - Google Patents

模拟-数字变换装置以及ic芯片 Download PDF

Info

Publication number
CN101212213B
CN101212213B CN2007101993543A CN200710199354A CN101212213B CN 101212213 B CN101212213 B CN 101212213B CN 2007101993543 A CN2007101993543 A CN 2007101993543A CN 200710199354 A CN200710199354 A CN 200710199354A CN 101212213 B CN101212213 B CN 101212213B
Authority
CN
China
Prior art keywords
mentioned
output
clock signal
signal
input terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN2007101993543A
Other languages
English (en)
Chinese (zh)
Other versions
CN101212213A (zh
Inventor
真壁良和
日高郁夫
冈浩二
尾关俊明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nuvoton Technology Corp Japan
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of CN101212213A publication Critical patent/CN101212213A/zh
Application granted granted Critical
Publication of CN101212213B publication Critical patent/CN101212213B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0624—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by synchronisation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/06—Clock generators producing several clock signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/151—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two complementary outputs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/1205—Multiplexed conversion systems
    • H03M1/121—Interleaved, i.e. using multiple converters or converter parts for one channel
    • H03M1/1215—Interleaved, i.e. using multiple converters or converter parts for one channel using time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Analogue/Digital Conversion (AREA)
  • Manipulation Of Pulses (AREA)
CN2007101993543A 2006-12-27 2007-12-17 模拟-数字变换装置以及ic芯片 Active CN101212213B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2006351203 2006-12-27
JP2006-351203 2006-12-27
JP2006351203A JP2008166910A (ja) 2006-12-27 2006-12-27 クロック信号生成装置及びアナログ−デジタル変換装置

Publications (2)

Publication Number Publication Date
CN101212213A CN101212213A (zh) 2008-07-02
CN101212213B true CN101212213B (zh) 2011-11-23

Family

ID=39583125

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2007101993543A Active CN101212213B (zh) 2006-12-27 2007-12-17 模拟-数字变换装置以及ic芯片

Country Status (3)

Country Link
US (1) US7609194B2 (https=)
JP (1) JP2008166910A (https=)
CN (1) CN101212213B (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8749419B2 (en) * 2009-08-11 2014-06-10 Hittite Microwave Corporation ADC with enhanced and/or adjustable accuracy
PL220358B1 (pl) * 2012-01-31 2015-10-30 Akademia Górniczo Hutnicza Im Stanisława Staszica W Krakowie Sposób i układ do bezzegarowego przetwarzania wielkości napięcia elektrycznego na słowo cyfrowe
KR101970612B1 (ko) * 2013-03-15 2019-08-13 퀄컴 인코포레이티드 저 전력 아키텍처들
JP6127807B2 (ja) * 2013-07-26 2017-05-17 富士通株式会社 送信回路、通信システム及び通信方法
KR102432457B1 (ko) * 2015-10-21 2022-08-12 삼성전자주식회사 디스큐 기능을 갖는 클락 발생 회로 및 상기 회로를 포함하는 반도체 집적회로 장치
JP6823268B2 (ja) * 2016-03-11 2021-02-03 株式会社ソシオネクスト 分周回路、デマルチプレクサ回路、及び半導体集積回路
US10790845B1 (en) * 2019-05-31 2020-09-29 The Boeing Company Clocking circuit and method for time-interleaved analog-to-digital converters
CN112202446B (zh) * 2019-07-08 2024-06-14 北京三中科技有限公司 一种相位同步装置和方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1186384A (zh) * 1996-11-21 1998-07-01 松下电器产业株式会社 A/d转换器和a/d转换方法
CN1340247A (zh) * 1999-12-17 2002-03-13 酒井康江 过采样处理电路及数－模转换器
CN1431778A (zh) * 1995-09-05 2003-07-23 三菱电机株式会社 触发器电路
US6771202B2 (en) * 2002-04-24 2004-08-03 Denso Corporation Analog-to-digital conversion method and device

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5552732A (en) * 1995-04-25 1996-09-03 Exar Corporation High speed divide by 1.5 clock generator
US5808691A (en) * 1995-12-12 1998-09-15 Cirrus Logic, Inc. Digital carrier synthesis synchronized to a reference signal that is asynchronous with respect to a digital sampling clock
JP3467975B2 (ja) * 1996-06-27 2003-11-17 安藤電気株式会社 位相検出回路
JP2000216762A (ja) 1999-01-26 2000-08-04 Hitachi Denshi Ltd サンプリング周波数変換回路
JP2001217886A (ja) 2000-01-31 2001-08-10 Matsushita Electric Ind Co Ltd 移相器
US6642747B1 (en) * 2002-03-15 2003-11-04 National Semiconductor Corporation Frequency detector for a phase locked loop system
DE60321016D1 (https=) * 2003-12-17 2008-06-26 Sgs Thomson Microelectronics
DE602005018114D1 (de) * 2005-03-31 2010-01-14 Freescale Semiconductor Inc Verfahren zur rauschminderung in einem phasenregelkreis und einrichtung mit rauschminderungsfähigkeiten
US7515666B2 (en) * 2005-07-29 2009-04-07 International Business Machines Corporation Method for dynamically changing the frequency of clock signals
KR100808055B1 (ko) * 2006-10-31 2008-02-28 주식회사 하이닉스반도체 반도체 소자의 지연 고정 루프와 그의 구동 방법

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1431778A (zh) * 1995-09-05 2003-07-23 三菱电机株式会社 触发器电路
CN1186384A (zh) * 1996-11-21 1998-07-01 松下电器产业株式会社 A/d转换器和a/d转换方法
CN1340247A (zh) * 1999-12-17 2002-03-13 酒井康江 过采样处理电路及数－模转换器
US6771202B2 (en) * 2002-04-24 2004-08-03 Denso Corporation Analog-to-digital conversion method and device

Also Published As

Publication number Publication date
US7609194B2 (en) 2009-10-27
CN101212213A (zh) 2008-07-02
JP2008166910A (ja) 2008-07-17
US20080158035A1 (en) 2008-07-03

Similar Documents

Publication Publication Date Title
CN101212213B (zh) 模拟-数字变换装置以及ic芯片
US8760325B2 (en) Scheme for balancing skew between lanes of high-speed serial digital interface
US9270292B2 (en) Efficient time-interleaved analog-to-digital converter
CN109728818A (zh) 用于高速和交错的adc的跟踪和保持电路
CN104467842A (zh) 一种带参考通道的tiadc的数字后台实时补偿方法
CN109032498B (zh) 一种多fpga的多通道采集系统的波形量化同步方法
CN114153136A (zh) 一种基于时钟校准技术的全周期数字时间转换器
US20210367611A1 (en) Systems and methods for performing analog-to-digital conversion across multiple, spatially separated stages
CN114090497A (zh) 一种高速数据采集时钟的同步方案
CN108432140A (zh) 一种校正装置和方法
CN104283561A (zh) 一种异步时钟并串转换半周期输出电路
KR101922018B1 (ko) 다중채널 아날로그­디지털 변환 장치 및 이를 이용하는 방법
CN117955496A (zh) 一种时间交织模数转换系统及校准方法
US11936398B2 (en) Systems and methods for performing analog-to-digital conversion across multiple, spatially separated stages
Iroaga et al. A background correction technique for timing errors in time-interleaved analog-to-digital converters
CN112019215A (zh) 一种脉宽调制单分发式多通道adc同步方法
CN108333910B (zh) 一种新型的时间数字转化器
JP2000354026A (ja) 高速でタイミング精度の高いエッジを有するサブサンプリングクロック信号を発生させる為のクロック信号発生器
US20210028793A1 (en) Systems and methods for performing analog-to-digital conversion across multiple, spatially separated stages
JP2017143411A (ja) タイムインターリーブ型ａｄ変換装置、受信装置、及び通信装置
CN114342262B (zh) 同步多个数字/模拟转换器的输出端处的模拟数据的方法
JP2011146952A (ja) Ａｄ変換器
CN103095304A (zh) 一种同向正交信号模数转换器
KR102856507B1 (ko) 타임-인터리브 adc의 타이밍 스큐 불일치 교정 방법
CN117459064B (zh) 多路adc采样方法、装置及设备

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20200603

Address after: Kyoto Japan

Patentee after: Panasonic semiconductor solutions Co.,Ltd.

Address before: Osaka Japan

Patentee before: Panasonic Corp.