CN101138085B - 电介质叠层及其形成方法 - Google Patents

电介质叠层及其形成方法 Download PDF

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CN101138085B
CN101138085B CN2006800074066A CN200680007406A CN101138085B CN 101138085 B CN101138085 B CN 101138085B CN 2006800074066 A CN2006800074066 A CN 2006800074066A CN 200680007406 A CN200680007406 A CN 200680007406A CN 101138085 B CN101138085 B CN 101138085B
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dielectric
layer
low
nanolayer
stack
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Chinese (zh)
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CN101138085A (zh
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宋·V.·恩古彦
萨拉赫·L.·雷恩
埃里克·G.·里尼格尔
井田健作
达里尔·D.·雷斯塔诺
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Sony Corp
International Business Machines Corp
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International Business Machines Corp
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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)
  • Laminated Bodies (AREA)
  • Organic Insulating Materials (AREA)
  • Insulating Bodies (AREA)
CN2006800074066A 2005-03-08 2006-03-08 电介质叠层及其形成方法 Expired - Fee Related CN101138085B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/906,815 2005-03-08
US10/906,815 US7265437B2 (en) 2005-03-08 2005-03-08 Low k dielectric CVD film formation process with in-situ imbedded nanolayers to improve mechanical properties
PCT/US2006/008449 WO2006096813A2 (en) 2005-03-08 2006-03-08 Low k dielectric cvd film formation process with in-situ imbedded nanolayers to improve mechanical properties

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CN101138085A CN101138085A (zh) 2008-03-05
CN101138085B true CN101138085B (zh) 2013-03-27

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US (2) US7265437B2 (https=)
EP (1) EP1856735A4 (https=)
JP (1) JP5398258B2 (https=)
CN (1) CN101138085B (https=)
TW (1) TWI414623B (https=)
WO (1) WO2006096813A2 (https=)

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US7265437B2 (en) 2007-09-04
EP1856735A2 (en) 2007-11-21
WO2006096813A3 (en) 2006-12-28
CN101138085A (zh) 2008-03-05
US20100028695A1 (en) 2010-02-04
JP5398258B2 (ja) 2014-01-29
EP1856735A4 (en) 2009-07-15
TW200641177A (en) 2006-12-01
JP2008537639A (ja) 2008-09-18
US20060202311A1 (en) 2006-09-14
US7998880B2 (en) 2011-08-16
TWI414623B (zh) 2013-11-11
WO2006096813A2 (en) 2006-09-14

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