CN101138047B - 使用多头解码器的多个级对密集型存储器阵列进行分层解码的设备和方法 - Google Patents

使用多头解码器的多个级对密集型存储器阵列进行分层解码的设备和方法 Download PDF

Info

Publication number
CN101138047B
CN101138047B CN2005800451715A CN200580045171A CN101138047B CN 101138047 B CN101138047 B CN 101138047B CN 2005800451715 A CN2005800451715 A CN 2005800451715A CN 200580045171 A CN200580045171 A CN 200580045171A CN 101138047 B CN101138047 B CN 101138047B
Authority
CN
China
Prior art keywords
stage
circuit
decoder
integrated circuit
array
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2005800451715A
Other languages
English (en)
Chinese (zh)
Other versions
CN101138047A (zh
Inventor
卢卡·G·法索利
肯尼斯·K·苏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sandy Technology Corp
SanDisk Technologies LLC
Original Assignee
SanDisk 3D LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SanDisk 3D LLC filed Critical SanDisk 3D LLC
Publication of CN101138047A publication Critical patent/CN101138047A/zh
Application granted granted Critical
Publication of CN101138047B publication Critical patent/CN101138047B/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/10Decoders
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/08Address circuits; Decoders; Word-line control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
CN2005800451715A 2004-12-30 2005-12-16 使用多头解码器的多个级对密集型存储器阵列进行分层解码的设备和方法 Expired - Fee Related CN101138047B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/026,470 2004-12-30
US11/026,470 US7286439B2 (en) 2004-12-30 2004-12-30 Apparatus and method for hierarchical decoding of dense memory arrays using multiple levels of multiple-headed decoders
PCT/US2005/045564 WO2006073735A1 (en) 2004-12-30 2005-12-16 Apparatus and method for hierarchical decoding of dense memory arrays using multiple levels of multiple-headed decoders

Related Child Applications (1)

Application Number Title Priority Date Filing Date
CN2011100734317A Division CN102201254B (zh) 2004-12-30 2005-12-16 用于解码存储器阵列和制造包含存储器阵列的产品的方法

Publications (2)

Publication Number Publication Date
CN101138047A CN101138047A (zh) 2008-03-05
CN101138047B true CN101138047B (zh) 2011-05-18

Family

ID=36640233

Family Applications (2)

Application Number Title Priority Date Filing Date
CN2005800451715A Expired - Fee Related CN101138047B (zh) 2004-12-30 2005-12-16 使用多头解码器的多个级对密集型存储器阵列进行分层解码的设备和方法
CN2011100734317A Expired - Fee Related CN102201254B (zh) 2004-12-30 2005-12-16 用于解码存储器阵列和制造包含存储器阵列的产品的方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
CN2011100734317A Expired - Fee Related CN102201254B (zh) 2004-12-30 2005-12-16 用于解码存储器阵列和制造包含存储器阵列的产品的方法

Country Status (6)

Country Link
US (2) US7286439B2 (enExample)
EP (2) EP2450902B1 (enExample)
JP (1) JP5032336B2 (enExample)
KR (1) KR101194353B1 (enExample)
CN (2) CN101138047B (enExample)
WO (1) WO2006073735A1 (enExample)

Families Citing this family (69)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7177191B2 (en) * 2004-12-30 2007-02-13 Sandisk 3D Llc Integrated circuit including memory array incorporating multiple types of NAND string structures
US7298665B2 (en) * 2004-12-30 2007-11-20 Sandisk 3D Llc Dual-mode decoder circuit, integrated circuit memory array incorporating same, and related methods of operation
US7286439B2 (en) * 2004-12-30 2007-10-23 Sandisk 3D Llc Apparatus and method for hierarchical decoding of dense memory arrays using multiple levels of multiple-headed decoders
US7272052B2 (en) * 2005-03-31 2007-09-18 Sandisk 3D Llc Decoding circuit for non-binary groups of memory line drivers
US7345907B2 (en) * 2005-07-11 2008-03-18 Sandisk 3D Llc Apparatus and method for reading an array of nonvolatile memory cells including switchable resistor memory elements
US7362604B2 (en) * 2005-07-11 2008-04-22 Sandisk 3D Llc Apparatus and method for programming an array of nonvolatile memory cells including switchable resistor memory elements
KR100855861B1 (ko) * 2005-12-30 2008-09-01 주식회사 하이닉스반도체 비휘발성 반도체 메모리 장치
JP2007213732A (ja) * 2006-02-13 2007-08-23 Matsushita Electric Ind Co Ltd 半導体記憶装置
EP2062262B1 (en) * 2006-07-31 2014-05-07 Sandisk 3D LLC Method and apparatus for passive element memory array incorporating reversible polarity word line and bit line decoders
US7463546B2 (en) * 2006-07-31 2008-12-09 Sandisk 3D Llc Method for using a passive element memory array incorporating reversible polarity word line and bit line decoders
US8279704B2 (en) 2006-07-31 2012-10-02 Sandisk 3D Llc Decoder circuitry providing forward and reverse modes of memory array operation and method for biasing same
US7570523B2 (en) * 2006-07-31 2009-08-04 Sandisk 3D Llc Method for using two data busses for memory array block selection
US7554832B2 (en) * 2006-07-31 2009-06-30 Sandisk 3D Llc Passive element memory array incorporating reversible polarity word line and bit line decoders
US7542338B2 (en) * 2006-07-31 2009-06-02 Sandisk 3D Llc Method for reading a multi-level passive element memory cell array
US7499366B2 (en) * 2006-07-31 2009-03-03 Sandisk 3D Llc Method for using dual data-dependent busses for coupling read/write circuits to a memory array
US7542337B2 (en) * 2006-07-31 2009-06-02 Sandisk 3D Llc Apparatus for reading a multi-level passive element memory cell array
US7463536B2 (en) * 2006-07-31 2008-12-09 Sandisk 3D Llc Memory array incorporating two data busses for memory array block selection
ATE556411T1 (de) * 2006-07-31 2012-05-15 Sandisk 3D Llc Verfahren und vorrichtung für duale datenabhängige bussysteme zur kopplung von lese/schreib-schaltungen an einen speicher
US7486587B2 (en) * 2006-07-31 2009-02-03 Sandisk 3D Llc Dual data-dependent busses for coupling read/write circuits to a memory array
US7633828B2 (en) * 2006-07-31 2009-12-15 Sandisk 3D Llc Hierarchical bit line bias bus for block selectable memory array
US7596050B2 (en) * 2006-07-31 2009-09-29 Sandisk 3D Llc Method for using a hierarchical bit line bias bus for block selectable memory array
US7447071B2 (en) * 2006-11-08 2008-11-04 Atmel Corporation Low voltage column decoder sharing a memory array p-well
US7525869B2 (en) * 2006-12-31 2009-04-28 Sandisk 3D Llc Method for using a reversible polarity decoder circuit
US7542370B2 (en) * 2006-12-31 2009-06-02 Sandisk 3D Llc Reversible polarity decoder circuit
US7719919B2 (en) * 2007-03-20 2010-05-18 Kabushiki Kaisha Toshiba Semiconductor memory device in which word lines are driven from either side of memory cell array
US7468916B2 (en) * 2007-03-20 2008-12-23 Ememory Technology Inc. Non-volatile memory having a row driving circuit with shared level shift circuits
US7558140B2 (en) * 2007-03-31 2009-07-07 Sandisk 3D Llc Method for using a spatially distributed amplifier circuit
US7554406B2 (en) 2007-03-31 2009-06-30 Sandisk 3D Llc Spatially distributed amplifier circuit
US7869246B2 (en) * 2007-05-25 2011-01-11 Marvell World Trade Ltd. Bit line decoder architecture for NOR-type memory array
KR100898667B1 (ko) * 2007-08-06 2009-05-22 주식회사 하이닉스반도체 반도체 메모리 소자
KR101526317B1 (ko) * 2008-05-09 2015-06-11 삼성전자주식회사 계층적 디코딩 장치
US8130528B2 (en) 2008-08-25 2012-03-06 Sandisk 3D Llc Memory system with sectional data lines
US8027209B2 (en) 2008-10-06 2011-09-27 Sandisk 3D, Llc Continuous programming of non-volatile memory
US8279650B2 (en) 2009-04-20 2012-10-02 Sandisk 3D Llc Memory system with data line switching scheme
US8050109B2 (en) 2009-08-10 2011-11-01 Sandisk 3D Llc Semiconductor memory with improved memory block switching
US8233309B2 (en) * 2009-10-26 2012-07-31 Sandisk 3D Llc Non-volatile memory array architecture incorporating 1T-1R near 4F2 memory cell
US8223525B2 (en) 2009-12-15 2012-07-17 Sandisk 3D Llc Page register outside array and sense amplifier interface
US8213243B2 (en) 2009-12-15 2012-07-03 Sandisk 3D Llc Program cycle skip
US8284608B2 (en) * 2010-10-05 2012-10-09 Nxp B.V. Combined EEPROM/flash non-volatile memory circuit
US9053766B2 (en) 2011-03-03 2015-06-09 Sandisk 3D, Llc Three dimensional memory system with intelligent select circuit
US8374051B2 (en) 2011-03-03 2013-02-12 Sandisk 3D Llc Three dimensional memory system with column pipeline
US8553476B2 (en) 2011-03-03 2013-10-08 Sandisk 3D Llc Three dimensional memory system with page of data across word lines
US8730754B2 (en) * 2011-04-12 2014-05-20 Micron Technology, Inc. Memory apparatus and system with shared wordline decoder
US8699293B2 (en) * 2011-04-27 2014-04-15 Sandisk 3D Llc Non-volatile storage system with dual block programming
US8913443B2 (en) 2011-09-19 2014-12-16 Conversant Intellectual Property Management Inc. Voltage regulation for 3D packages and method of manufacturing same
US8891305B2 (en) 2012-08-21 2014-11-18 Micron Technology, Inc. Apparatuses and methods involving accessing distributed sub-blocks of memory cells
US8902670B2 (en) 2012-08-31 2014-12-02 Kabushiki Kaisha Toshiba Semiconductor memory device
US9025391B2 (en) * 2012-11-27 2015-05-05 Infineon Technologies Ag Circuit arrangement and method for operating a circuit arrangement
US9001584B2 (en) 2013-02-28 2015-04-07 Micron Technology, Inc. Sub-block decoding in 3D memory
US8947944B2 (en) 2013-03-15 2015-02-03 Sandisk 3D Llc Program cycle skip evaluation before write operations in non-volatile memory
US8947972B2 (en) 2013-03-15 2015-02-03 Sandisk 3D Llc Dynamic address grouping for parallel programming in non-volatile memory
US9711225B2 (en) 2013-10-16 2017-07-18 Sandisk Technologies Llc Regrouping and skipping cycles in non-volatile memory
US9564215B2 (en) 2015-02-11 2017-02-07 Sandisk Technologies Llc Independent sense amplifier addressing and quota sharing in non-volatile memory
US9542979B1 (en) * 2015-08-25 2017-01-10 Macronix International Co., Ltd. Memory structure
ITUB20153728A1 (it) * 2015-09-18 2017-03-18 St Microelectronics Srl Decodificatore di riga per un dispositivo di memoria non volatile, avente ridotta occupazione di area
US9721663B1 (en) * 2016-02-18 2017-08-01 Sandisk Technologies Llc Word line decoder circuitry under a three-dimensional memory array
JP2018045750A (ja) 2016-09-16 2018-03-22 東芝メモリ株式会社 半導体記憶装置
KR102398205B1 (ko) 2017-06-12 2022-05-16 삼성전자주식회사 오티피 메모리 셀을 포함하는 메모리 장치 및 그것의 프로그램 방법
CN108962309B (zh) * 2018-06-29 2021-12-28 西安交通大学 一种高能量利用率低功耗的堆叠sram阵列结构
US10755768B2 (en) * 2018-07-16 2020-08-25 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device including distributed write driving arrangement and method of operating same
US10861551B2 (en) 2018-12-28 2020-12-08 Micron Technology, Inc. Memory cells configured to generate weighted inputs for neural networks
JP7453212B2 (ja) * 2019-03-26 2024-03-19 パナソニック インテレクチュアル プロパティ コーポレーション オブ アメリカ 三次元データ符号化方法、三次元データ復号方法、三次元データ符号化装置、及び三次元データ復号装置
US11423979B2 (en) * 2019-04-29 2022-08-23 Silicon Storage Technology, Inc. Decoding system and physical layout for analog neural memory in deep learning artificial neural network
US10818731B1 (en) * 2019-06-19 2020-10-27 Avalanche Technology, Inc. Three-dimensional nonvolatile memory
KR102676269B1 (ko) * 2019-09-26 2024-06-19 에스케이하이닉스 주식회사 반도체 장치
US11139023B1 (en) 2020-03-19 2021-10-05 Micron Technologhy, Inc. Memory operation with double-sided asymmetric decoders
CN113270130B (zh) * 2020-05-29 2024-08-09 台湾积体电路制造股份有限公司 存储器设备
CN113411103B (zh) * 2021-05-26 2022-04-22 盛销邦(广州)物联科技有限公司 一种基于rf电子标签的密集读写解码器
KR20250083401A (ko) * 2023-11-28 2025-06-10 양쯔 메모리 테크놀로지스 씨오., 엘티디. 메모리 디바이스, 메모리 시스템, 및 디코딩 회로

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6191999B1 (en) * 1997-06-20 2001-02-20 Fujitsu Limited Semiconductor memory device with reduced power consumption
CN1380659A (zh) * 2001-04-06 2002-11-20 富士通株式会社 半导体存储器件以及在该器件中选择多条字线的方法

Family Cites Families (51)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2649204A (en) 1950-11-27 1953-08-18 Jr James M Brier Combination sediment cup and drain plug for internal-combustion engines
US2649304A (en) 1951-02-10 1953-08-18 Paddock Pool Equipment Co Aluminum springboard
US3154636A (en) * 1962-03-23 1964-10-27 Xerox Corp Three dimensional display device
US4646266A (en) 1984-09-28 1987-02-24 Energy Conversion Devices, Inc. Programmable semiconductor structures and methods for using the same
US5250859A (en) * 1991-09-27 1993-10-05 Kaplinsky Cecil H Low power multifunction logic array
US5285118A (en) * 1992-07-16 1994-02-08 International Business Machines Corporation Complementary current tree decoder
US5655113A (en) * 1994-07-05 1997-08-05 Monolithic System Technology, Inc. Resynchronization circuit for a memory system and method of operating same
US5751012A (en) 1995-06-07 1998-05-12 Micron Technology, Inc. Polysilicon pillar diode for use in a non-volatile memory cell
US5835396A (en) 1996-10-17 1998-11-10 Zhang; Guobiao Three-dimensional read-only memory
JPH10241400A (ja) 1997-02-26 1998-09-11 Toshiba Corp 半導体記憶装置
US6256224B1 (en) 2000-05-03 2001-07-03 Hewlett-Packard Co Write circuit for large MRAM arrays
NO972803D0 (no) 1997-06-17 1997-06-17 Opticom As Elektrisk adresserbar logisk innretning, fremgangsmåte til elektrisk adressering av samme og anvendelse av innretning og fremgangsmåte
JP3571497B2 (ja) * 1997-06-20 2004-09-29 富士通株式会社 半導体記憶装置
US6185121B1 (en) 1998-02-26 2001-02-06 Lucent Technologies Inc. Access structure for high density read only memory
US6034882A (en) 1998-11-16 2000-03-07 Matrix Semiconductor, Inc. Vertically stacked field programmable nonvolatile memory and method of fabrication
US6762951B2 (en) * 2001-11-13 2004-07-13 Hitachi, Ltd. Semiconductor integrated circuit device
US6901006B1 (en) * 1999-07-14 2005-05-31 Hitachi, Ltd. Semiconductor integrated circuit device including first, second and third gates
TW587252B (en) * 2000-01-18 2004-05-11 Hitachi Ltd Semiconductor memory device and data processing device
US6856572B2 (en) 2000-04-28 2005-02-15 Matrix Semiconductor, Inc. Multi-headed decoder structure utilizing memory array line driver with dual purpose driver device
US6420215B1 (en) 2000-04-28 2002-07-16 Matrix Semiconductor, Inc. Three-dimensional memory array and method of fabrication
US6888750B2 (en) 2000-04-28 2005-05-03 Matrix Semiconductor, Inc. Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication
US6567287B2 (en) 2001-03-21 2003-05-20 Matrix Semiconductor, Inc. Memory device with row and column decoder circuits arranged in a checkerboard pattern under a plurality of memory arrays
US6631085B2 (en) 2000-04-28 2003-10-07 Matrix Semiconductor, Inc. Three-dimensional memory array incorporating serial chain diode stack
KR100821456B1 (ko) 2000-08-14 2008-04-11 샌디스크 쓰리디 엘엘씨 밀집한 어레이 및 전하 저장 장치와, 그 제조 방법
US6591394B2 (en) 2000-12-22 2003-07-08 Matrix Semiconductor, Inc. Three-dimensional memory array and method for storing data bits and ECC bits therein
US6407953B1 (en) 2001-02-02 2002-06-18 Matrix Semiconductor, Inc. Memory array organization and related test method particularly well suited for integrated circuits having write-once memory arrays
US6618295B2 (en) 2001-03-21 2003-09-09 Matrix Semiconductor, Inc. Method and apparatus for biasing selected and unselected array lines when writing a memory array
US7177181B1 (en) 2001-03-21 2007-02-13 Sandisk 3D Llc Current sensing method and apparatus particularly useful for a memory array of cells having diode-like characteristics
US6545898B1 (en) 2001-03-21 2003-04-08 Silicon Valley Bank Method and apparatus for writing memory arrays using external source of high programming voltage
US6522594B1 (en) 2001-03-21 2003-02-18 Matrix Semiconductor, Inc. Memory array incorporating noise detection line
US6584034B1 (en) * 2001-04-23 2003-06-24 Aplus Flash Technology Inc. Flash memory array structure suitable for multiple simultaneous operations
KR100387527B1 (ko) * 2001-05-23 2003-06-27 삼성전자주식회사 레이아웃 사이즈가 감소된 로우 디코더를 갖는 불휘발성반도체 메모리장치
US6480424B1 (en) * 2001-07-12 2002-11-12 Broadcom Corporation Compact analog-multiplexed global sense amplifier for RAMS
US6525953B1 (en) 2001-08-13 2003-02-25 Matrix Semiconductor, Inc. Vertically-stacked, field-programmable, nonvolatile memory and method of fabrication
US6768685B1 (en) 2001-11-16 2004-07-27 Mtrix Semiconductor, Inc. Integrated circuit memory array with fast test mode utilizing multiple word line selection and method therefor
US7081377B2 (en) 2002-06-27 2006-07-25 Sandisk 3D Llc Three-dimensional memory
US6859410B2 (en) 2002-11-27 2005-02-22 Matrix Semiconductor, Inc. Tree decoder structure particularly well-suited to interfacing array lines having extremely small layout pitch
US6954394B2 (en) 2002-11-27 2005-10-11 Matrix Semiconductor, Inc. Integrated circuit and method for selecting a set of memory-cell-layer-dependent or temperature-dependent operating conditions
US7005350B2 (en) 2002-12-31 2006-02-28 Matrix Semiconductor, Inc. Method for fabricating programmable memory array structures incorporating series-connected transistor strings
US7505321B2 (en) 2002-12-31 2009-03-17 Sandisk 3D Llc Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same
US7233522B2 (en) 2002-12-31 2007-06-19 Sandisk 3D Llc NAND memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same
US6879505B2 (en) * 2003-03-31 2005-04-12 Matrix Semiconductor, Inc. Word line arrangement having multi-layer word line segments for three-dimensional memory array
US7177183B2 (en) * 2003-09-30 2007-02-13 Sandisk 3D Llc Multiple twin cell non-volatile memory array and logic block structure and method therefor
US7023739B2 (en) 2003-12-05 2006-04-04 Matrix Semiconductor, Inc. NAND memory array incorporating multiple write pulse programming of individual memory cells and method for operation of same
US7221588B2 (en) 2003-12-05 2007-05-22 Sandisk 3D Llc Memory array incorporating memory cells arranged in NAND strings
US20050128807A1 (en) 2003-12-05 2005-06-16 En-Hsing Chen Nand memory array incorporating multiple series selection devices and method for operation of same
KR100536613B1 (ko) * 2004-04-09 2005-12-14 삼성전자주식회사 프로그램 시간을 단축할 수 있는 노어형 플래시 메모리장치 및 그것의 프로그램 방법
US7203123B2 (en) 2004-12-08 2007-04-10 Infineon Technologies Ag Integrated DRAM memory device
US7286439B2 (en) * 2004-12-30 2007-10-23 Sandisk 3D Llc Apparatus and method for hierarchical decoding of dense memory arrays using multiple levels of multiple-headed decoders
US7298665B2 (en) * 2004-12-30 2007-11-20 Sandisk 3D Llc Dual-mode decoder circuit, integrated circuit memory array incorporating same, and related methods of operation
US7307268B2 (en) * 2005-01-19 2007-12-11 Sandisk Corporation Structure and method for biasing phase change memory array for reliable writing

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6191999B1 (en) * 1997-06-20 2001-02-20 Fujitsu Limited Semiconductor memory device with reduced power consumption
CN1380659A (zh) * 2001-04-06 2002-11-20 富士通株式会社 半导体存储器件以及在该器件中选择多条字线的方法

Also Published As

Publication number Publication date
EP1831891A4 (en) 2008-11-12
US20080101149A1 (en) 2008-05-01
EP2450902B1 (en) 2014-03-19
CN102201254A (zh) 2011-09-28
US7633829B2 (en) 2009-12-15
CN101138047A (zh) 2008-03-05
EP1831891B1 (en) 2015-07-08
EP2450902A2 (en) 2012-05-09
EP1831891A1 (en) 2007-09-12
US7286439B2 (en) 2007-10-23
US20060146639A1 (en) 2006-07-06
CN102201254B (zh) 2012-11-14
KR101194353B1 (ko) 2012-10-25
JP5032336B2 (ja) 2012-09-26
KR20070110835A (ko) 2007-11-20
EP2450902A3 (en) 2012-09-05
JP2008527585A (ja) 2008-07-24
WO2006073735A1 (en) 2006-07-13

Similar Documents

Publication Publication Date Title
CN101138047B (zh) 使用多头解码器的多个级对密集型存储器阵列进行分层解码的设备和方法
US6879505B2 (en) Word line arrangement having multi-layer word line segments for three-dimensional memory array
US7233024B2 (en) Three-dimensional memory device incorporating segmented bit line memory array
US6856572B2 (en) Multi-headed decoder structure utilizing memory array line driver with dual purpose driver device
US7177183B2 (en) Multiple twin cell non-volatile memory array and logic block structure and method therefor
US6859410B2 (en) Tree decoder structure particularly well-suited to interfacing array lines having extremely small layout pitch
CN101151512B (zh) 用于紧密间距存储器阵列线的晶体管布局配置
US7554832B2 (en) Passive element memory array incorporating reversible polarity word line and bit line decoders
US7272052B2 (en) Decoding circuit for non-binary groups of memory line drivers
US20080232169A1 (en) Nand-like memory array employing high-density nor-like memory devices

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
C41 Transfer of patent application or patent right or utility model
C56 Change in the name or address of the patentee
CP01 Change in the name or title of a patent holder

Address after: Texas, USA

Patentee after: SANDISK TECHNOLOGIES LLC

Address before: Texas, USA

Patentee before: Sandy Technology Corp.

TR01 Transfer of patent right

Effective date of registration: 20160727

Address after: Texas, USA

Patentee after: Sandy Technology Corp.

Address before: California, USA

Patentee before: Sandisk 3D LLC

CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20110518

CF01 Termination of patent right due to non-payment of annual fee