CN101071809B - 功率半导体模块 - Google Patents

功率半导体模块 Download PDF

Info

Publication number
CN101071809B
CN101071809B CN2007101011713A CN200710101171A CN101071809B CN 101071809 B CN101071809 B CN 101071809B CN 2007101011713 A CN2007101011713 A CN 2007101011713A CN 200710101171 A CN200710101171 A CN 200710101171A CN 101071809 B CN101071809 B CN 101071809B
Authority
CN
China
Prior art keywords
power semiconductor
substrate
circuit board
control
printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2007101011713A
Other languages
English (en)
Other versions
CN101071809A (zh
Inventor
雷纳·波普
马科·莱德勒
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semikron Elektronik GmbH and Co KG
Original Assignee
Semikron Elektronik GmbH and Co KG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semikron Elektronik GmbH and Co KG filed Critical Semikron Elektronik GmbH and Co KG
Publication of CN101071809A publication Critical patent/CN101071809A/zh
Application granted granted Critical
Publication of CN101071809B publication Critical patent/CN101071809B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601Structure
    • H01L2224/0603Bonding areas having different sizes, e.g. different heights or widths
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/144Stacked arrangements of planar printed circuit boards

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Power Conversion In General (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Inverter Devices (AREA)

Abstract

本发明描述了一种功率半导体模块(10),其包括与印制电路板(16)一起设置的电绝缘衬底(14),印制电路板(16)通过壳体(18)与衬底(14)隔开。第一印制导线(22)在朝向印制电路板(16)的衬底(14)内侧(20)上接触,并且可以由控制IC元件(34)驱动的功率半导体元件(28)在这些第一印制导线上接触。在印制电路板(16)的朝向衬底(14)的内侧(38)上设置第二印制导线(40)。在壳体(18)内,弹性连接元件(42)通过第一和第二印制导线(22)和(40)之间的刚性压力体(44)压力接触。通过在衬底(14)的内侧(20)上除了第一印制导线(22)外还设置IC印制导线(32)和控制IC元件(24),实现了最佳电磁兼容。

Description

功率半导体模块
技术领域
本发明涉及功率半导体模块(Leistungshalvleitermodule),其具有与印制电路板一起布置的电绝缘衬底,印制电路板通过壳体与衬底隔开,其中第一印制导线在朝向印制电路板的衬底内侧接触,并且功率半导体元件在这些第一印制导线上接触,功率半导体元件可以由控制IC元件驱动(ansteuerbar),在朝向衬底的印制电路板内侧上设置第二印制导线,并且弹性连接元件在第一和第二印制导线之间的壳体中压力接触。
背景技术
例如在申请人的DE 103 06 643 B4或DE 103 16 355 B3中公开了这种功率半导体模块。在这些公知的功率半导体模块中,提供控制IC元件,用于驱动印制电路板上的设置在衬底上的功率半导体元件。该印制电路板是所谓的定制板(Kundenplatine),即在这些公知的功率半导体模块中,用于设置在衬底上的功率半导体元件的控制IC元件在定制板上实现。对于这些在衬底上具有功率半导体元件并在通过壳体与衬底隔开的印制电路板上具有控制IC元件的公知功率半导体模块,控制IC元件与相应功率半导体元件之间的连接很长。这相对长的连接使得这些公知功率半导体模块的电磁兼容性仍然可以改进,因为将电磁波耦合到这些长连接之中与它们的长度成正比。
发明内容
本发明的目的是提供一种前面所述类型的功率半导体模块,与上述类型的公知功率半导体模块相比,其可以以简单的方式生产,而且其中电磁兼容性同时得以改进。
根据本发明,在前述类型的功率半导体模块中通过以下方式实现该目的,即在衬底内侧上,除了用于功率半导体元件的第一印制导线外,还设置IC印制导线和控制IC元件。
衬底优选是DCB(直接键合铜技术:direct copper bonding)衬底。IC印制导线借助于相应的弹性连接元件而与印制电路板的相应第二印制导线压力接触。从而,既为功率半导体元件的负载接头(Lastanschluesse)也为功率半导体元件的控制接头(Steueranschluesse)提供弹性连接元件。
通过在衬底内侧不仅设置功率半导体元件而且设置控制IC元件,并且控制IC元件与功率半导体元件接触,从而实现功率半导体元件和控制IC元件之间相对短的连接,使得根据本发明的功率半导体模块的电磁兼容性相应地被改进。根据本发明的功率半导体模块的另一优点在于,其制造被简化,因为实现了功率半导体元件和设置在相同平面中、即在衬底的朝向印制电路板的内侧上的功率半导体元件的控制IC元件的接触。
在根据本发明的功率半导体模块中,控制IC元件优选通过焊线(Bonddraehte)与相应IC印制导线接触。根据本发明,由于功率半导体元件也通过焊线与相应第一印制导线接触,所以通过键合设备(Bondmaschine)可以在一个操作程序中将功率半导体元件以及用于所设置的功率半导体元件的控制IC元件分别与衬底的相应印制导线接触。这可以节省时间,从而对根据本发明的功率半导体模块的生产率有积极作用。
在根据本发明的功率半导体模块中,控制IC元件可以是未封装(gehaeuselos)元件。这样的未封装芯片元件可以容易地通过焊线而与衬底的相应印制导线接触。另一可能性是,控制IC元件是封装元件(Gehaeusebauelement)。这样的封装元件例如是SMD元件。
附图说明
通过以下对附图中以放大的比例示出的根据本发明的功率半导体模块的示例性实施例的描述,获得进一步的细节、特征和优点,其中:
图1示出功率半导体模块的截面,
图2示出具有第一印制导线、功率半导体元件和控制IC元件的衬底的顶视图。
具体实施方式
图1示出功率半导体模块10的一个实施例的截面表示,功率半导体模块10被设置用于直接安装在分段示出的散热片(KuehIkoerper)12上。功率半导体模块10包括电绝缘衬底14和通过壳体18与衬底14隔开的印制电路板16。
如图2所示,电绝缘衬底14在其朝向印制电路板16的内侧20上具有第一印制导线22。在与内侧20相对的外侧24上,设置具有金属层26的导电衬底14,以便使电绝缘衬底14与散热片12热耦合。
在衬底14的内侧20上,设置分别与相应的第一印制导线22接触的功率半导体元件28。这一接触通过焊线30实现。
尤其如图2所清楚示出的,在电绝缘衬底14的内侧20上,除了第一印制导线22外,还设置IC印制导线32。这些IC印制导线32被设置用于通过焊线36与IC印制导线32接触的控制IC元件34(参看图1)。
功率半导体模块10的印制电路板16在面向衬底14的内侧38上具有第二印制导线40。电绝缘衬底14内侧20上的第一印制导线22通过弹性连接元件42与印制电路板16内侧38上的第二印制导线40压力接触。该压力接触借助于刚性(formstabilen)压力体(Druckkoerper)44而实现,其中刚性压力体44通过与散热片12拧紧的螺纹元件(Schraubelement)46而相对于印制电路板16的外侧48挤压。为了这一目的,压力体44被设置在其朝向印制电路板16的内侧50上,具有压力元件(Druckorganen)52和环绕凸缘54。环绕凸缘54被构造具有相互隔开的凹处56,其中冷却气流可以穿过凹处56。
刚性压力体44与增加刚性(Formstabilitaet)的金属芯(Metallseele)58相结合。
壳体18被构造具有用于弹性连接元件42的槽形导沟(Fuehrungskanaelen)60。
附图标记列表
10功率半导体模块
12(用于10的)散热片
14(10的)电绝缘衬底
16(10的)印制电路板
18(14和16之间的10的)壳体
20(14的)内侧
22(20上的)第一印制导线
24(14的)外侧
26(24上的)金属层
28(20上的)功率半导体元件
30(28和22之间的)焊线
32(20上的)IC印制导线
34(20上的)控制IC元件
36(34和32之间的)焊线
38(16的)内侧
40(38上的)第二印制导线
42(22和40之间的)弹性连接元件
44(用于10的)刚性压力体
46(44和12之间的)螺纹元件
48(16的)外侧
50(44的)内侧
52(50和48之间的44的)压力元件
54(44的)环绕凸缘
56(54中的)凹处
58(44的)金属芯
60(用于42的18的)槽形导沟

Claims (5)

1.一种功率半导体模块,具有用于与印制电路板(16)一起设置的电绝缘衬底(14),所述印制电路板(16)通过壳体(18)与所述衬底(14)隔开,其中第一印制导线(22)在所述衬底(14)的朝向所述印制电路板(16)的内侧(20)上接触,并且由控制IC元件(34)驱动的功率半导体元件(28)在这些第一印制导线(22)上接触,在所述印制电路板(16)的朝向所述衬底(14)的内侧(38)上设置第二印制导线(40),并且在壳体(18)中,所述第一印制导线(22)通过弹性连接元件(42)与所述第二印制导线(40)压力接触,其特征在于,在所述衬底(14)的内侧(20)上,除所述第一印制导线(22)之外,还设置IC印制导线(32)和所述控制IC元件(34);所述IC印制导线(32)借助于相应的弹性连接元件(42)而与所述印制电路板(16)的相应第二印制导线(22)压力接触,并且从而,既为功率半导体元件(28)的负载接头也为功率半导体元件(28)的控制接头提供弹性连接元件。
2.如权利要求1所述的功率半导体模块,其特征在于,所述控制IC元件(34)通过焊线(36)而与相应的IC印制导线(32)接触。
3.如权利要求1或权利要求2所述的功率半导体模块,其特征在于,所述控制IC元件(34)是未封装芯片元件。
4.如权利要求1或权利要求2所述的功率半导体模块,其特征在于,所述控制IC元件(34)是封装元件。
5.如权利要求1或权利要求2所述的功率半导体模块,其特征在于,所述弹性连接元件(42)通过刚性压力体(44)压力接触。
CN2007101011713A 2006-05-09 2007-05-09 功率半导体模块 Expired - Fee Related CN101071809B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102006021412A DE102006021412B3 (de) 2006-05-09 2006-05-09 Leistungshalbleitermodul
DE102006021412.9 2006-05-09

Publications (2)

Publication Number Publication Date
CN101071809A CN101071809A (zh) 2007-11-14
CN101071809B true CN101071809B (zh) 2011-08-03

Family

ID=38293367

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2007101011713A Expired - Fee Related CN101071809B (zh) 2006-05-09 2007-05-09 功率半导体模块

Country Status (6)

Country Link
US (1) US7495324B2 (zh)
EP (1) EP1855319B1 (zh)
JP (1) JP2007305983A (zh)
KR (1) KR20070109838A (zh)
CN (1) CN101071809B (zh)
DE (1) DE102006021412B3 (zh)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102006052620B4 (de) * 2006-11-08 2009-07-09 Semikron Elektronik Gmbh & Co. Kg Schaltungsanordnung mit einem Leistungsmodul, das mit einer Leiterplatte kombiniert ist.
US9373563B2 (en) * 2007-07-20 2016-06-21 Infineon Technologies Ag Semiconductor assembly having a housing
JP4535295B2 (ja) * 2008-03-03 2010-09-01 セイコーエプソン株式会社 半導体モジュール及びその製造方法
DE102008057833B4 (de) 2008-11-19 2011-12-22 Semikron Elektronik Gmbh & Co. Kg Leistungshalbleitermodul mit Steuerfunktionalität und integriertem Übertrager
DE102009002993B4 (de) * 2009-05-11 2012-10-04 Infineon Technologies Ag Leistungshalbleitermodul mit beabstandeten Schaltungsträgern
DE102009026558B3 (de) * 2009-05-28 2010-12-02 Infineon Technologies Ag Leistungshalbleitermodul mit beweglich gelagerten Schaltungsträgern und Verfahren zur Herstellung eines solchen Leistungshalbleitermoduls
DE102012217903A1 (de) 2012-10-01 2014-04-03 Semikron Elektronik Gmbh & Co. Kg Leistungshalbleiterschaltung
KR101443972B1 (ko) 2012-10-31 2014-09-23 삼성전기주식회사 일체형 전력 반도체 모듈
CN102931104A (zh) * 2012-11-12 2013-02-13 杭州士兰集成电路有限公司 一种紧凑型智能功率驱动模块及其封装方法
KR101444550B1 (ko) * 2012-12-12 2014-09-24 삼성전기주식회사 반도체 모듈
CN104701277B (zh) * 2013-12-10 2017-12-05 江苏宏微科技股份有限公司 功率模块的封装结构
DE102014106570B4 (de) * 2014-05-09 2016-03-31 Semikron Elektronik Gmbh & Co. Kg Leistungshalbleitermodul mit Schalteinrichtung und Anordnung hiermit
JP6233260B2 (ja) * 2014-09-22 2017-11-22 株式会社デンソー 電子装置の製造方法、及び電子装置
CN106298689B (zh) * 2015-05-28 2018-10-09 台达电子企业管理(上海)有限公司 封装结构
DE102016119631B4 (de) * 2016-02-01 2021-11-18 Semikron Elektronik Gmbh & Co. Kg Leistungshalbleitermodul mit einem Druckeinleitkörper und Anordnung hiermit
EP3929973B1 (en) * 2020-06-22 2022-10-26 Infineon Technologies AG A power semiconductor module and a method for producing a power semiconductor module
US11444002B2 (en) * 2020-07-29 2022-09-13 Taiwan Semiconductor Manufacturing Company, Ltd. Package structure
DE102022117625B3 (de) 2022-07-14 2023-05-25 Semikron Elektronik Gmbh & Co. Kg Anordnung mit einem Gehäuse und einer elektrisch leitenden Kontaktfeder sowie Leistungshalbleitermodul hiermit

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4031051A1 (de) * 1989-11-14 1991-05-16 Siemens Ag Modul mit mindestens einem halbleiterschaltelement und einer ansteuerschaltung
DE19735071A1 (de) * 1997-08-13 1998-12-10 Telefunken Microelectron Leistungsmodul
CN1234910A (zh) * 1997-06-28 1999-11-10 罗伯特·博施有限公司 电子控制装置
CN1700453A (zh) * 2004-04-29 2005-11-23 塞米克朗电子有限公司 与功率半导体模块形成压力接触的结构

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2530157A1 (de) * 1975-07-05 1977-02-03 Bosch Gmbh Robert Elektronisches steuergeraet
DE19700963C2 (de) * 1997-01-14 2000-12-21 Telefunken Microelectron Verfahren zur Herstellung eines Leistungsmoduls mit einer aktive Halbleiterbauelemente und passive Halbleiterbauelemente aufweisenden Schaltungsanordnung
JPH11233712A (ja) * 1998-02-12 1999-08-27 Hitachi Ltd 半導体装置及びその製法とそれを使った電気機器
DE10306643B4 (de) * 2003-02-18 2005-08-25 Semikron Elektronik Gmbh Anordnung in Druckkontaktierung mit einem Leistungshalbleitermodul
DE10316355C5 (de) * 2003-04-10 2008-03-06 Semikron Elektronik Gmbh & Co. Kg Leistungshalbeitermodul mit flexibler äusserer Anschlussbelegung
DE10340297B4 (de) * 2003-09-02 2006-07-20 Semikron Elektronik Gmbh & Co. Kg Verbindugsanordnung zur Verbindung von aktiven und passiven elektrischen und elektronischen Bauelementen
DE102004037656B4 (de) * 2004-08-03 2009-06-18 Infineon Technologies Ag Elektronikmodul mit optimierter Montagefähigkeit und Bauteilanordnung mit einem Elektronikmodul

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4031051A1 (de) * 1989-11-14 1991-05-16 Siemens Ag Modul mit mindestens einem halbleiterschaltelement und einer ansteuerschaltung
CN1234910A (zh) * 1997-06-28 1999-11-10 罗伯特·博施有限公司 电子控制装置
DE19735071A1 (de) * 1997-08-13 1998-12-10 Telefunken Microelectron Leistungsmodul
CN1700453A (zh) * 2004-04-29 2005-11-23 塞米克朗电子有限公司 与功率半导体模块形成压力接触的结构

Also Published As

Publication number Publication date
EP1855319A3 (de) 2008-05-28
EP1855319B1 (de) 2016-12-21
US7495324B2 (en) 2009-02-24
JP2007305983A (ja) 2007-11-22
CN101071809A (zh) 2007-11-14
KR20070109838A (ko) 2007-11-15
US20070272976A1 (en) 2007-11-29
EP1855319A2 (de) 2007-11-14
DE102006021412B3 (de) 2007-11-15

Similar Documents

Publication Publication Date Title
CN101071809B (zh) 功率半导体模块
US7494389B1 (en) Press-fit-connection
CN100539137C (zh) 用作h-桥电路的功率半导体模块及其制造方法
CN101714545B (zh) 半导体装置
US7800222B2 (en) Semiconductor module with switching components and driver electronics
US7298027B2 (en) SMT three phase inverter package and lead frame
WO2002058152A3 (en) Electronic circuit device and method for manufacturing the same
CN101202258B (zh) 具有接触弹簧的功率半导体模件
CN101577262A (zh) 功率半导体模块系统
JP2000307056A (ja) 車載用半導体装置
CN102468295A (zh) 具有插入物的半导体模块以及用于生产具有插入物的半导体模块的方法
CN102456652A (zh) 功率半导体装置
CN104282641A (zh) 半导体装置
CN101794742A (zh) 按照压力接触方式实施的功率半导体模块
WO2009093982A4 (en) Power switching module
US8134838B2 (en) Semiconductor module and method
US20080019108A1 (en) Power Amplifier
CN110582847B (zh) 半导体模块
CN106717135B (zh) 印刷电路板和印刷电路板布置
JP2013033874A (ja) パワーモジュール
US5324890A (en) Direct bond copper-output footprint
CN108010891B (zh) 功率半导体模块
CN104952860A (zh) 功率半导体组件
US20030171026A1 (en) Electrical device
US8154874B2 (en) Use of flexible circuits in a power module for forming connections to power devices

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20110803

Termination date: 20210509

CF01 Termination of patent right due to non-payment of annual fee