CN101068005B - 由多个金属层制成的半导体装置封装引线框架 - Google Patents
由多个金属层制成的半导体装置封装引线框架 Download PDFInfo
- Publication number
- CN101068005B CN101068005B CN200710090879.3A CN200710090879A CN101068005B CN 101068005 B CN101068005 B CN 101068005B CN 200710090879 A CN200710090879 A CN 200710090879A CN 101068005 B CN101068005 B CN 101068005B
- Authority
- CN
- China
- Prior art keywords
- lead frame
- plane
- metal level
- metal layer
- protruding body
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/416,994 | 2006-05-02 | ||
| US11/416,994 US20070130759A1 (en) | 2005-06-15 | 2006-05-02 | Semiconductor device package leadframe formed from multiple metal layers |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101068005A CN101068005A (zh) | 2007-11-07 |
| CN101068005B true CN101068005B (zh) | 2010-12-29 |
Family
ID=38769289
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200710090879.3A Active CN101068005B (zh) | 2006-05-02 | 2007-04-09 | 由多个金属层制成的半导体装置封装引线框架 |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP2007300088A (enExample) |
| CN (1) | CN101068005B (enExample) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101521164B (zh) * | 2008-02-26 | 2011-01-05 | 上海凯虹科技电子有限公司 | 引线键合芯片级封装方法 |
| US8309400B2 (en) * | 2010-10-15 | 2012-11-13 | Advanced Semiconductor Engineering, Inc. | Leadframe package structure and manufacturing method thereof |
| CN102915988A (zh) * | 2012-10-31 | 2013-02-06 | 矽力杰半导体技术(杭州)有限公司 | 一种引线框架以及应用其的倒装封装装置 |
| CN103928431B (zh) * | 2012-10-31 | 2017-03-01 | 矽力杰半导体技术(杭州)有限公司 | 一种倒装封装装置 |
| CN103594448A (zh) * | 2013-11-15 | 2014-02-19 | 杰群电子科技(东莞)有限公司 | 一种引线框架 |
| US11298775B2 (en) | 2018-05-24 | 2022-04-12 | Honda Motor Co., Ltd. | Continuous ultrasonic additive manufacturing |
| CN110524891A (zh) * | 2018-05-24 | 2019-12-03 | 本田技研工业株式会社 | 连续超声波增材制造 |
| JP7071631B2 (ja) | 2018-06-25 | 2022-05-19 | 日亜化学工業株式会社 | パッケージ、発光装置及びそれぞれの製造方法 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5352632A (en) * | 1991-02-08 | 1994-10-04 | Kabushiki Kaisha Toshiba | Multichip packaged semiconductor device and method for manufacturing the same |
| CN1449583A (zh) * | 2000-07-25 | 2003-10-15 | Ssi株式会社 | 塑料封装基底、气腔型封装及其制造方法 |
| CN1532925A (zh) * | 2003-03-18 | 2004-09-29 | ��·��֥���Ӳ�Ʒ��ʽ���� | 引线框架以及使用引线框架的电子零件 |
-
2007
- 2007-04-09 CN CN200710090879.3A patent/CN101068005B/zh active Active
- 2007-04-12 JP JP2007104458A patent/JP2007300088A/ja active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5352632A (en) * | 1991-02-08 | 1994-10-04 | Kabushiki Kaisha Toshiba | Multichip packaged semiconductor device and method for manufacturing the same |
| CN1449583A (zh) * | 2000-07-25 | 2003-10-15 | Ssi株式会社 | 塑料封装基底、气腔型封装及其制造方法 |
| CN1532925A (zh) * | 2003-03-18 | 2004-09-29 | ��·��֥���Ӳ�Ʒ��ʽ���� | 引线框架以及使用引线框架的电子零件 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2007300088A (ja) | 2007-11-15 |
| CN101068005A (zh) | 2007-11-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR101298225B1 (ko) | 반도체 다이 패키지 및 그의 제조 방법 | |
| US6720207B2 (en) | Leadframe, resin-molded semiconductor device including the leadframe, method of making the leadframe and method for manufacturing the device | |
| CN101068005B (zh) | 由多个金属层制成的半导体装置封装引线框架 | |
| US8105932B2 (en) | Mixed wire semiconductor lead frame package | |
| JP2005191240A (ja) | 半導体装置及びその製造方法 | |
| US20040080025A1 (en) | Lead frame, method of manufacturing the same, and semiconductor device manufactured with the same | |
| KR20140032923A (ko) | 와이어리스 모듈 | |
| JPH04280462A (ja) | リードフレームおよびこのリードフレームを使用した半導体装置 | |
| US20070130759A1 (en) | Semiconductor device package leadframe formed from multiple metal layers | |
| CN104979300B (zh) | 芯片封装结构及其制作方法 | |
| US20200243428A1 (en) | Packaged multichip module with conductive connectors | |
| JP2004363365A (ja) | 半導体装置及びその製造方法 | |
| KR101753416B1 (ko) | Ic 패키지용 리드프레임 및 제조방법 | |
| JP2010050288A (ja) | 樹脂封止型半導体装置およびその製造方法 | |
| JPWO2007057954A1 (ja) | 半導体装置及びその製造方法 | |
| JP2005191158A (ja) | 半導体装置及びその製造方法 | |
| JP3965813B2 (ja) | ターミナルランドフレームの製造方法 | |
| JP7617812B2 (ja) | リードフレーム、半導体装置及びリードフレームの製造方法 | |
| JP2006279088A (ja) | 半導体装置の製造方法 | |
| JP2007208278A (ja) | ターミナルランドフレームおよびその製造方法ならびに樹脂封止型半導体装置およびその製造方法 | |
| JP2007335449A (ja) | 半導体装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |