CN101044688A - 节省存储器的ldpc译码方法和装置 - Google Patents
节省存储器的ldpc译码方法和装置 Download PDFInfo
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- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
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- H03M13/63—Joint error correction and other techniques
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- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
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- H03M13/1117—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms using approximations for check node processing, e.g. an outgoing message is depending on the signs and the minimum over the magnitudes of all incoming messages according to the min-sum rule
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- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
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- Physics & Mathematics (AREA)
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- Error Detection And Correction (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
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Abstract
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Claims (36)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/909,753 | 2004-08-02 | ||
US10/909,753 US7127659B2 (en) | 2004-08-02 | 2004-08-02 | Memory efficient LDPC decoding methods and apparatus |
PCT/US2005/027526 WO2006017555A2 (en) | 2004-08-02 | 2005-08-01 | Memory efficient ldpc decoding methods and apparatus |
Publications (2)
Publication Number | Publication Date |
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CN101044688A true CN101044688A (zh) | 2007-09-26 |
CN101044688B CN101044688B (zh) | 2012-06-13 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2005800334730A Expired - Fee Related CN101044688B (zh) | 2004-08-02 | 2005-08-01 | 节省存储器的ldpc译码方法和装置 |
Country Status (11)
Country | Link |
---|---|
US (2) | US7127659B2 (zh) |
EP (2) | EP2683086A3 (zh) |
JP (1) | JP4567734B2 (zh) |
KR (1) | KR100888096B1 (zh) |
CN (1) | CN101044688B (zh) |
AU (1) | AU2005271540A1 (zh) |
CA (1) | CA2575953C (zh) |
NO (1) | NO20071133L (zh) |
UA (1) | UA86987C2 (zh) |
WO (1) | WO2006017555A2 (zh) |
ZA (1) | ZA200701825B (zh) |
Cited By (5)
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CN101188426B (zh) * | 2007-12-05 | 2011-06-22 | 深圳国微技术有限公司 | 用于对准循环结构的ldpc码进行并行处理的译码器及方法 |
CN102970047A (zh) * | 2012-12-01 | 2013-03-13 | 电子科技大学 | 基于平均幅度的ldpc码加权梯度下降比特翻转译码算法 |
CN104052497A (zh) * | 2013-03-13 | 2014-09-17 | 马维尔国际贸易有限公司 | 使用部分可靠性信息解码的系统和方法 |
TWI657669B (zh) * | 2017-11-28 | 2019-04-21 | 財團法人資訊工業策進會 | 低密度奇偶檢查碼解碼器及其解碼方法 |
CN110535476A (zh) * | 2019-09-30 | 2019-12-03 | 深圳忆联信息系统有限公司 | Ldpc软译码器软信息存储优化方法、装置、计算机设备及存储介质 |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4138700B2 (ja) * | 2004-05-31 | 2008-08-27 | 株式会社東芝 | 復号装置および復号回路 |
US7617432B2 (en) * | 2004-11-10 | 2009-11-10 | Qualcomm Incorporated | Hierarchical design and layout optimizations for high throughput parallel LDPC decoders |
US7594154B2 (en) * | 2004-11-17 | 2009-09-22 | Ramakrishna Vedantham | Encoding and decoding modules with forward error correction |
US7441178B2 (en) * | 2005-02-24 | 2008-10-21 | Keyeye Communications | Low complexity decoding of low density parity check codes |
TWI291290B (en) * | 2005-04-21 | 2007-12-11 | Univ Nat Chiao Tung | Method for updating check-node of low-density parity-check (LDPC) codes decoder and device using the same |
US7571372B1 (en) | 2005-06-23 | 2009-08-04 | Marvell International Ltd. | Methods and algorithms for joint channel-code decoding of linear block codes |
US7761768B2 (en) * | 2005-06-24 | 2010-07-20 | Intel Corporation | Techniques for reconfigurable decoder for a wireless system |
US7818649B1 (en) * | 2005-11-30 | 2010-10-19 | Aquantia Corporation | Efficient message passing scheme of iterative error correcting decoders |
US7509528B2 (en) * | 2006-03-10 | 2009-03-24 | Alcatel Lucent | Transaction bundling for improved redundancy |
US20070245217A1 (en) * | 2006-03-28 | 2007-10-18 | Stmicroelectronics S.R.L. | Low-density parity check decoding |
EP1841073A1 (en) * | 2006-03-29 | 2007-10-03 | STMicroelectronics N.V. | Fast convergence LDPC decoding using BCJR algorithm at the check nodes |
US8028216B1 (en) * | 2006-06-02 | 2011-09-27 | Marvell International Ltd. | Embedded parity coding for data storage |
US7644339B2 (en) * | 2006-10-02 | 2010-01-05 | Broadcom Corporation | Overlapping sub-matrix based LDPC (low density parity check) decoder |
US8457005B2 (en) | 2006-11-08 | 2013-06-04 | Trellisware Technologies, Inc. | Method and system for establishing cooperative routing in wireless networks |
US8588126B2 (en) * | 2006-11-08 | 2013-11-19 | Trellisware Technologies, Inc. | Methods and apparatus for network communication via barrage relay onto an independent medium allocation |
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WO2008069567A1 (en) * | 2006-12-05 | 2008-06-12 | Electronics And Telecommunications Research Institute | Apparatus and method for updating check node of low-density parity check codes |
US8504890B2 (en) * | 2006-12-17 | 2013-08-06 | Ramot At Tel Aviv University Ltd. | Scheduling for LDPC decoding |
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US8418023B2 (en) | 2007-05-01 | 2013-04-09 | The Texas A&M University System | Low density parity check decoder for irregular LDPC codes |
US8151171B2 (en) * | 2007-05-07 | 2012-04-03 | Broadcom Corporation | Operational parameter adaptable LDPC (low density parity check) decoder |
US20090013239A1 (en) * | 2007-07-02 | 2009-01-08 | Broadcom Corporation | LDPC (Low Density Parity Check) decoder employing distributed check and/or variable node architecture |
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US8576946B2 (en) * | 2007-10-19 | 2013-11-05 | Trellisware Technologies, Inc. | Method and system for cooperative communications with minimal coordination |
US8181081B1 (en) | 2007-11-30 | 2012-05-15 | Marvell International Ltd. | System and method for decoding correlated data |
US8156409B2 (en) * | 2008-02-29 | 2012-04-10 | Seagate Technology Llc | Selectively applied hybrid min-sum approximation for constraint node updates of LDPC decoders |
US8005990B2 (en) * | 2008-02-29 | 2011-08-23 | Newport Media, Inc. | Efficient decoding of mobile multimedia multicast system non real-time service files |
CN101854178B (zh) * | 2009-04-01 | 2013-01-30 | 中国科学院微电子研究所 | 一种低功耗的ldpc译码器 |
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US9032067B2 (en) * | 2010-03-12 | 2015-05-12 | Fujitsu Limited | Determining differences in an event-driven application accessed in different client-tier environments |
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US8880588B2 (en) | 2010-10-29 | 2014-11-04 | Fujitsu Limited | Technique for stateless distributed parallel crawling of interactive client-server applications |
US9400962B2 (en) | 2010-10-29 | 2016-07-26 | Fujitsu Limited | Architecture for distributed, parallel crawling of interactive client-server applications |
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US8843812B1 (en) | 2011-03-23 | 2014-09-23 | Sk Hynix Memory Solutions Inc. | Buffer management in a turbo equalization system |
US9143166B1 (en) * | 2011-03-23 | 2015-09-22 | Sk Hynix Memory Solutions Inc. | Adaptive scheduling of turbo equalization based on a metric |
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US8879428B2 (en) * | 2011-12-01 | 2014-11-04 | Telefonaktiebolaget L M Ericsson (Publ) | Systems and method for graph-based distributed parameter coordination in a communication network |
US8989050B2 (en) * | 2011-12-01 | 2015-03-24 | Telefonaktiebolaget L M Ericsson (Publ) | Graph-based distributed coordination methods for wireless communication networks |
US8954820B2 (en) | 2012-02-10 | 2015-02-10 | Stec, Inc. | Reduced complexity non-binary LDPC decoding algorithm |
US8880951B2 (en) | 2012-04-06 | 2014-11-04 | Fujitsu Limited | Detection of dead widgets in software applications |
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US8972834B2 (en) | 2012-08-28 | 2015-03-03 | Hughes Network Systems, Llc | System and method for communicating with low density parity check codes |
US20140082449A1 (en) * | 2012-09-18 | 2014-03-20 | Fan Zhang | LDPC Decoder With Variable Node Hardening |
RU2522299C1 (ru) * | 2013-01-11 | 2014-07-10 | Государственное казенное образовательное учреждение высшего профессионального образования Академия Федеральной службы охраны Российской Федерации (Академия ФСО России) | Способ и устройство помехоустойчивого декодирования сигналов, полученных с использованием кода проверки на четность с низкой плотностью |
US9094132B1 (en) | 2013-01-23 | 2015-07-28 | Viasat, Inc. | High data rate optical transport network using 8-PSK |
US8930789B1 (en) * | 2013-01-23 | 2015-01-06 | Viasat, Inc. | High-speed LDPC decoder |
KR101698875B1 (ko) | 2013-03-14 | 2017-01-24 | 한국전자통신연구원 | Ldpc 부호의 복호 방법 및 장치 |
US9513989B2 (en) * | 2013-03-26 | 2016-12-06 | Seagate Technology Llc | Priori information based post-processing in low-density parity-check code decoders |
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US9743397B2 (en) | 2013-11-14 | 2017-08-22 | Telefonaktiebolaget L M Ericsson (Publ) | Reduced-size message pass in factor graphs for wireless communications networks |
CN105814799B (zh) * | 2013-12-09 | 2019-03-01 | 三菱电机株式会社 | 纠错解码装置 |
TWI551058B (zh) * | 2014-05-09 | 2016-09-21 | 衡宇科技股份有限公司 | 最小-總和演算法之低密度奇偶校驗碼解碼器及其解碼方法 |
US9391647B2 (en) * | 2014-07-18 | 2016-07-12 | Storart Technology Co., Ltd. | Decoder and decoding method thereof for min-sum algorithm low density parity-check code |
KR102189440B1 (ko) | 2014-08-25 | 2020-12-14 | 삼성전자주식회사 | 에러 정정 디코더를 포함하는 스토리지 장치 및 에러 정정 디코더의 동작 방법 |
US20160182083A1 (en) * | 2014-12-23 | 2016-06-23 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Systems and Methods for Decoder Scheduling With Overlap and/or Switch Limiting |
US9590657B2 (en) | 2015-02-06 | 2017-03-07 | Alcatel-Lucent Usa Inc. | Low power low-density parity-check decoding |
US9935654B2 (en) * | 2015-02-06 | 2018-04-03 | Alcatel-Lucent Usa Inc. | Low power low-density parity-check decoding |
CN104852746B (zh) * | 2015-05-27 | 2017-11-03 | 北京邮电大学 | Ldpc码的译码器和译码方法 |
SG11201700048PA (en) * | 2015-10-13 | 2017-05-30 | Huawei Tech Co Ltd | Decoding device and method and signal transmission system |
US10784901B2 (en) | 2015-11-12 | 2020-09-22 | Qualcomm Incorporated | Puncturing for structured low density parity check (LDPC) codes |
US10469104B2 (en) | 2016-06-14 | 2019-11-05 | Qualcomm Incorporated | Methods and apparatus for compactly describing lifted low-density parity-check (LDPC) codes |
KR102626162B1 (ko) * | 2016-06-14 | 2024-01-18 | 삼성전자주식회사 | 연산 복잡도를 감소시킬 수 있는 디코더의 동작 방법과 이를 포함하는 데이터 저장 장치의 동작 방법 |
WO2018084735A1 (en) | 2016-11-03 | 2018-05-11 | Huawei Technologies Co., Ltd. | Efficiently decodable qc-ldpc code |
US10340949B2 (en) | 2017-02-06 | 2019-07-02 | Qualcomm Incorporated | Multiple low density parity check (LDPC) base graph design |
US10312939B2 (en) | 2017-06-10 | 2019-06-04 | Qualcomm Incorporated | Communication techniques involving pairwise orthogonality of adjacent rows in LPDC code |
EP3891897B1 (en) * | 2018-12-03 | 2024-01-24 | Universite De Bretagne Sud | Iterative decoder for decoding a code composed of at least two constraint nodes |
Family Cites Families (42)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3542756A (en) | 1968-02-07 | 1970-11-24 | Codex Corp | Error correcting |
US3665396A (en) | 1968-10-11 | 1972-05-23 | Codex Corp | Sequential decoding |
US4295218A (en) | 1979-06-25 | 1981-10-13 | Regents Of The University Of California | Error-correcting coding system |
DE3483349D1 (de) * | 1983-10-25 | 1990-11-08 | Nissan Motor | Kuehlvorrichtung fuer eine kraftfahrzeugmaschine. |
US5293489A (en) | 1985-01-24 | 1994-03-08 | Nec Corporation | Circuit arrangement capable of centralizing control of a switching network |
US5271042A (en) | 1989-10-13 | 1993-12-14 | Motorola, Inc. | Soft decision decoding with channel equalization |
US5157671A (en) | 1990-05-29 | 1992-10-20 | Space Systems/Loral, Inc. | Semi-systolic architecture for decoding error-correcting codes |
US5313609A (en) | 1991-05-23 | 1994-05-17 | International Business Machines Corporation | Optimum write-back strategy for directory-based cache coherence protocols |
US5396518A (en) | 1993-05-05 | 1995-03-07 | Gi Corporation | Apparatus and method for communicating digital data using trellis coding with punctured convolutional codes |
US5457704A (en) | 1993-05-21 | 1995-10-10 | At&T Ipm Corp. | Post processing method and apparatus for symbol reliability generation |
US5526501A (en) | 1993-08-12 | 1996-06-11 | Hughes Aircraft Company | Variable accuracy indirect addressing scheme for SIMD multi-processors and apparatus implementing same |
US5615298A (en) | 1994-03-14 | 1997-03-25 | Lucent Technologies Inc. | Excitation signal synthesis during frame erasure or packet loss |
US5860085A (en) | 1994-08-01 | 1999-01-12 | Cypress Semiconductor Corporation | Instruction set for a content addressable memory array with read/write circuits and an interface register logic block |
US5671221A (en) | 1995-06-14 | 1997-09-23 | Sharp Microelectronics Technology, Inc. | Receiving method and apparatus for use in a spread-spectrum communication system |
US5867538A (en) | 1995-08-15 | 1999-02-02 | Hughes Electronics Corporation | Computational simplified detection of digitally modulated radio signals providing a detection of probability for each symbol |
US5968198A (en) | 1996-08-16 | 1999-10-19 | Ericsson, Inc. | Decoder utilizing soft information output to minimize error rates |
AU728200B2 (en) * | 1996-09-11 | 2001-01-04 | Sankyo Lifetech Company Limited | Insecticidal composition |
US5892962A (en) | 1996-11-12 | 1999-04-06 | Lucent Technologies Inc. | FPGA-based processor |
US5909572A (en) | 1996-12-02 | 1999-06-01 | Compaq Computer Corp. | System and method for conditionally moving an operand from a source register to a destination register |
US6438180B1 (en) | 1997-05-09 | 2002-08-20 | Carnegie Mellon University | Soft and hard sequence detection in ISI memory channels |
GB2326253A (en) | 1997-06-10 | 1998-12-16 | Advanced Risc Mach Ltd | Coprocessor data access control |
US5933650A (en) | 1997-10-09 | 1999-08-03 | Mips Technologies, Inc. | Alignment and ordering of vector elements for single instruction multiple data processing |
US5864703A (en) | 1997-10-09 | 1999-01-26 | Mips Technologies, Inc. | Method for providing extended precision in SIMD vector arithmetic operations |
US6195777B1 (en) | 1997-11-06 | 2001-02-27 | Compaq Computer Corporation | Loss resilient code with double heavy tailed series of redundant layers |
US6073250A (en) | 1997-11-06 | 2000-06-06 | Luby; Michael G. | Loss resilient decoding technique |
US6339834B1 (en) | 1998-05-28 | 2002-01-15 | Her Majesty The Queen In Right Of Canada, As Represented By The Minister Of Industry Through The Communication Research Centre | Interleaving with golden section increments |
JP2002526965A (ja) | 1998-09-28 | 2002-08-20 | アドバンスト ハードウェア アーキテクチャーズ,インコーポレイテッド | ターボプロダクト符号復号器 |
US6247158B1 (en) | 1998-11-30 | 2001-06-12 | Itt Manufacturing Enterprises, Inc. | Digital broadcasting system and method |
US6397240B1 (en) | 1999-02-18 | 2002-05-28 | Agere Systems Guardian Corp. | Programmable accelerator for a programmable processor system |
US6473010B1 (en) | 2000-04-04 | 2002-10-29 | Marvell International, Ltd. | Method and apparatus for determining error correction code failure rate for iterative decoding algorithms |
US6539367B1 (en) * | 2000-05-26 | 2003-03-25 | Agere Systems Inc. | Methods and apparatus for decoding of general codes on probability dependency graphs |
JP4389373B2 (ja) * | 2000-10-11 | 2009-12-24 | ソニー株式会社 | 2元巡回符号を反復型復号するための復号器 |
US6754804B1 (en) | 2000-12-29 | 2004-06-22 | Mips Technologies, Inc. | Coprocessor interface transferring multiple instructions simultaneously along with issue path designation and/or issue order designation for the instructions |
US6731700B1 (en) | 2001-01-04 | 2004-05-04 | Comsys Communication & Signal Processing Ltd. | Soft decision output generator |
US6938196B2 (en) * | 2001-06-15 | 2005-08-30 | Flarion Technologies, Inc. | Node processors for use in parity check decoders |
US6633856B2 (en) * | 2001-06-15 | 2003-10-14 | Flarion Technologies, Inc. | Methods and apparatus for decoding LDPC codes |
US6842872B2 (en) * | 2001-10-01 | 2005-01-11 | Mitsubishi Electric Research Laboratories, Inc. | Evaluating and optimizing error-correcting codes using projective analysis |
US6718504B1 (en) | 2002-06-05 | 2004-04-06 | Arc International | Method and apparatus for implementing a data processor adapted for turbo decoding |
US7178080B2 (en) | 2002-08-15 | 2007-02-13 | Texas Instruments Incorporated | Hardware-efficient low density parity check code for digital communications |
JP4062435B2 (ja) * | 2002-12-03 | 2008-03-19 | 日本電気株式会社 | 誤り訂正符号復号装置 |
US6957375B2 (en) * | 2003-02-26 | 2005-10-18 | Flarion Technologies, Inc. | Method and apparatus for performing low-density parity-check (LDPC) code operations using a multi-level permutation |
US11079672B2 (en) | 2018-10-31 | 2021-08-03 | Taiwan Semiconductor Manufacturing Company Ltd. | Method and system for layout enhancement based on inter-cell correlation |
-
2004
- 2004-08-02 US US10/909,753 patent/US7127659B2/en active Active
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2005
- 2005-08-01 EP EP13020082.7A patent/EP2683086A3/en not_active Withdrawn
- 2005-08-01 WO PCT/US2005/027526 patent/WO2006017555A2/en active Application Filing
- 2005-08-01 KR KR1020077004979A patent/KR100888096B1/ko active IP Right Grant
- 2005-08-01 UA UAA200702219A patent/UA86987C2/ru unknown
- 2005-08-01 CN CN2005800334730A patent/CN101044688B/zh not_active Expired - Fee Related
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- 2005-08-01 EP EP05782140A patent/EP1782541A4/en not_active Withdrawn
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-
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- 2007-02-28 NO NO20071133A patent/NO20071133L/no not_active Application Discontinuation
- 2007-03-01 ZA ZA200701825A patent/ZA200701825B/xx unknown
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101188426B (zh) * | 2007-12-05 | 2011-06-22 | 深圳国微技术有限公司 | 用于对准循环结构的ldpc码进行并行处理的译码器及方法 |
CN102970047A (zh) * | 2012-12-01 | 2013-03-13 | 电子科技大学 | 基于平均幅度的ldpc码加权梯度下降比特翻转译码算法 |
CN102970047B (zh) * | 2012-12-01 | 2016-02-24 | 电子科技大学 | 基于平均幅度的ldpc码加权梯度下降比特翻转译码算法 |
CN104052497A (zh) * | 2013-03-13 | 2014-09-17 | 马维尔国际贸易有限公司 | 使用部分可靠性信息解码的系统和方法 |
CN104052497B (zh) * | 2013-03-13 | 2018-09-18 | 马维尔国际贸易有限公司 | 使用部分可靠性信息解码的系统和方法 |
TWI657669B (zh) * | 2017-11-28 | 2019-04-21 | 財團法人資訊工業策進會 | 低密度奇偶檢查碼解碼器及其解碼方法 |
CN110535476A (zh) * | 2019-09-30 | 2019-12-03 | 深圳忆联信息系统有限公司 | Ldpc软译码器软信息存储优化方法、装置、计算机设备及存储介质 |
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AU2005271540A1 (en) | 2006-02-16 |
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UA86987C2 (ru) | 2009-06-10 |
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CA2575953A1 (en) | 2006-02-16 |
CN101044688B (zh) | 2012-06-13 |
JP2008508835A (ja) | 2008-03-21 |
JP4567734B2 (ja) | 2010-10-20 |
US7376885B2 (en) | 2008-05-20 |
US20070168832A1 (en) | 2007-07-19 |
CA2575953C (en) | 2009-08-25 |
WO2006017555A2 (en) | 2006-02-16 |
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