SG11201700048PA - Decoding device and method and signal transmission system - Google Patents
Decoding device and method and signal transmission systemInfo
- Publication number
- SG11201700048PA SG11201700048PA SG11201700048PA SG11201700048PA SG11201700048PA SG 11201700048P A SG11201700048P A SG 11201700048PA SG 11201700048P A SG11201700048P A SG 11201700048PA SG 11201700048P A SG11201700048P A SG 11201700048PA SG 11201700048P A SG11201700048P A SG 11201700048PA
- Authority
- SG
- Singapore
- Prior art keywords
- signal transmission
- transmission system
- decoding device
- decoding
- signal
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
- H03M13/1117—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms using approximations for check node processing, e.g. an outgoing message is depending on the signs and the minimum over the magnitudes of all incoming messages according to the min-sum rule
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1131—Scheduling of bit node or check node processing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1131—Scheduling of bit node or check node processing
- H03M13/114—Shuffled, staggered, layered or turbo decoding schedules
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/1157—Low-density generator matrices [LDGM]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/43—Majority logic or threshold decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/615—Use of computational or mathematical techniques
- H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6577—Representation or format of variables, register sizes or word-lengths and quantization
- H03M13/6591—Truncation, saturation and clamping
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1128—Judging correct decoding and iterative stopping criteria other than syndrome check and upper limit for decoding iterations
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2015091887 | 2015-10-13 | ||
PCT/CN2015/097284 WO2017063263A1 (en) | 2015-10-13 | 2015-12-14 | Decoding device and method, and signal transmission system |
Publications (1)
Publication Number | Publication Date |
---|---|
SG11201700048PA true SG11201700048PA (en) | 2017-05-30 |
Family
ID=58518218
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG10201707007QA SG10201707007QA (en) | 2015-10-13 | 2015-12-14 | Decoding device and method and signal transmission system |
SG11201700048PA SG11201700048PA (en) | 2015-10-13 | 2015-12-14 | Decoding device and method and signal transmission system |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG10201707007QA SG10201707007QA (en) | 2015-10-13 | 2015-12-14 | Decoding device and method and signal transmission system |
Country Status (12)
Country | Link |
---|---|
US (1) | US10447300B2 (en) |
EP (1) | EP3211798B1 (en) |
JP (1) | JP6426272B2 (en) |
KR (2) | KR101813132B1 (en) |
CN (2) | CN107852175B (en) |
AU (2) | AU2015400311B2 (en) |
BR (1) | BR112017000548B1 (en) |
CA (1) | CA2953609C (en) |
MX (1) | MX358246B (en) |
RU (2) | RU2688276C2 (en) |
SG (2) | SG10201707007QA (en) |
WO (1) | WO2017063263A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111817728B (en) * | 2020-08-03 | 2022-03-01 | 华中科技大学 | Simulation system for realizing LDPC coding and decoding based on hardware and working method thereof |
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EP0732855B1 (en) * | 1995-03-15 | 2002-10-16 | Kabushiki Kaisha Toshiba | Moving picture variable length coding system and method |
US6240538B1 (en) * | 1998-09-10 | 2001-05-29 | Ericsson Inc. | Method and apparatus for errors and erasures decoding |
DE19907729C2 (en) * | 1999-02-23 | 2001-02-22 | Fraunhofer Ges Forschung | Method and device for generating a data stream from code words of variable length and method and device for reading a data stream from code words of variable length |
US6938196B2 (en) | 2001-06-15 | 2005-08-30 | Flarion Technologies, Inc. | Node processors for use in parity check decoders |
US7673223B2 (en) * | 2001-06-15 | 2010-03-02 | Qualcomm Incorporated | Node processors for use in parity check decoders |
WO2003021440A1 (en) * | 2001-09-01 | 2003-03-13 | Bermai, Inc. | Decoding architecture for low density parity check codes |
AU2003242902A1 (en) * | 2002-06-20 | 2004-01-06 | Koninklijke Philips Electronics N.V. | Balanced disparity channel code for dc control |
US7178080B2 (en) | 2002-08-15 | 2007-02-13 | Texas Instruments Incorporated | Hardware-efficient low density parity check code for digital communications |
JP3815557B2 (en) * | 2002-08-27 | 2006-08-30 | ソニー株式会社 | Encoding apparatus, encoding method, decoding apparatus, and decoding method |
US7346832B2 (en) * | 2004-07-21 | 2008-03-18 | Qualcomm Incorporated | LDPC encoding methods and apparatus |
US7127659B2 (en) | 2004-08-02 | 2006-10-24 | Qualcomm Incorporated | Memory efficient LDPC decoding methods and apparatus |
US7441178B2 (en) | 2005-02-24 | 2008-10-21 | Keyeye Communications | Low complexity decoding of low density parity check codes |
JP4595650B2 (en) | 2005-04-25 | 2010-12-08 | ソニー株式会社 | Decoding device and decoding method |
US7761768B2 (en) * | 2005-06-24 | 2010-07-20 | Intel Corporation | Techniques for reconfigurable decoder for a wireless system |
US7129862B1 (en) * | 2005-07-29 | 2006-10-31 | Texas Instruments Incorporated | Decoding bit streams encoded according to variable length codes |
KR20070084952A (en) * | 2006-02-22 | 2007-08-27 | 삼성전자주식회사 | Apparatus and method for receiving signal in a communication system |
US7774689B2 (en) * | 2006-03-17 | 2010-08-10 | Industrial Technology Research Institute | Encoding and decoding methods and systems |
CN101064591B (en) | 2006-04-24 | 2010-05-12 | 中兴通讯股份有限公司 | Decoding method for low density parity check code and its check node refreshing circuit |
CN100499378C (en) | 2006-05-26 | 2009-06-10 | 清华大学 | Low-density odd-parity check-code decoding method adopting uniform quantizing variable range |
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CN101047387B (en) * | 2007-03-23 | 2010-06-09 | 北京大学 | Construction method of multi-code rate compatible LDPC code and its decoder |
US8291292B1 (en) * | 2008-01-09 | 2012-10-16 | Marvell International Ltd. | Optimizing error floor performance of finite-precision layered decoders of low-density parity-check (LDPC) codes |
JP4572937B2 (en) | 2008-01-23 | 2010-11-04 | ソニー株式会社 | Decoding device and method, program, and recording medium |
US8313029B2 (en) * | 2008-01-31 | 2012-11-20 | Seiko Epson Corporation | Apparatus and methods for decoding images |
KR101398212B1 (en) * | 2008-03-18 | 2014-05-26 | 삼성전자주식회사 | Memory device and encoding and/or decoding method |
US8291283B1 (en) * | 2008-06-06 | 2012-10-16 | Marvell International Ltd. | Layered quasi-cyclic LDPC decoder with reduced-complexity circular shifter |
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CN102164023A (en) | 2011-03-31 | 2011-08-24 | 复旦大学 | Method for decoding adaptive dynamic quantitative low density parity-check codes (LDPC) |
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CN102545913B (en) | 2012-02-07 | 2015-05-27 | 中兴通讯股份有限公司 | Iterative decoding method and iterative decoding system |
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-
2015
- 2015-12-14 AU AU2015400311A patent/AU2015400311B2/en active Active
- 2015-12-14 RU RU2017142566A patent/RU2688276C2/en active
- 2015-12-14 CA CA2953609A patent/CA2953609C/en active Active
- 2015-12-14 BR BR112017000548-4A patent/BR112017000548B1/en active IP Right Grant
- 2015-12-14 RU RU2017104492A patent/RU2639687C1/en active
- 2015-12-14 KR KR1020177001722A patent/KR101813132B1/en active IP Right Grant
- 2015-12-14 SG SG10201707007QA patent/SG10201707007QA/en unknown
- 2015-12-14 CN CN201580081494.3A patent/CN107852175B/en active Active
- 2015-12-14 MX MX2017002213A patent/MX358246B/en active IP Right Grant
- 2015-12-14 WO PCT/CN2015/097284 patent/WO2017063263A1/en active Application Filing
- 2015-12-14 CN CN201910422614.1A patent/CN110289863B/en active Active
- 2015-12-14 KR KR1020177036878A patent/KR102027354B1/en active IP Right Grant
- 2015-12-14 JP JP2017505615A patent/JP6426272B2/en active Active
- 2015-12-14 SG SG11201700048PA patent/SG11201700048PA/en unknown
- 2015-12-14 EP EP15906145.6A patent/EP3211798B1/en active Active
-
2017
- 2017-11-29 AU AU2017268580A patent/AU2017268580B2/en active Active
-
2018
- 2018-04-12 US US15/951,182 patent/US10447300B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
KR20180054518A (en) | 2018-05-24 |
RU2017142566A (en) | 2019-02-20 |
AU2015400311B2 (en) | 2017-11-02 |
US20180234113A1 (en) | 2018-08-16 |
KR20170058912A (en) | 2017-05-29 |
RU2017142566A3 (en) | 2019-02-20 |
EP3211798B1 (en) | 2019-12-04 |
WO2017063263A1 (en) | 2017-04-20 |
MX358246B (en) | 2018-08-09 |
CA2953609A1 (en) | 2017-04-13 |
MX2017002213A (en) | 2017-09-01 |
CN107852175A (en) | 2018-03-27 |
AU2017268580A1 (en) | 2017-12-21 |
CA2953609C (en) | 2018-01-30 |
CN110289863A (en) | 2019-09-27 |
EP3211798A4 (en) | 2018-03-14 |
JP6426272B2 (en) | 2018-11-21 |
EP3211798A1 (en) | 2017-08-30 |
AU2017268580B2 (en) | 2019-06-13 |
BR112017000548A2 (en) | 2017-11-14 |
KR101813132B1 (en) | 2017-12-28 |
CN107852175B (en) | 2019-05-28 |
SG10201707007QA (en) | 2017-09-28 |
RU2639687C1 (en) | 2017-12-21 |
BR112017000548B1 (en) | 2023-04-11 |
JP2017534190A (en) | 2017-11-16 |
CN110289863B (en) | 2022-04-05 |
RU2688276C2 (en) | 2019-05-21 |
AU2015400311A1 (en) | 2017-04-27 |
US10447300B2 (en) | 2019-10-15 |
KR102027354B1 (en) | 2019-11-04 |
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