CN101015054A - 用于封装集成电路晶片的封装和方法 - Google Patents

用于封装集成电路晶片的封装和方法 Download PDF

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Publication number
CN101015054A
CN101015054A CNA200580019097XA CN200580019097A CN101015054A CN 101015054 A CN101015054 A CN 101015054A CN A200580019097X A CNA200580019097X A CN A200580019097XA CN 200580019097 A CN200580019097 A CN 200580019097A CN 101015054 A CN101015054 A CN 101015054A
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hold assembly
lead
circuit chip
lead frame
interior section
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拉吉夫·丁卡尔·乔希
玛丽亚·克里斯蒂娜·B·埃斯塔西奥
戴维·钟
B·H·古伊
斯蒂芬·A·马丁
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Fairchild Semiconductor Corp
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Fairchild Semiconductor Corp
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Publication of CN101015054A publication Critical patent/CN101015054A/zh
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Abstract

一种集成电路组合件包含一具有复数个带有内部部分的引线的引线框。一导热夹持部件接合到所述引线的所述内部部分，使得所述夹持部件与所述引线框电隔离但热耦合到所述引线框。一集成电路晶片被接合且藉此热耦合到所述夹持部件。所述电路晶片电连接到线接合。密封材料安置在所述引线的所述内部部分和所述夹持部件的至少一部分上，并密封所述电路晶片和所述线接合。

Description

用于封装集成电路晶片的封装和方法
相关发明的交叉参考
本申请案主张2004年6月9日申请的美国专利申请案第10/864,909号的权益。
技术领域
本发明大体上涉及半导体装置，且更明确地说涉及一种用于封装集成电路晶片的封装和方法。
背景技术
将集成电路晶片(integrated circuit die)密封在封装内以保护电路晶片和对其形成的电互连受到外部环境的影响。一种封装集成电路晶片的方法通常包含将电路晶片接合到引线框的电路晶片叶片或衬垫的工艺。此类封装的一种配置通常称为微引线封装(micro-leaded package)。将电路晶片接合到引线框之后，电路晶片上的接合衬垫线接合到引线框的内部引线或引线指状物，且所述电路晶片、内部引线和接合线密封在密封材料中。
通常通过将电路晶片放置到先前已放置到叶片上的电路晶片附着材料层(例如，粘性环氧树脂或热塑性软焊料或金-硅共晶层)上来实现将电路晶片接合到引线框的叶片的工艺。所述电路晶片附着材料优选地为导热的，藉此准许且/或增强散热，且可能是或可能不是导电的。线接合工艺通常涉及线接合工具，其在接合线与接合表面(即，内部引线和/或电路晶片接合衬垫)之间通过压缩接合线抵靠所述表面来形成接合。
在电路晶片接合和线接合工艺期间，引线框的内部引线通常由夹钳机制夹钳到加热块或其它平坦表面。由于线接合工艺而发生的压缩力可促使未被夹钳的电路晶片叶片和安装在其上的电路晶片在大体上垂直于引线框的方向上移位且/或弹起，且藉此不利地影响与电路晶片接合衬垫进行线接合的工艺的能力。
电路晶片衬垫可形成有中心开口以减少电路晶片与电路晶片叶片之间的接触面积。或者，可通过将电路晶片直接安装在引线框的内部引线的内部末端上来减少电路晶片与引线框之间的接触面积。这种配置有时称为引线上芯片封装(chip-on-lead package)配置，其使得电路晶片的大部分未受到支撑且安装在内部引线的内部末端之间所界定的开放空间上方。然而，内部引线之间和/或电路晶片叶片内的这类开口必须小于电路晶片的安装表面面积。否则，电路晶片很可能未受到良好支撑或可能通过所述开口完全掉落。因此，此种电路晶片接合方案仅可与接触表面面积大于开放区域的尺寸的某些电路晶片类型和电路晶片尺寸一起使用。因此，减少电路晶片尺寸所获得的益处在很大程度上被制造商需要针对电路晶片尺寸的每一减少而设计并制造引线框抵消。此外，在电路晶片衬垫中形成中心开口增加了复杂性并增加了生产此种引线框的成本。
将电路晶片附着到带，接着将带附着到引线框的内部引线并处于开口上方解决了上述只能够对表面面积大于开口的电路晶片使用此种电路晶片接合方案的局限性。然而，带的使用增加了工艺步骤、复杂性和电路晶片接合工艺的成本。此外，由于带是由与电路晶片和引线框材料均不相同的材料制成的，所以可能出现分层问题。
不管电路晶片是直接安装到引线框还是经由带安装到引线框，电路晶片均在很大程度上与引线框的引线热隔离。因此，引线框的整个表面面积未被用来帮助散热。
因此，此项技术中需要一种集成电路封装和封装方法，其适应多种电路晶片尺寸，增强散热，并减少热应力和分层。
发明内容
本发明提供一种用于封装集成电路晶片的封装和方法。
本发明的一种形式包括一种集成电路组合件，其包含具有复数个带有内部部分的引线的引线框。导热夹持部件接合到所述引线的所述内部部分，使得所述夹持部件与所述引线框电隔离但热耦合到所述引线框。集成电路晶片被接合且藉此热耦合到所述夹持部件。所述电路晶片通过线接合而电连接到引线。密封材料安置在所述引线的所述内部部分和所述夹持部件的至少一部分上，并密封所述电路晶片和所述线接合。
本发明的一个优点是，单个引线框适应的电路晶片尺寸的范围扩大。
本发明的另一优点是，散热显著增强。
附图说明
通过结合附图参考对本发明一个实施例的以下描述，将容易了解并更好地理解本发明的上述和其它特征及优点以及获取这些特征及优点的方式，附图中：
图1是包含本发明的封装的一个实施例的集成电路装置的横截面图；
图2是图1的封装的仰视图；
图3是包含本发明的封装的第二实施例的集成电路装置的横截面图；
图4是图3的封装的仰视图；
图5是包含本发明的封装的第三实施例的集成电路装置的横截面图；
图6是包含本发明的封装的第二实施例的集成电路装置的横截面图；且
图7展示制造本发明的集成电路引线框和封装的方法的一个实施例。
在所述数个图中，相应的参考符号表示相应零件。本文陈述的范例以一种形式说明本发明的一个优选实施例，且这些范例不应解释为以任何方式限制本发明的范围。
具体实施方式
现参看附图，且明确地说参看图1和2，图中展示包含本发明封装的一实施例的集成电路装置。集成电路10大体上包含电路晶片12和封装20。集成电路10可实际上为任何尺寸且被配置成实际上任何类型的集成电路，例如微处理器或单个晶体管，当然这取决于电路晶片12的配置。电路晶片12密封在封装20内。
在图1和2的实施例中，封装20配置成微引线封装。然而，应了解，本发明与实际上任何类型或配置的并入有引线框的集成电路封装兼容。封装20包含引线框22、夹持部件24、接合线26和密封材料28。
引线框22是常规引线框，其具有复数个引线32和位于其中心部分的通过系杆(未图示)连接到引线框22的电路晶片衬垫34，且由例如铜或铜合金或其它合适材料的导电材料构成。引线32具有包含或封闭在封装20内的内部部分或末端32A，及其在封装20外部延伸且/或安置的外部部分(未参照)。
夹持部件24安置在引线框22上，使得至少其外周边区域(未引用)安置在引线32的内部部分或内部末端34A上，且其中心部分安置在电路晶片衬垫34上。夹持部件34通过导热且不导电的粘接膏或膜36(例如，Emerson & Cuming配销的Ablebond84-3粘接膏)而接合到引线框22。因此，夹持部件24热耦合到引线框22但与引线框22电隔离。夹持部件24由导电材料(例如铜)或不导电材料(例如硅)构成。用与形成电路晶片12的材料相同的材料或用热膨胀系数(CTE)近似等于形成电路晶片12的材料的材料来形成夹持部件24，会减少两者之间的热应力并因此减少了热引发的分层和破裂。
电路晶片12是常规的集成电路晶片，且安置在夹持部件24的与其接合到引线框22的一侧相对的一侧上。电路晶片12通过导热且不导电的膏或膜38(例如，Emerson & Cuming配销的Ablebond84-3粘接膏)接合到夹持部件24。因此，电路晶片12热耦合到夹持部件24但与夹持部件24电隔离。接合线26将电路晶片12上的电路晶片接合衬垫42电连接到引线框22的相应引线32。线接合工艺之后，在引线框22的内部部分32A、电路晶片12和接合线26周围形成(例如，经由转移成型)密封材料28，藉此形成密封封装20。
如上所述，电路晶片衬垫34通过系杆(未图示)而连接到引线框22。通常，此种系杆不提供对电路晶片的均匀支撑。然而，应尤其注意，通过将电路晶片12接合到夹持部件34，夹持部件进而安置在引线32的内部部分或末端32A上并接合到内部部分或末端32A且接合到电路晶片衬垫34，夹持部件24在电路晶片1 2的所有侧上均为其提供均匀的支撑。此种均匀的支撑显著地减少电路晶片/电路晶片衬垫在线接合工艺期间的弹起。此外，通过将电路晶片12接合到夹持部件24，夹持部件进而安置在引线32的内部部分或末端32A上并接合到内部部分或末端32A且接合到电路晶片衬垫34，可对于许多不同电路晶片尺寸和电路晶片类型使用共同电路晶片衬垫尺寸，藉此减少制造商必须生产和盘存的不同封装类型和引线框的数目。
现参看图3和4，图中展示包含本发明的封装的另一实施例的集成电路装置。集成电路60大体上类似于集成电路10，且使用相应的参考符号来表示相应零件。集成电路60包含电路晶片12和封装70。封装70包含引线框72、夹持部件74、接合线26和密封材料28。引线框72包含引线82，且与封装20的引线框22相比，其配置成引线上芯片引线框而没有电路晶片附着叶片。夹持部件74在其与其上面安置有电路晶片12的一侧相对的表面的周边周围包含凹进区域或平坦部分76。平坦部分76容纳引线框72的引线82的内部部分或末端，且通过导热且不导电的膏或膜86接合到所述内部部分或末端。
电路晶片12通过导热且不导电的膏或膜88(例如，Emerson & Cuming配销的Ablebond84-3粘接膏)接合到夹持部件74。因此，电路晶片12热耦合到夹持部件74但与夹持部件74电隔离。接合线26将电路晶片12上的电路晶片接合衬垫42电连接到引线框72的相应引线82。线接合工艺之后，形成密封材料28，藉此以与上文关于封装20所述大体上相同的方式形成密封封装70。
应注意，将夹持部件74接合到引线框72形成了一扩大了与引线框72兼容的电路晶片尺寸的范围引线框和/或封装子组合件。原本可能太小而不能适当地接合到引线框72的电路晶片现在经由夹持部件74容易地且适当地接合到引线框72。
在此引线上芯片实施例中，引线框22不具有专用的电路晶片衬垫。因此，引线框22通常将限于与具有特定最小尺寸或最小范围的尺寸且具有特定电路晶片类型的电路晶片一起使用。小于特定最小尺寸的电路晶片将被不充分地支撑在引线82的末端或内部部分上且/或通过其间的空间而完全掉落。然而，尤其应注意，通过将电路晶片12接合到夹持部件74，夹持部件进而安置在引线82的内部部分或末端上并接合到内部部分或末端，夹持部件74在电路晶片12的所有侧上均为其提供均匀的支撑。此种均匀的支撑显著地减少电路晶片在线接合工艺期间的弹起。此外，将电路晶片12接合到夹持部件74，夹持部件进而接着安置在引线框72上并接合到引线框72，防止了较小电路晶片被不充分地支撑在引线框72上且/或通过引线框72的中心空隙掉落，且藉此准许比原本可能的电路晶片尺寸和类型更广范围的(即，更小的)电路晶片尺寸和类型与引线框72一起使用。
还尤其应注意，凹进或压铸区域76减少了封装70的总高度，或减少了封装70内电路晶片12的高度，且藉此提供较低轮廓的封装和/或接合线26与密封材料28和/或封装70的外表面之间额外的间隙。
在图3和4所示的实施例中，夹持部件74在其周边周围包含凹进区域或平坦部分76，且凹进区域或平坦部分76容纳引线框72的引线82的内部部分或末端。然而，如图5所示，本发明或者可配置有类似的平坦部分78，其形成在引线82的内部部分或末端上且容纳夹持部件74的周边部分。
现参看图6，图中展示包含本发明的封装的另一实施例的集成电路装置。集成电路90大体上类似于集成电路10和60，且使用相应的参考符号来表示相应零件。集成电路90包含电路晶片12和封装100。封装100包含引线框102、夹持部件124、接合线26和密封材料28。引线框102包含引线112且配置成微引线引线框。
在此实施例中，夹持部件124充当电路晶片附着叶片和散热片附着/界面两者。更明确地说，夹持部件124包含通过阶梯区域128互连到平坦部分130的中心衬垫区域126，和处于夹持部件124的与上面安置有中心衬垫区域126的一侧相对的一侧的界面132。平坦部分130通过导热且不导电的膏或膜136(例如，Emerson &Cuming配销的Ablebond84-3粘接膏)接合到引线框102的引线112的内部部分或末端，藉此将夹持部件124接合到引线框102。
电路晶片12通过导热且不导电的膏或膜138(例如，Ablebond84-3)接合到夹持部件124的中心衬垫区域126。因此，电路晶片12热耦合到夹持部件124但与夹持部件124电隔离。接合线26将电路晶片12上的电路晶片接合衬垫142电连接到引线框102的相应引线112的内部部分或末端。
在线接合工艺之后，形成密封材料28，藉此以与上文关于封装20和70所述大体上相同的方式形成密封封装100。然而，在此实施例中，尤其应注意，界面132的至少一部分未被密封材料28密封，即界面132的一部分暴露于封装100的外部。界面132的暴露部分提供可附着散热片(例如，散热片150)的表面。
还尤其应注意，通过使用夹持件124作为电路晶片附着衬垫和散热片附着界面两者，简化了引线框102的设计和制造并通过消除常规引线框中使用的两台阶压陷(downset)使电路晶片附着衬垫126的面积最大化。
现参看图7，图中展示制造本发明的集成电路引线框和封装的方法的一个实施例。方法200包含以下步骤：提供引线框202、附着夹持部件204、电路晶片附着206、固化208、线接合210、密封212和单体化(singulation)214。
提供引线框202的工艺包含为附着夹持部件204的工艺提供引线框。附着夹持部件204包含以下工艺：将导热但不导电的膜或膏(例如，膜/膏层36、86或136)放置在夹持部件(例如，夹持部件24、74或124)和/或引线框(例如，引线框22、72或102)的表面中的至少一者上；和将其适当的表面安置成彼此正确对准并啮合。
类似地，电路晶片附着206的工艺包含：将一层膜或膏(例如，膜/膏层38、88或138)放置到夹持部件(例如，夹持部件24、74或124)的适当区域上；和将电路晶片(例如，电路晶片12)拾取并放置到所述层膜或膏上。
固化208的工艺通常涉及将部分完成的封装组合件暴露于高温条件和足以固化膜/膏层的且集成电路封装领域的技术人员已知的其它受控环境条件。线接合210的工艺(也将为所属领域的技术人员所知晓)涉及将接合线的一端接合到电路晶片上的接合衬垫(例如，电路晶片接合衬垫42)，并将另一端接合到引线框的内部引线的相应的内部部分或末端。密封工艺通常涉及转移成型或以其它方式用塑料材料密封引线框的引线的内部部分、接合线和电路晶片，藉此形成集成电路封装。单体化214的工艺同样为集成电路制造领域的技术人员所知晓。
在所示的实施例中，夹持部件附着或接合到内部引线的末端且/或附着或接合到引线框的电路晶片衬垫。然而，应了解，夹持部件除了如所展示和描述的接合到内部引线的末端且/或接合到引线框的电路晶片衬垫外，还可接合到引线框的一个或一个以上系杆。
虽然已将本发明描述为具有优选设计，但本发明可在本揭示案的精神和范围内经进一步修改。因此本申请案希望涵盖使用本文揭示的一般原理的本发明的任何变化形式、用途或调试。此外，本申请案希望涵盖在本发明所属的领域中已知或惯常的实践范围内且属于所附权利要求书的限制内的对本揭示案的此种脱离。

Claims (26)

1.一种集成电路组合件，其包括：
一引线框，其具有复数个带有内部部分的引线；
一导热夹持部件，其接合到所述引线的所述内部部分，所述夹持部件与所述引线框电隔离并热耦合到所述引线框；
一集成电路晶片，其接合到所述夹持部件，所述电路晶片热耦合到所述夹持部件；
线接合，其将所述电路晶片电互连到所述引线框；和
密封材料，其安置在所述引线的所述内部部分和所述夹持部件的至少一部分上，并密封所述电路晶片和所述线接合。
2.根据权利要求1所述的集成电路组合件，其中所述夹持部件热接合到所述复数个引线中的每一者。
3.根据权利要求1所述的集成电路组合件，其中所述引线框进一步包含一电路晶片附着叶片，所述夹持部件热接合到所述复数个引线中的至少一些引线并热接合到所述电路晶片附着叶片。
4.根据权利要求1所述的集成电路组合件，其中所述夹持部件由一材料构成，所述材料具有一近似等于构成所述集成电路晶片的材料的热膨胀系数的热膨胀系数。
5.根据权利要求1所述的集成电路组合件，其中所述夹持部件大体上由与主要构成所述集成电路晶片相同的材料组成。
6.根据权利要求1所述的集成电路组合件，其中所述夹持部件大体上由硅组成。
7.根据权利要求1所述的集成电路组合件，其中所述夹持部件大体上由铜组成。
8.根据权利要求1所述的集成电路组合件，其中所述密封材料完全密封所述夹持部件。
9.根据权利要求1所述的集成电路组合件，其中所述夹持部件包含一第一侧和一与所述第一侧相对的第二侧，所述电路晶片接合到所述第一侧，所述密封物暴露所述第二侧的至少一部分。
10.根据权利要求9所述的集成电路组合件，其进一步包括一热耦合到所述第二侧的所述暴露部分的散热片。
11.根据权利要求1所述的集成电路组合件，其中所述电路晶片电耦合到所述夹持部件。
12.根据权利要求1所述的集成电路组合件，其中所述夹持部件包含凹进平坦部分，所述凹进平坦部分容纳并安置在所述引线的相应的所述内部部分上，且热接合到相应的所述内部部分。
13.根据权利要求1所述的集成电路组合件，其中所述引线的所述内部部分包含凹进平坦部分，所述夹持部件的一周边部分被容纳并安置在所述凹进平坦部分内且热接合到所述凹进平坦部分。
14.一种用于一集成电路的封装子组合件，其包括：
一引线框，其具有复数个带有内部部分的引线；和
一导热夹持部件，其接合到所述引线框的所述内部部分，所述夹持部件与所述引线框电隔离并热耦合到所述引线框，所述夹持部件经配置以使一集成电路晶片接合并热耦合到所述夹持部件。
15.根据权利要求14所述的封装子组合件，其中所述夹持部件热接合到所述复数个引线中的每一者。
16.根据权利要求14所述的集成电路组合件，其中所述引线框进一步包含一电路晶片附着叶片，所述夹持部件热接合到所述复数个引线中的至少一些引线并热接合到所述电路晶片附着叶片。
17.根据权利要求14所述的集成电路组合件，其中所述夹持部件大体上由硅组成。
18.根据权利要求14所述的集成电路组合件，其中所述夹持部件大体上由铜组成。
19.根据权利要求14所述的集成电路组合件，其中所述夹持部件包含凹进平坦部分，所述凹进平坦部分容纳并安置在所述引线的相应的所述内部部分上，且热接合到相应的所述内部部分。
20.根据权利要求14所述的集成电路组合件，其中所述引线的所述内部部分包含凹进平坦部分，所述夹持部件的一周边部分被容纳并安置在所述凹进平坦部分内且热接合到所述凹进平坦部分。
21.一种将一集成电路晶片耦合到一散热结构的方法，其包括：
提供一具有复数个带有内部部分的引线的引线框；
将一导热夹持部件接合到所述引线的所述内部部分，使所述夹持部件与所述引线框电隔离并热耦合到所述引线框；和
以一导热的方式将一集成电路晶片接合到所述夹持部件的一第一侧，所述电路晶片通过所述夹持部件热接合到所述引线框，所述引线框消散由所述电路晶片产生的热量且藉此构成所述散热结构的至少一部分。
22.根据权利要求21所述的方法，其包括以下其它步骤：
将所述电路晶片、所述线接合、所述引线的所述内部部分和所述夹持部件的一第二侧的一部分密封在一密封材料中，所述夹持部件的所述第二侧与接合所述电路晶片的所述夹持部件的所述第一侧相对，所述密封材料不密封所述第二侧的一暴露部分；和
将一散热片热耦合到所述夹持部件的所述第二侧的所述暴露部分，所述散热片藉此包括所述散热结构的一部分。
23.一种制造一用于一集成电路的封装的方法，其包括：
提供一具有复数个带有内部部分的引线的引线框；
将一导热夹持部件接合到所述引线的所述内部部分，使得所述夹持部件与所述引线框电隔离并热耦合到所述引线框；
将一集成电路晶片接合到所述夹持部件的一第一侧，使得所述电路晶片热耦合到所述夹持部件；
将所述电路晶片线接合到所述引线框的所述引线；和
将所述电路晶片、所述线接合、所述引线的所述内部部分和所述夹持部件的至少一部分密封在一密封材料中。
24.根据权利要求23所述的方法，其包括以下其它步骤：
暴露所述夹持部件的一第二侧的一部分，所述夹持部件的所述第二侧与接合所述电路晶片的所述第一侧相对；和
将一散热片热耦合到所述夹持部件的所述第二侧的所述暴露部分。
25.根据权利要求24所述的方法，其中所述暴露步骤包括不将所述夹持部件的所述第二侧的所述暴露部分密封在所述密封材料中。
26.一种用于将一集成电路晶片接合到一原本尺寸过大的引线框的方法，所述引线框具有复数个带有内部部分的引线，所述方法包括：
将一导热夹持部件接合到所述引线的所述内部部分，使得所述夹持部件与所述引线框电隔离并热耦合到所述引线框；和
将所述集成电路晶片接合到所述夹持部件的一第一侧，使得所述电路晶片热耦合到所述夹持部件。
CNA200580019097XA 2004-06-09 2005-06-08 用于封装集成电路晶片的封装和方法 Pending CN101015054A (zh)

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