CN100550327C - 用于输入输出位置的共用球型限制冶金及其形成方法 - Google Patents

用于输入输出位置的共用球型限制冶金及其形成方法 Download PDF

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CN100550327C
CN100550327C CNB01822556XA CN01822556A CN100550327C CN 100550327 C CN100550327 C CN 100550327C CN B01822556X A CNB01822556X A CN B01822556XA CN 01822556 A CN01822556 A CN 01822556A CN 100550327 C CN100550327 C CN 100550327C
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layer
metal
input
substrate
inculating crystal
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CN1647260A (zh
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G·F·沃克
R·D·戈德布拉特
P·A·格鲁伯
R·R·霍顿
K·S·佩特拉卡
R·P·沃兰特
T·-J·程
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Core Usa Second LLC
GlobalFoundries Inc
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International Business Machines Corp
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Abstract

本发明描述一种方法，用于形成共用输入输出(I/O)位置，其适用于引线接合及焊料凸块倒装芯片连接，诸如控制塌陷芯片连接(C4)。本发明特别适于以铜当作互联材料的半导体芯片，其中在制造此芯片时使用的软电介质由于接合力而易损害。通过在垫座顶表面上提供具有贵金属的位置(26)，且提供一扩散阻挡(22)，以维持金属互联的高导电性，本发明使损害的危险减少。通过提供一种用于在基片(20)中所形成的特征中选择性淀积金属层之方法，使得在基片(20)中形成输入输出位置的工艺步骤减少。因为本发明的输入输出位置可以用于引线接合或焊料凸块连接，此使得芯片互联选择的灵活性增加，且也减少工艺的成本。

Description

用于输入输出位置的共用球型限制冶金及其形成方法
技术领域
本发明涉及半导体处理，特别是涉及一种工艺，用于制造在封装集成电路(IC)芯片中所使用的输入输出(I/O)位置的共用球型限制冶金。
背景技术
在制造半导体装置时，金属线通常埋放于多层结构的电介质层中，特别是在制造过程的后阶段(“线的后端”或″BEOL″)。含有金属线的最后层(有时候在本领域中称为端子通路或电视层)具有金属垫座，金属垫座在有时候称为“线的远后端”或″远BEOL″的工艺中制造成为接触于金属线。垫座与线一起提供芯片至其他系统部件的互联。大部分集成电路芯片使用铝(Al)以形成互联，但最近使用铜(Cu)。
使用铜而非铝形成互联的一些优点包含高导电率(具有低电阻)、低电容负载、低功率消耗、较少的串扰、较少的金属层及较少的潜在制造步骤。然而，使用铜的缺点包含淀积薄层铜的困难度增加、由下方的硅潜在性污染铜而使性能降低、在线之间的铜移动而增加短路的危险、基片与铜垫座及线之间的热膨胀不匹配。为了完全利用铜互联，形成铜互联的方法必须尝试克服使用铜的这些缺点。
依用途而定，使用多种技术在芯片与其他部件之间提供互联，诸如另一层的互联。共用连接包含引线接合及焊料凸块。
引线接合在本领域中是公知的且使用于大部分集成电路芯片，但缺点包含有限的互联位置密度，并且特别是在芯片功能测试期间，可能会机械式损害在接合位置的芯片。引线接合的典型例子绘示于图1B。在此现有技术的例子中，一基片120具有一埋放的金属线115。金属线可以是铝或铜。一通常由铝(Al)组成的金属垫座114形成于金属线115上方，是由电介质110支撑。典型上，铝垫座具有一氧化物层112，其由于铝的反应性而容易形成于表面上。通常是金(Au)的线118将使用本领域中已知的技术，诸如热音波接合(thermosonicbonding)，而接合至垫座。在金及铝之间形成引线接合的一个问题是金与铝形成中间金属，其可能减少接合的可靠度。
目前的集成电路-特别是使用铜金属化的集成电路-的另一问题是，所使用的低k电介质是软的，且容易由于压力而损害。电路测试是通过推动一组测试探针顶住顶层上的重要导电点而执行。表面氧化物必须被破坏(通常通过称为“擦洗”的技术)，以在测试探针与垫座金属之间形成良好的接触。所以，特别是在软的低k电介质的状况下，芯片承受潜在性机械式损害。所以，希望形成一输入输出垫座，其不需要擦洗，以提供与测试探针之间的低接触电阻。
焊料凸块技术(在本领域中称为倒装片技术)潜在性提供较高的密度及较高的性能，但与引线接合相比，苦于再工作及测试的困难度较大。焊料凸块技术一实例是控制塌陷芯片连接(C4)，其中焊料凸块设在芯片及互联基片二者上，且连接是通过对准芯片及基片的焊料凸块且使焊料再流以进行连接而达成。焊料凸块是通过在球型限制冶金(BLM)上淀积焊料而形成，如图1A所示。金属构造15-其可以系铝或铜-形成于基片16中。为了避免焊料扩散进入金属构造15，一多层金属薄膜10在金属构造上成为一盖，然后焊料形成于多层盖10顶部上，其起初可延伸越过盖而到达氧化物表面上。球型限制冶金10的形成是使用多层金属，诸如包含铬的层11、包含铜的层12和包含金的层13。焊料球18的形成是通过起初淀积焊料(典型的焊料为95％铅及5％锡)，使用诸如通过掩模的蒸发的工艺，掩模覆盖垫座及基片16的一部分表面。用于将倒装片接合至互联基片的焊料具有相当高的熔点，以致于当含有倒装片的模块在后续的封装组装时，其他低熔点的焊料可以流动，而倒装片焊料连接不再熔化。然后，球18通过将焊料-其再流入为球-加热而形成，由于表面张力，受限于球型限制冶金的尺寸。
鉴于前述讨论，需要提供一种输入输出位置，其可以利用铜的金属化而不会降低性能，减少过程步骤及增加制备输入输出位置时的灵活性。
发明内容
本发明通过提供一种用于制造球型限制冶金(BLM)-其可当作引线接合及控制塌陷芯片连接(C4)晶片的共用位置-的工艺，而满足上述需求。
本发明通过在线与输入输出垫座之间提供一扩散阻挡层，及通过在一基片-本发明的输入输出位置形成于其上-中形成的构造内提供第一凹入金属层，解决金属线的污染问题。
本发明通过在输入输出位置上提供一贵金属顶层，其消除氧化物层的存在并需要较少的接合力，且在金引线接合的状况下，不形成中间金属，从而解决了探测及/或引线接合的力导致损害芯片的问题。
本发明具有的优点是减少用于形成输入输出位置之工艺步骤的数目，且提供一灵活位置，其可以是用于引线接合或球型限制冶金的共用位置，以减少总处理成本。依据本发明的一特点，一输入输出结构在一形成于基片中的构造中，该基片具有一顶表面，该构造具有构造侧壁及一构造底部，构造底部形成于一导电材料上方，该结构包括：
一覆盖构造侧壁与构造底部的阻挡层，阻挡层具有一阻挡底部和阻挡侧壁；
一具有一籽晶底部与籽晶侧壁的金属籽晶层，其至少遮盖所述阻挡底部；及
一第一金属层，其至少遮盖所述籽晶底部且具有一形成于其中的凹部，以致于所述第一金属层的顶表面低于基片的顶表面；及
一遮盖所述第一金属层的第二金属层。
依据本发明的另一特点，一输入输出位置形成于一基片的构造中，该基片具有一顶表面，构造具有构造侧壁与一构造底部，构造底部形成于一导电材料上方，该方法包括下列步骤：
淀积一阻挡层，其遮盖基片的顶表面、构造侧壁与构造底部，以致于阻挡层具有一阻挡底部与阻挡侧壁；
淀积一金属籽晶层，其遮盖所述阻挡层的表面；
从至少顶表面选择性移除所述籽晶层，以致于籽晶层减少成为在至少所述阻挡底部上的一部分籽晶层；
使用所述部分的所述籽晶层，电镀一第一金属层，以致于所述第一金属层具有一形成于其中的凹部，以致于所述第一金属层的一顶表面低于基片的顶表面；且
电镀一第二金属层，以致于所述第二金属层遮盖所述第一金属层。
相信是本发明的特征的新颖特征揭示于附属的权利要求中。然而，参考待与附图一起阅读之所绘示较佳实施例的下列详细说明，可以最了解本发明本身及它的其他目的与优点。
附图说明
图1A绘示用于控制塌陷芯片连接位置的现有技术球型限制冶金。
图1B绘示一现有技术引线接合位置。
图2A绘示在封装以前的最后阶段构造的本发明的初始结构，显示由一电介质基片覆盖的顶层导电层，电介质基片具有一桶(bucket)构造、一阻挡层及一籽晶层。
图2B绘示从图2A显示结构的顶表面移除籽晶层以后的结构，留下桶形构造内的一部分籽晶层。
图2C绘示在图2B的结构上电镀一第一金属层以后的结构。
图2D绘示在图2C的结构上电镀一第二金属层以后的结构。
图3A绘示从图2D选择性移除阻挡层形成引线接合位置以后的结构。
图3B绘示在将引线接合至图3A的引线接合位置以后的结构。
图4A绘示在图2D的结构上电镀焊料的步骤以后的结构。
图4B绘示从图4A的结构选择性移除阻挡层以后的结构。
图4C绘示在图4B的电镀的焊料再流以后的控制塌陷芯片连接结构。
图5A绘示使用掩模在图3A的结构上蒸发焊料的步骤。
图5B绘示在图5A所绘示的蒸发焊料以后的结构。
图5C绘示在图5B之蒸发的焊料再流以后的控制塌陷芯片连接结构。
具体实施方式
在下述本发明之较佳实施例的详细说明中，将详细说明在封装以前形成最后层构造以形成共用球型限制冶金(BLM)的步骤。可以了解，此仅为一实例，且本发明能够以各种基片与金属实施。
如图2A所示，电介质层20中形成一构造21，其在金属垫座的所希望的位置。电介质层20由至少一种电介质材料组成，但较佳为由一电介质层的堆叠-诸如氮化硅(SiNx)及二氧化硅(SiO2)-组成。构造21形成于一导电构造27上，其典型是金属，诸如铝(Al)或铜(Cu)，导电构造27形成于电介质基片25中。在使用铜形成导电构造27的状况下，基片25较佳为低k电介质。一层衬垫材料22可以淀积在基片20的整个表面上，包含构造21的侧壁与底部。衬垫22当作扩散阻挡及粘结促进剂。此外，依据本发明的衬垫22可导电。在待镀铜的状况下，此衬垫材料较佳为钽(Ta)与氮化钽(TaN)的组合，氮化钽较佳为与电介质层20及导电构造27的顶表面接触。一金属籽晶层23使用本领域中已知的淀积方法，诸如通过化学气相淀积(CVD)，或较佳为通过物理气相淀积(PVD)，淀积于衬垫/阻挡层22的表面上。籽晶层23典型上是薄的，例如，在约1000埃的数量级。籽晶层较佳为铜，其对于氮化钽/钽具有良好的粘结力。
然后，从衬垫22的至少顶表面选择性移除籽晶层23，较佳为使用化学机械抛光(CMP)，在构造21的至少底部上留下一部分籽晶层23，且典型地也留在构造21的侧壁上，得到图2B所示的结构。虽然图2B所示之所得的籽晶层23与阻挡层22的表面齐平，但可以从构造21的侧壁部分移除籽晶层23。
第一电镀层24的形成是使用籽晶层23且施加电流至阻挡层22，得到图2C所绘示的结构。在形成层24以前，必须清洁籽晶层23的表面。此可以通过清洁方法完成，诸如刷除清洁、湿法清洁或通过超音波的湿法清洁，如本领域所已知的。用于第一电镀层24的适当材料包含铂(Pt)、金(Au)、铜(Cu)、银(Ag)、焊料或镍(Ni)。在导电构造27是铜的状况下，选用于电镀层24的材料较佳为选择为当作额外的扩散阻挡，例如镍。在电镀期间，层24只在籽晶层23上成核，不会镀在阻挡层22上。
第二电镀层26形成于第一电镀层24上方，其当作共用输入输出位置的垫座。层26较佳为贵金属，诸如金。再次地，于电镀过程期间，电流施加至导电阻挡层22，其较佳为在镍镀液已冲洗以后，当镍层24仍湿时执行。层26的厚度可以依据所欲的用途而改变，且可以延伸于顶表面22a上，如图2D所示，但可以与顶表面22a齐平或下凹至低于顶表面22a。层24(较佳为镍)当做籽晶层23(较佳为铜)及层26(较佳为金)之间的阻挡层。依据本发明之图2D所绘示的结构适用于当做共用输入输出位置，例如，用于引线接合或控制塌陷芯片连接位置，其导致成本节约与灵活性。用于引线接合与控制塌陷芯片连接位置之本发明的实施例说明如下。
第一实施例：引线接合垫座
用于用作引线接合输入输出位置的本发明的一实施例能够从图2D中的结构开始而形成。自未由镀层26-其较佳为金-遮盖之部分顶表面选择性移除阻挡层22，如图3A所示。此可以通过本领域已知的选择性抛光方法执行，或通过湿法蚀刻-诸如氢氟酸/硝酸-执行。
随著选择性移除阻挡层22之后，可以在整个表面上淀积一选择性划痕保护层(未显示)。本领域中已知的一典型划痕保护层是聚酰亚胺。
现在，引线35-较佳为金-可以接合至图3B所示的垫座层26。引线35-也较佳为金-使用本领域中已知的标准技术，诸如热音波接合、超音波接合或热压接合，接合至垫座26。依据本发明而形成的垫座层26优于现有技术的优点在于，提供接合所需的力较低，原因在于引线35与垫座26可以系金。在集成电路测试期间，现有技术的铝垫座需要足够大的表面，以致于测试探针可以擦洗垫座的表面，以穿透通常形成于铝表面上的氧化铝层。与现有技术的铝垫座不同，依据本发明由金形成的垫座26将具有一表面，其无氧化物，原因在于金是贵金属。因为在测试期间不需要擦洗，故依据本发明而形成的引线接合垫座26可以小于现有技术的垫座，其可导致输入输出位置的密度增加。
第二实施例：具有电镀的焊料的控制塌陷芯片连接位置
图2D的结构也可以当作用于本发明之一实施例的初始结构，以当做一控制式塌陷芯片连接位置，其中焊料凹块通过镀敷而形成。
在此实施例中，通过施加电流至导电阻挡层22，如图4A所示，以将第三层45电镀至层26上。再次地，阻挡层22较佳为钽与氮化钽的组合。用于形成层45的材料为焊料，较佳为97％铅(Pb)及3％锡(Sn)，但可以使用许多其他适当种类的焊料，如本领域已知的。
其次，选择性移除导电阻挡层22，较佳为通过本领域中已知的湿法蚀刻，留下焊料层45，如图4B所示。
最后，使用本领域中已知的标准技术，使焊料再流，以形成控制塌陷芯片连接焊料凹块45，如图4C所示。
第三实施例：具有蒸发焊料的控制式塌陷芯片连接位置
在本发明的替代实施例中，可以由图3A的结构-其中已选择性移除图2D的阻挡层22-开始，形成控制式塌陷芯片连接的焊料凸块。一掩模52支持于基片表面上方的夹具中，如图5A所示。掩模材料是本领域中已知用于蒸发焊料的任何适当材料，且较佳为钼(Mo)。焊料的蒸发在本领域中公知的，且可以使用任何适当的焊料，但较佳为97％铅与3％锡的混合物。
在蒸发以后，移除掩模52，在垫座层26上留下蒸发的铅与锡层55，如图5B所示。
其次，使焊料再流，以形成图5C所示的控制塌陷芯片连接焊料凸块55。
总之，依据本发明形成的共用球型限制冶金结构允许使用贵金属，以形成输入输出垫座，其通过简化工艺步骤而减少成本，且由于较小的垫座尺寸，亦允许增加输入输出位置密度。
虽然已经通过特定实施例而说明本发明，但鉴于前述说明，显然，本领域技术人员可以明白很多替代物、修改及变化。因此，本发明企图涵盖全部此类替代物、修改及变化，其落于本发明与下列权利要求的范畴及精神中。
工业实用性
本发明用于输入输出位置的共用球型限制冶金在封装集成电路(IC)芯片中是有用的，特别有用于铜互连和软低k电介质材料的IC芯片的封装。

Claims (17)

1.一种输入输出结构，其在一形成于基片(20)中的特征(21)中，基片(20)具有一顶表面，该构造(21)具有构造侧壁及一构造底部，构造底部形成于一导电材料(27)上方，该结构包括：
一覆盖构造侧壁与构造底部的阻挡层(22)，阻挡层(22)具有一阻挡底部与阻挡侧壁；
一具有一籽晶底部与籽晶侧壁的金属籽晶层(23)，其至少覆盖所述阻挡底部；及
一第一金属层(24)，其完全覆盖所述籽晶层的所有表面，使得所述籽晶层由所述阻挡层并由所述第一金属层完全包围，并且其中所述第一金属层具有一形成于其中的凹部，以致于所述第一金属层(24)的顶表面低于基片(20)的顶表面，其中所述第一金属层(24)包括选自由铜、铂、镍、金、银和焊料组成的组；及
一覆盖所述第一金属层(24)的第二金属层(26)，所述第二金属层(26)由一贵金属组成。
2.如权利要求1的输入输出结构，其中贵金属是金。
3.如权利要求1的输入输出结构，其中贵金属选自由金、铂与钯组成的组。
4.如权利要求1的输入输出结构，其中所述籽晶层包括铜。
5.如权利要求1的输入输出结构，其中所述阻挡层包括钽与氮化钽。
6.如权利要求5的输入输出结构，其中氮化钽与该基片接触。
7.如权利要求1的输入输出结构，其中又包括一接合至所述第二金属层的引线。
8.如权利要求7的输入输出结构，其中所述引线包括金且所述贵金属是金。
9.如权利要求1的输入输出结构，其中又包括一连接至所述第二金属层的焊料球。
10.一种形成权利要求1的输入输出结构的方法，该方法包括下列步骤：
淀积一阻挡层(22)，其覆盖基片(20)的顶表面、构造侧壁与构造底部，以致于阻挡层具有一阻挡底部与阻挡侧壁；
淀积一金属籽晶层(23)，其覆盖所述阻挡层(22)的表面；
从至少顶表面选择性移除所述籽晶层(23)，以致于籽晶层(23)减少成为在至少所述阻挡底部上的一部分籽晶层(23)；
使用所述部分的所述籽晶层(23)，电镀一第一金属层(24)，以致于所述第一金属层(24)具有一形成于其中的凹部，以致于所述第一金属层(24)的一顶表面低于基片(20)的顶表面；且
电镀一第二金属层(26)，以致于所述第二金属层(26)覆盖所述第一金属层(24)。
11.如权利要求10的方法，其中淀积籽晶层的步骤包括物理气相淀积或化学气相淀积。
12.如权利要求10的方法，其中选择性移除所述籽晶层的步骤包括化学机械抛光。
13.如权利要求10的方法，其中又包括将一引线接合至所述第二金属层的步骤。
14.如权利要求13的方法，其中所述接合引线的步骤选自于热音波接合、超音波接合及热压接合组成的组。
15.如权利要求10的方法，其中又包括形成连接至所述第二金属层的一焊料球的步骤。
16.如权利要求15的方法，其中形成焊料球的步骤包括镀敷。
17.如权利要求15的方法，其中形成焊料球的步骤包括蒸发。
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