CN100481379C - 改善低k电介质对导电材料粘附性的方法 - Google Patents
改善低k电介质对导电材料粘附性的方法 Download PDFInfo
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- CN100481379C CN100481379C CNB2005800178624A CN200580017862A CN100481379C CN 100481379 C CN100481379 C CN 100481379C CN B2005800178624 A CNB2005800178624 A CN B2005800178624A CN 200580017862 A CN200580017862 A CN 200580017862A CN 100481379 C CN100481379 C CN 100481379C
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Images
Classifications
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/32—Carbides
- C23C16/325—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
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Abstract
本发明提供了在导电材料与电介质层之间沉积粘附层而对衬底进行处理的方法。在一个方面,本发明提供了处理衬底的方法,该方法包括:放置具有位于衬底表面上的导电材料的衬底;使所述衬底暴露于还原化合物、硅基化合物或上述二者中;使所述衬底表面的至少一部分与所述还原化合物、所述硅基化合物或上述二者反应;并且,在不破坏真空的条件下沉积硅碳化物层。
Description
技术领域
本发明涉及集成电路的制造,还涉及在衬底上沉积电介质层的工艺以及由该电介质层形成的结构。
背景技术
制造现代半导体器件的主要步骤之一是通过气体的化学反应在衬底上形成金属层和电介质层。这样的沉积工艺被称为化学气相沉积或CVD。传统的热CVD工艺将反应性气体供给至发生热致化学反应的衬底表面,从而形成期望的层。
自从半导体器件数十年前首次问世以来,其几何尺寸显著减小。从此,集成电路通常遵循两年/尺寸减半的规律(通常称为摩尔定律),即芯片上装有的器件数量每两年翻一倍。现今的制造工厂一般生产特征尺寸(feature size)为0.35μm甚至0.18μm的器件,而今后的工厂很快将生产几何尺寸更小的器件。
为了进一步减小集成电路上器件的尺寸,使用具有低电阻率的导电材料并使用具有低介电常数(介电常数<4.0)的绝缘体已成为必须来降低相邻金属线之间的电容耦合。一种这样的低k电介质材料是旋涂玻璃,例如未掺杂的硅玻璃(USG)或掺杂氟的硅玻璃(FSG),其可在半导体制造工艺中作为填缝层被沉积。另一种低k电介质材料是可在镶嵌特征的制造中用作电介质层的硅氧碳化物(silicon oxycarbide)。
一种可接受的导电材料是铜及其合金,其已成为次四分之一微米级互连技术所选择的材料,原因在于铜与铝相比具有更低的电阻率(1.7μΩ-cm,而铝为3.1μΩ-cm)、更高的电流和更高的载流量。这些特性对于实现高集成度下的较高电流密度以及提高器件速度来说是重要的。此外,铜具有良好的导热性并且可以以十分纯的状态获得。
在半导体器件中使用铜的一个困难是难以对铜进行蚀刻来得到精确的图案。采用传统的形成互连的沉积/蚀刻工艺来蚀刻铜,已经不能令人满意。因此,正在开发制造具有含铜材料和低k电介质材料的互连的新方法。
一种形成垂直和水平互连的方法是通过镶嵌或双镶嵌方法。在镶嵌方法中,一种或多种电介质材料(例如,低k电介质材料)被沉积并被图案化蚀刻以形成垂直互连(即,过孔)和水平互连(即,线)。然后将导电材料(例如,含铜材料)和其它材料(例如,用于防止含铜材料扩散进入周围的低k电介质的阻挡层材料)镶嵌在已蚀刻的图案中。然后,去除已蚀刻图案外部(例如衬底表面上)的过量含铜材料和过量阻挡层材料,并形成平坦化表面。在铜特征上形成电介质层(例如绝缘层或阻挡层)用于后续处理,例如形成第二层镶嵌结构。
然而,已发现,在铜的平坦化与后续的电介质层沉积之间,可通过在处理室或处理设备之间暴露,使铜材料进行氧化反应。暴露于氧化环境导致在铜材料上形成表面氧化物。氧化物抑制了沉积其上的后续层(例如,电介质层)的粘附性。
因此,需要一种改善低k电介质层之间的层间粘附性的工艺。
发明内容
本发明一般性地提供在导电材料与电介质层之间沉积粘附层的方法。在一个方面,本发明提供处理衬底的方法,该方法包括:将衬底置于处理室中,其中所述衬底包括一个或多个图案化的低k电介质层以及在其中形成的导电材料;将硅基化合物引入所述处理室;形成所述导电材料的硅化物层;并且,在不破坏真空条件下,在所述硅化物层上沉积硅碳化物层。
本发明的另一方面提供了处理衬底的方法,该方法包括:将衬底置于处理室中,其中所述衬底包括一个或多个图案化的低k电介质层以及在其中形成的导电材料;将硅基化合物和还原化合物引入所述处理室;形成所述导电材料的硅化物层;引发所述硅基化合物和还原化合物的等离子体;沉积硅氮化物层;并且,在不破坏真空条件下,在所述硅氮化物层上沉积硅碳化物层。
本发明的另一方面提供了处理衬底的方法,该方法包括:将衬底置于处理室中,其中所述衬底包括一个或多个图案化的低k电介质层以及在其中形成的导电材料;将包含氮和氢的还原化合物引入所述处理室;在所述处理室中引发所述还原化合物的等离子体;将所述导电材料暴露于所述还原化合物的所述等离子体;将有机硅化合物引入所述处理室;将所述有机硅化合物与所述还原化合物反应;在所述一个或多个图案化的低k电介质层和导电材料上沉积掺杂氮的硅碳化物电介质材料;并且,在不破坏真空条件下,在所述掺杂的硅碳化物层上沉积硅碳化物层。
本发明的另一方面提供了处理衬底的方法,该方法包括:将衬底置于处理室中,其中所述衬底包括一个或多个图案化的低k电介质层以及在其中形成的导电材料;将包含氮和氢的还原化合物引入所述处理室;在所述处理室中引发所述还原化合物的第一等离子体;将所述导电材料暴露于所述还原化合物的所述等离子体;终止所述第一等离子体和还原化合物;将有机硅化合物引入所述处理室;在所述处理室中引发所述有机硅化合物的第二等离子体;与所述有机硅化合物一起引入所述还原化合物;并且,在不破坏真空条件下,在所述一个或多个图案化的低k电介质层和导电材料上沉积掺杂氮的硅碳化物电介质材料。
本发明的另一方面提供了处理衬底的方法,该方法包括:将衬底置于处理室中,其中所述衬底包括一个或多个图案化的低k电介质层以及在其中形成的导电材料;以第一流率将包含氮和氢的还原化合物引入所述处理室;在所述处理室中引发所述还原化合物的第一等离子体;将所述导电材料暴露于所述还原化合物的所述等离子体;终止所述第一等离子体;将有机硅化合物引入所述处理室;以大于所述第一流率的第二流率引入所述还原化合物;在所述处理室中引发所述有机硅化合物和所述还原化合物的第二等离子体;在所述一个或多个图案化的低k电介质层和导电材料上沉积掺杂碳的硅氮化物电介质材料;终止所述第二等离子体;将所述有机硅化合物引入所述处理室;以小于所述第二流率的第三流率引入所述还原化合物;并且,在所述处理室中引发所述有机硅化合物和所述还原化合物的第三等离子体;在不破坏真空条件下,在所述一个或多个图案化的低k电介质层和导电材料上沉积掺杂氮的硅碳化物电介质材料。
附图说明
为了实现上述本发明的各个方面以及详细理解本发明,以下通过参考附图所示的实施方式对本发明进行更具体的描述。
然而应当注意到,附图仅说明了本发明的典型实施方式,因而不应看作是对其范围的限制,本发明可容许其它等同效果的实施方式。
图1A-1D为本发明的双镶嵌沉积顺序的一种实施方式的剖面图;
图2A-2C为本发明的改善的层间粘附性顺序的一种实施方式的剖面图。
图3A-3C为本发明的改善的层间粘附性顺序的一种实施方式的剖面图。
为了更好地理解本发明的方面,应参考以下详细说明。
具体实施方式
本文所述的本发明的方面是指用于改善导电材料对电介质层的层间粘附性的方法与装置。改善层间粘附性可包括,在沉积后续电介质层之前对导电材料进行表面处理,在沉积后续电介质层之前形成中间材料,或在沉积后续电介质层之前沉积具有改善的粘附性的中间层。初始层可包含硅、碳并且可选地包含氧。优选地,这些工艺原位进行,以使再污染最小化并且提高衬底处理量。
除非另有进一步的定义,在本文中所使用的术语和短语应该具有本领域技术人员所理解的普通的和惯用的含义。“原位”应作广义解释,包括但不限于,在给定的室中(例如在等离子体室中),或在系统中(例如集成设备),并未使材料暴露于居间的污染环境中(例如破坏一个设备内部的工艺步骤或室之间的真空。与将衬底重新定位到其它处理室或区域相比,“原位”工艺通常使工艺时间和可能的污染最小化。
尽管下文详细描述在双镶嵌结构的导电材料与电介质材料使用层间粘附层,但是不应将本发明解释或限制为所示实施例,因此本发明还意味着,在其它结构形成工艺和直接沉积工艺中也可利用本发明的粘附性方面。
双镶嵌结构的沉积
如图1A所示,将用具有金属特征107(在衬底表面材料105中形成)的衬底100形成的镶嵌结构供给至处理室。通常,在衬底表面上沉积第一硅碳化物阻挡层110,以消除衬底与后续沉积材料之间的层间扩散。阻挡层材料的介电常数可达约9,优选在约2.5与小于约4之间。硅碳化物阻挡层的介电常数可为约5或更小,优选小于约4。
所述第一硅碳化物阻挡层110的硅碳化物材料可掺杂氮和/或氧。尽管并未示出,可在阻挡层110上沉积无氮硅碳化物或硅氧化物的覆层。所述无氮硅碳化物或硅氧化物覆层可通过调节处理气体的组成原位沉积。例如,通过最小化或排除氮源气体,可在第一硅碳化物阻挡层110上原位沉积无氮硅碳化物覆层。或者,可在第一硅碳化物阻挡层112上沉积初始层(未示出)。初始层更全面地描述在2004年3月15日提交的美国专利申请No.10/801190中,通过引用将其与本发明的权利要求和说明书一致的部分包含于此。
通过氧化有机硅化合物(可包括三甲基硅烷和/或八甲基环四硅氧烷),在硅碳化物阻挡层110上沉积第一电介质层112,依赖于待制造的结构尺寸,沉积厚度为约5000至约15000。然后,可用等离子体或电子束工艺对第一电介质层112进行后处理。可选地,通过提高本文所述的硅氧碳化物沉积工艺中的氧浓度,可在第一电介质层112上原位沉积硅氧化物覆层(未示出),从而去除沉积材料中的碳。第一电介质层还可包含其它低k电介质材料,例如低聚物材料(包括paralyne)或低k旋涂玻璃(例如,未掺杂的硅玻璃(USG)或氟掺杂的硅玻璃(FSG))。然后,可用本文所述的等离子体工艺来处理第一电介质层。
然后在第一电介质层112上沉积硅碳化物的蚀刻终止层(或第二阻挡层)114(其可掺杂氮或氧)。蚀刻终止层114在第一电介质层112上的沉积厚度可为约至约通过本文所述的用于硅碳化物材料或硅氧碳化物材料的方法,对低k蚀刻终止层114进行等离子体处理。然后,图案化蚀刻蚀刻终止层114以定义接触/过孔开口116,并且在要形成接触/过孔的区域暴露第一电介质层112。优选地,通过使用氟、碳和氧离子的常规光刻和蚀刻工艺来对低k蚀刻终止层114进行图案化蚀刻。尽管并未示出,但是在沉积其它材料之前,可在低k蚀刻终止层114上沉积约100至约500的无氮硅碳化物或硅氧化物覆层。
如图1B所示,在去除抗蚀剂材料之后,在图案化的蚀刻终止层114上沉积氧化有机硅烷或有机硅氧烷的第二电介质层118。第二电介质层118可包含来自氧化有机硅烷或有机硅氧烷(例如三甲基硅烷)的硅氧碳化物,通过本文所述的工艺沉积,沉积厚度为约至约然后,可通过本文所述的工艺对第二电介质层118进行等离子体或电子束处理和/或在其上沉积硅氧化物材料覆层。
然后,如图1B所示,在第二电介质层118(或覆层)上沉积抗蚀剂材料122并优选使用传统的光刻工艺图案化以定义互连线120。抗蚀剂材料122包括现有技术公知的材料,优选为高活化能的抗蚀剂材料,例如UV-5(可从Massachusetts,Marlborough的Shipley Company Inc.购得)。然后,如图1C所示,用反应性离子蚀刻或其它各向异性蚀刻技术来蚀刻互连和接触/过孔,从而定义金属化结构(即,互连和接触/过孔)。使用氧剥离或其它合适的工艺来去除所有的用于图案化蚀刻终止层114或第二电介质层118的抗蚀剂材料或其它材料。
然后,形成了具有导电材料的金属化结构,导电材料例如是铝、铜、钨或其组合。由于铜的电阻率低(1.7mΩ-cm,而铝为3.1mΩ-cm),目前的趋势是使用铜来形成更小的特征。优选地,如图2G所示,合适的金属阻挡层124(例如钽氮化物)首先被保形沉积在金属化图案中,以防止铜迁移进入周围的硅和/或电介质材料中。此后,使用化学气相沉积、物理气相沉积、电镀中或其组合来沉积铜以形成导电结构。如图1D所示,一旦此结构被铜或其它导电金属填充,则使用化学机械抛光并暴露导电金属特征126的表面对该表面进行平坦化。
粘附工艺和电介质层沉积
在一个方面,通过在沉积电介质层(例如硅碳化物层)之前将导电材料暴露于反应化合物中以去除氧化物或形成硅化物层或硅化物材料,可以改善层间粘附性。层间粘附性改善和电介质层沉积可在相同的处理室或处理系统中原位进行。
以下描述的沉积工艺采用300mm ProducerTM双沉积台处理室,应当作相应的解释,例如,流率是指总流率,而当描述室内的每个沉积站的流率时,应当将流率除以2。此外,应当注意,为了在不同的室中以及对于不同的衬底尺寸(例如,对于200mm的衬底)进行等离子体工艺,可以对各个参数进行调整。而且,尽管以下工艺针对铜和硅碳化物描述,但是本发明还意味着可将此工艺用于半导体制造中所用的其它导电材料和电介质材料。
层间粘附性可通过以下方法改善:如图2A所示,通过将含氢和氮的化合物的还原化合物引入处理室至具有导电材料的衬底上,以去除其中形成的任何氧化物128;然后,如图2B所示,引入有机硅化合物使其与还原化合物反应,以形成氮化层130。待去除的氧化物也可形成在阻挡材料上,例如阻挡层124的暴露部分。氮化层130在衬底的暴露表面上可以是连续的或非连续的。在不通过机械排气去除还原化合物的条件下,优选引入有机硅化合物。如图2C所示,有机硅化合物可额外地和/或连续地被引入处理室,以在氮化层上形成硅碳化物层132。
还原化合物可通过热和/或等离子体增强工艺与暴露的导电材料反应。优选的还原化合物包括含氢和氮的气体,例如氨气、氢气(H2)和氮气(N2)的气体混合物、肼(N2H2)、胺、胺衍生物,或其组合。
具有还原化合物的等离子体增强工艺的一个实例包括:以约50sccm至约2000sccm的流率(例如,约100sccm至约1600sccm)向处理室提供还原化合物;可选地,以约50sccm至约25000sccm的流率(例如,约1000sccm至约20000sccm)向处理室提供含氮载气(例如氮气);保持室压力为约1Torr至约12Torr(例如,约2.5Torr至约9Torr);保持加热器温度为约100℃至约500℃(例如,约250℃至约450℃);在距衬底表面约200密耳至约1000密耳(例如300密耳至500密耳)处设置气体分布器或“喷淋头”;并且,生成等离子体。等离子体处理可进行约3秒至约120秒,例如,优选使用约5秒至约40秒。
通过在高频(例如约13MHz至约14MHz,如13.56MHz)下施加约0.03W/cm2至约3.2W/cm2的功率密度(对于200mm的衬底,为约10W至约1000W的RF功率水平,例如约100W至约400W),可以生成等离子体。通过在高频(例如约13MHz至约14MHz,如13.56MHz)下施加约0.01W/cm2至约1.4W/cm2的功率密度(对于300mm的衬底,为约10W至约1000W的RF功率水平,例如约100W至约400W),可以生成等离子体。或者,可通过本文所述的双频RF功率源来生成等离子体。或者,所有的等离子体生成可远程进行,而将生成的基团引入处理室,用于已沉积的材料的等离子体处理或材料层的沉积。
还原化合物可包括以约50sccm至约3000sccm(例如约100sccm至约2000sccm)的流率向处理室提供的单一组分,例如氨或肼。单一组分输送还可包括流率为100sccm至约10000sccm(例如约1000sccm至约5000sccm)的载气或惰性气体(例如,氮气、氦气或氩气)。在多组分系统中,例如氮气和氢气的混合物可通过以下工艺向处理室提供:以约50sccm至约5000sccm(例如约100sccm至约1000sccm)的流率向处理室提供氮气;以约50sccm至约5000sccm(例如约100sccm至约1500sccm)的流率向处理室提供氢气。
等离子体处理工艺的实例包括:以约700sccm的流率向处理室提供氨;以约1200sccm的流率向处理室提供氦;保持室压力为约4.2Torr;保持加热器温度为约350℃;在约350密耳处设置气体分布器或“喷淋头”;通过在13.56MHz的高频下施加约300W的功率水平来生产等离子体,保持约20秒。
等离子体处理工艺的另一个实例包括:以约160sccm的流率向处理室提供氨;以约18000sccm的流率向处理室提供氮;保持室压力为约4.2Torr;保持加热器温度为约350℃;在约350密耳处设置气体分布器或“喷淋头”;通过在13.56MHz的高频下施加约300W的功率水平来生产等离子体,保持约20秒。
等离子体处理工艺的另一个实例包括:以约75sccm的流率向处理室提供氨;以约5000sccm的流率向处理室提供氮;保持室压力为约4.2Torr;保持加热器温度为约350℃;在约350密耳处设置气体分布器或“喷淋头”;通过在13.56MHz的高频下施加约150W的功率水平来生产等离子体,保持约15秒。
如图2A所示,通过在还原气体的存在下将有机硅化合物引入处理室,可以在衬底和其上暴露的导电材料上沉积氮化层130。这可以通过在用于原位沉积的等离子体处理过程中或之后立即将有机硅化合物引入处理室而实现,有机硅化合物可与来自还原气体的氮反应以形成氮化层,例如掺杂氮的硅碳化物(SiCN:H)或掺杂氮的硅氧碳化物(SiCON:H)。还原化合物可与有机硅化合物一起供给,或有机硅化合物可与来自等离子体处理的残余量的还原化合物反应。还原化合物与有机硅化合物之间的反应可以是热或等离子体增强的沉积过程。合适的有机硅化合物的实例包括三甲基硅烷(TMS)和二甲基苯基硅烷(DMPS)。
沉积氮化硅碳化物层130的一种实施方式包括:以约10sccm至约1000sccm(例如,约50sccm至约500sccm)的流率引入有机硅化合物;以约100sccm至约2500sccm(例如,约500sccm至约2000sccm)的流率向处理室提供还原化合物,并且可选地以约1sccm至约10000sccm的流率供给惰性气体;保持室压力为约100mTorr至约100Torr(例如,约2.5Torr至约9Torr);保持加热器温度为约100℃至约500℃(例如,约250℃至约450℃);在距衬底表面约200密耳至约1000密耳(例如,200密耳至400密耳)处设置气体分布器或“喷淋头”;可选地,生成等离子体。
通过在高频(例如,约13MHz至约14MHz,如13.56MHz)下施加约0.03W/cm2至约6.4W/cm2的功率密度(对于200mm的衬底,为约10W至约2000W的RF功率水平,例如约500W至约1100W),可以生成等离子体。通过在高频(例如约13MHz至约14MHz,如13.56MHz)下施加约0.01W/cm2至约2.8W/cm2的功率密度(对于300mm的衬底,为约10W至约2000W的RF功率水平,例如约500W至约1100W),可以生成等离子体。
功率可由双频RF功率源的第一RF功率和至少第二RF功率来施加,其中,第一RF功率的频率范围为约10MHz至约30MHz,功率范围为约200W至约1000W;第二PF功率的频率范围为约100KHz至约500KHz,功率范围为约1W至约200W。沉积初始层的时间可为约1秒至约60秒,例如约1秒至约5秒,如2秒。
沉积氮化层130的实例包括:以700sccm的流率将氨引入处理室;以1200sccm的流率将氦引入处理室;以约350sccm的流率引入三甲基硅烷(TMS);保持室在约350℃的加热器温度下;保持室压力为约3.7Torr;在距衬底表面约280密耳处设置气体分布器;在13.56MHz下施加约900W的RF功率。
可如本文所述沉积后续的硅碳化物层132,并且,例如,连续引入上述的有机硅化合物,或如本文所述通过调节硅碳化物化合物气体流率以及任意掺杂物、载气或其它化合物,从而沉积具有期望性质的硅碳化物层。在还原化合物处理工艺过程中或之后立即形成有机硅化合物的连续流动,使得氧化物的去除、氮化层的形成以及硅碳化物层的沉积可在原位进行。本文公开的实施例2提供了沉积工艺的实例。
此外,在等离子体处理工艺与沉积工艺之间,以及沉积工艺之间,可以进行处理气体稳定步骤。这种稳定步骤通常包括具有按处理或沉积工艺所需生成的新的等离子体的无等离子体的工艺。
可选地,可以进行所有本文所述的已沉积的硅碳化物材料(包括本文所述的掺杂氮的硅碳化物材料)的后沉积等离子体处理,以增强已沉积材料的性质,或者去除污染物或在其上后续沉积材料之前清洁硅碳化物层的暴露表面。后沉积等离子体处理可以与沉积工艺一起原位进行。
可以应用惰性气体、还原气体或其组合的后沉积等离子体处理。等离子体惰性气体包括氦、氩、氖、氙、氪或其组合,其中氦是优选的。还原气体包括氢、氨或其组合,其中氨是优选的。后沉积等离子体处理可以是等离子体净化步骤的结果,在该净化步骤中,当排空处理室时,停止提供除一种以外的全部气体。
后沉积等离子体处理的实例包括:以950sccm的流率将氨引入处理室;保持室在约350℃的加热器温度下;保持室压力为约3.7Torr;在距衬底表面约280密耳处设置气体分布器;并且,在13.56MHz下施加约300W的RF功率,保持约2秒。
在等离子体处理和沉积工艺的一种实施方式中,可在等离子体处理之后和在沉积工艺之前实施有机硅化合物(例如三甲基硅烷)的等离子体。有机硅化合物的等离子体被认为在等离子体处理的表面上形成硅化物层,以改善沉积的硅碳化物层的粘附性。包括有机硅等离子体改性工艺的处理步骤包括:例如,如本文所述使衬底表面暴露于等离子体处理;有机硅化合物的稳定步骤;产生有机硅化合物的等离子体;然后沉积掺杂氮的硅碳化物。
有机硅化合物等离子体的一个实例包括:以约50sccm至约1500sccm(例如,约400sccm至约500sccm)的流率向处理室提供有机硅化合物;可选地,以约100sccm至约20000sccm(例如,约800sccm至约1500sccm)的流率向处理室提供惰性气体(例如,氦);保持室压力为约1Torr至约12Torr(例如,约2.5Torr至约9Torr);保持加热器温度为约100℃至约500℃(例如,约250℃至约450℃);在距衬底表面约200密耳至约1000密耳(例如300密耳至500密耳)处设置气体分布器或“喷淋头”;生成等离子体。等离子体处理可进行约1秒至约10秒,例如,优选使用约1秒至约5秒。
通过在高频(例如约13MHz至约14MHz,如13.56MHz)下施加约0.03W/cm2至约3.2W/cm2的功率密度(对于200mm的衬底,为约10W至约1000W的RF功率水平,例如约100W至约400W),可以生成等离子体。通过在高频(例如约13MHz至约14MHz,如13.56MHz)下施加约0.01W/cm2至约1.4W/cm2的功率密度(对于300mm的衬底,为约10W至约1000W的RF功率水平,例如约100W至约400W),可以生成等离子体。或者,可通过本文所述的双频RF功率源来生成等离子体。或者,所有的等离子体的生成可远程进行,而将生成的基团引入处理室,用于已沉积材料的等离子体处理或材料层的沉积。这里公开的实施例3提供了一个实例。
在等离子体处理和沉积工艺的另一种实施方式中,在等离子体处理之后和在沉积工艺之前,可通过有机硅化合物(例如三甲基硅烷)来沉积硅氮化物层。处理步骤包括:例如,如本文所述使衬底表面暴露于等离子体处理;硅氮化物沉积工艺的稳定步骤;沉积硅氮化物层;掺杂氮的硅碳化物沉积工艺的稳定步骤;然后沉积掺杂氮的硅碳化物化合物。硅氮化物材料可以是掺杂碳的硅氮化物。
硅氮化物沉积工艺的一个实例包括:以约50sccm至约1000sccm(例如,约250sccm至约500sccm)的流率向处理室提供有机硅化合物;以约500sccm至约2500(例如,约1250sccm至约1750sccm)的流率向处理室提供含氮化合物(例如本文所述的还原化合物);可选地,以约100sccm至约20000sccm(例如,约15000sccm至约19000sccm)的流率向处理室提供惰性气体(例如,氦或氮);保持室压力为约1Torr至约12Torr(例如,约2.5Torr至约9Torr);保持加热器温度为约100℃至约500℃(例如,约250℃至约450℃);在距衬底表面约200密耳至约1000密耳(例如300密耳至500密耳)处设置气体分布器或“喷淋头”;并且,生成等离子体。等离子体处理可进行约1秒至约10秒,例如,优选使用约1秒至约5秒。
通过在高频(例如,约13MHz至约14MHz,如13.56MHz)下施加约0.03W/cm2至约6.4W/cm2的功率密度(对于200mm的衬底,为约10W至约1200W的RF功率水平,例如约100W至约400W),可以生成等离子体。通过在高频(例如约13MHz至约14MHz,如13.56MHz)下施加约0.01W/cm2至约2.8W/cm2的功率密度(对于300mm的衬底,为约10W至约2000W的RF功率水平,例如约100W至约400W),可以生成等离子体。或者,可通过本文所述的双频RF功率源来生成等离子体。或者,所有的等离子体的生成可远程进行,而将生成的基团引入处理室,用于已沉积材料的等离子体处理或材料层的沉积。本文公开的实施例4提供了一个实例。
硅化物的形成
参见图3A-3C,在本文所述的处理和沉积工艺的另一种实施方式中,可通过以下方法提供层间粘附性:如图3A所示,在具有导电材料126的衬底上引入硅基化合物,所述导电材料126可以具有氧化部分128;然后,如图3B所示,使硅基化合物与导电材料反应,以在导电材料140上形成硅化物142。硅沉积142可在硅化物形成过程中在电介质材料上发生。然后,如图3C所示,将有机硅化合物引入处理室中和沉积在硅化物层142上和衬底表面上的硅碳化物层144中。可使用掺杂物(例如,含氮化合物,包括氨)与导电材料一起形成硝基硅化物。此外,合适的硅基化合物(例如,硅烷(SiH4))可另外作为还原化合物,以去除在导电材料上形成的任何氧化物。而且,在引入硅基化合物之前,可对衬底表面进行惰性等离子体处理。
硅基化合物可包括无碳硅化合物,包括硅烷、二硅烷及其衍生物。硅基化合物还可包括含碳硅化合物,包括本文所述的有机硅化合物,例如三甲基硅烷(TMS)和/或二甲基苯基硅烷(DMPS)。通过热和/或等离子体增强工艺,硅基化合物可与暴露的导电材料反应。掺杂物(例如氧和氮)可与本文所述的硅基化合物一起使用。另外,在硅化物工艺中,可使用惰性气体(例如,包括氦和氩的稀有气体),所述惰性气体优选用作热工艺的载气或者用作等离子体增强硅化物形成工艺的附加等离子体物质。含硅化合物还可包括掺杂物(例如本文所述的还原化合物),以形成硝基硅化物。在这样的实施方式中,还原化合物可如本文所述被输送。
采用本文所述的硅基化合物的硅化物工艺的一个实例包括:以约10sccm至约1000sccm(例如,约75sccm至约200sccm)的流率向处理室提供硅基化合物;保持室压力为约1Torr至约12Torr(例如,约2.5Torr至约9Torr);保持加热器温度为约100℃至约500℃(例如,约250℃至约450℃);在距衬底表面约200密耳至约1000密耳(例如200密耳至400密耳)处设置气体分布器或“喷淋头”。
硅化物的形成可以通过产生等离子体进一步增强。通过在高频(例如约13MHz至约14MHz,如13.56MHz)下施加约0.03W/cm2至约6.4W/cm2的功率密度(对于200mm的衬底,为约10W至约2000W的RF功率水平,例如约100W至约400W),可以生成等离子体。通过在高频(例如约13MHz至约14MHz,如13.56MHz)下施加约0.01W/cm2至约2.8W/cm2的功率密度(对于300mm的衬底,为约10W至约2000W的RF功率水平,例如约100W至约400W),可以生成等离子体。或者,可通过本文所述的双频RF功率源来生成等离子体。或者,所有等离子体的生成可远程进行,而将生成的基团引入处理室,用于已沉积的材料的等离子体处理或材料层的沉积。等离子体可生成约1秒至约60秒(例如,优选约1秒至约5秒),以形成硅化物层。
硅化物工艺的一个实例包括:以约125sccm的流率向处理室提供硅烷;以约400sccm的流率向处理室提供氦;以约325sccm的流率向处理室提供氨;保持室压力为约3Torr;保持加热器温度为约350℃;在约300密耳处设置气体分布器或“喷淋头”,保持2.5秒。
可选地,在硅化物形成之后,可如本文所述将衬底表面暴露于还原化合物的等离子体中。还原等离子体暴露被认为可形成掺杂氮的硅化物层。掺杂氮的硅化物层(金属硅氮化物,对于铜则为铜硅氮化物(CuSiN))还被认为可改善层间粘附性。
可按本文所述的硅碳化物沉积方法来沉积后续的硅碳化物层。硅碳化物沉积也可使用与硅化物工艺所用相同的含碳硅基化合物来进行,并且可在相同的室内进行。硅碳化物层可暴露于本文所述的后沉积等离子体中。
在硅化物形成工艺的一种实施方式中,对衬底进行如本文所述的还原化合物的等离子体处理,使其暴露于含硅化合物以形成硅化物,然后在其上沉积掺杂氮的硅碳化物层。处理步骤还可包括在硅化物形成工艺之前的稳定步骤。
在硅化物工艺的另一种实施方式中,可在硅化物形成之后和沉积工艺之前沉积硅氮化物层。处理步骤包括:例如,如本文所述使衬底表面暴露于等离子体处理;硅化物形成的稳定步骤;沉积硅氮化物层;然后沉积掺杂氮的硅碳化物层。处理步骤还可包括在硅化物形成工艺之前的稳定步骤。硅氮化物材料可以是掺杂碳的硅氮化物。
硅氮化物沉积工艺的一个实例包括:以约50sccm至约1000sccm(例如,约50sccm至约300sccm)的流率向处理室提供硅烷;以约10sccm至约1000sccm(例如,约50sccm至约150sccm)的流率向处理室提供含氮化合物(例如,本文所述的还原化合物);可选地,以约10sccm至约20000sccm(例如,约2000sccm至约10000sccm)的流率向处理室提供惰性气体(例如,氦或氮);保持室压力为约1Torr至约12Torr(例如,约2.5Torr至约9Torr);保持加热器温度为约100℃至约500℃(例如,约250℃至约450℃);在距衬底表面约200密耳至约1000密耳(例如300密耳至600密耳)处设置气体分布器或“喷淋头”;生成等离子体。等离子体可生成约1秒至约10秒,例如,约1秒至约5秒。
通过在高频(例如约13MHz至约14MHz,如13.56MHz)下施加约0.03W/cm2至约6.4W/cm2的功率密度(对于200mm的衬底,为约10W至约2000W的RF功率水平,例如约100W至约400W),可以生成等离子体。通过在高频(例如约13MHz至约14MHz,如13.56MHz)下施加约0.01W/cm2至约2.8W/cm2的功率密度(对于300mm的衬底,为约10W至约2000W的RF功率水平,例如约100W至约400W),可以生成等离子体。或者,可通过本文所述的双频RF功率源来生成等离子体。或者,所有等离子体的生成可远程进行,而将生成的基团引入处理室,用于已沉积材料的等离子体处理或材料层的沉积。
硅氮化物沉积工艺的一个实例包括:以约220sccm的流率向处理室提供硅烷;以约5000sccm的流率向处理室提供氮;以约75sccm的流率向处理室提供氨;保持室压力为约4.2Torr;保持加热器温度为约350℃;在约495密耳处设置气体分布器或“喷淋头”;并且,在约440W至约450W的RF功率水平下生成等离子体,保持约2秒。
可按本文所述的硅碳化物沉积方法来沉积后续的硅碳化物层。硅碳化物沉积也可使用与硅化物工艺所用相同的含碳硅基化合物来进行,并且可在相同的室内进行。
实施例
下面的实施例说明了本发明的粘附工艺的各种实施方式,与标准的层积相比,本发明可改善层间粘附性。这些样品在ProducerTm300mm处理室中进行处理,该装置包括具有双片石英工艺套件的固态双频RF匹配单元,二者均由California,Santa Clara的Applied Materials,Inc制造并出售。
测试样品如下制备。按如下方法在硅衬底上沉积电介质叠层。所述衬底包括硅衬底,硅衬底上布置有约1000的硅氧化物,硅氧化物上布置有约250的钽,钽上布置有约4500的铜,然后对所述衬底进行本文所述的粘附工艺,通常得到沉积在铜层上的约2000的掺杂氮的硅碳化物。
按如下方法对测试样品进行粘附性测试。在测试样品上沉积约120μm至约150μm的具有已知的层离特性的环氧材料。在环氧材料层上沉积硅层。然后将测试样品在约190℃下烘焙或固化一小时,之后切成1cm见方的样品并用液氮冷却至-170℃。然后观察该样品以确定层离,在给定温度下,层离发生在最薄弱的层间界面处。给定温度下的环氧材料的收缩与造成剥离所需的力有关。根据此观察,可定量计算粘附力。粘附力(GC)基于式计算,其中,h为环氧层厚度,σ为残余应力。
实施例1
粘附工艺包括:氨等离子体处理,之后进行稳定工艺,然后在衬底表面沉积掺杂氮的硅碳化物。该工艺如下进行。
等离子体处理工艺包括:以约160sccm的流率向处理室提供氨;以约18000sccm的流率向处理室提供氮;保持室压力为约4.2Torr;保持加热器温度为约350℃;在约350密耳处设置气体分布器或“喷淋头”;并且,通过在13.56MHz的高频下施加约300W的RF功率水平,生成等离子体,保持约20秒。
稳定工艺包括:以约350sccm的流率向处理室提供三甲基硅烷;以约700sccm的流率向处理室提供氨;以约1200sccm的流率向处理室提供氦;保持室压力为约3.7Torr;保持加热器温度为约350℃;在约280密耳处设置气体分布器或“喷淋头”。稳定工艺可进行约5秒。在13.56MHz的高频下施加约900W的RF功率水平以生成等离子体,保持约63秒,由此引发有机硅化合物的等离子体,从而沉积掺杂氮的硅碳化物层。
测得的实施例1的衬底的粘附力GC为约3.8±0.6J-m2。
实施例2
粘附工艺包括:氨等离子体处理,然后在衬底表面形成氮化硅碳化物。该工艺如下进行。
等离子体处理工艺包括:以约700sccm的流率向处理室提供氨;以约1200sccm的流率向处理室提供氦;保持室压力为约4.2Torr;保持加热器温度为约350℃;在约350密耳处设置气体分布器或“喷淋头”;通过在13.56MHz的高频下施加约300W的RF功率水平,生成等离子体,保持约20秒。
氮化层如下沉积:以700sccm的流率向处理室提供氨;以1200sccm的流率向处理室提供氦;以约350sccm的流率向处理室提供三甲基硅烷(TMS);保持加热器温度为约350℃;保持室压力为约3.7Torr;在距衬底表面约280密耳处设置气体分布器;并且在13.56MHz下施加约900W的RF功率。
测得的实施例2的衬底的粘附力GC为约3.2±0.3J-m2。
实施例3
粘附工艺包括:氨等离子体处理,之后进行有机硅等离子体处理的稳定工艺;然后在衬底表面上沉积掺杂氮的硅碳化物层。该工艺如下进行。
等离子体处理工艺包括:以约160sccm的流率向处理室提供氨;以约18000sccm的流率向处理室提供氮;保持室压力为约4.2Torr;保持加热器温度为约350℃;在约350密耳处设置气体分布器或“喷淋头”;并且,通过在13.56MHz的高频下施加约300W的RF功率水平,生成等离子体,保持约20秒。
稳定工艺包括:以约450sccm的流率向处理室提供三甲基硅烷;以约1200sccm的流率向处理室提供氦;保持室压力为约3.7Torr;保持加热器温度为约350℃;在约280密耳处设置气体分布器或“喷淋头”。稳定工艺可进行约5秒。在13.56MHz的高频下施加约300W的RF功率水平以生成等离子体,保持约2秒,由此引发有机硅化合物的等离子体。
掺杂氮的硅碳化物层如下沉积:以700sccm的流率向处理室提供氨;以约1200sccm的流率向处理室提供氦;以约350sccm的流率向处理室提供三甲基硅烷(TMS);保持加热器温度为约350℃;保持室压力为约3.7Torr;在距衬底表面约280密耳处设置气体分布器;并且,在13.56MHz下施加约900W的RF功率。
测得的实施例3的衬底的粘附力GC为约4.0±0.2J-m2。
实施例4
等离子体处理工艺包括:以约160sccm的流率向处理室提供氨;以约18000sccm的流率向处理室提供氮;保持室压力为约4.2Torr;保持加热器温度为约350℃;在约350密耳处设置气体分布器或“喷淋头”;并且,通过在13.56MHz的高频下施加约300W的RF功率水平,生成等离子体,保持约20秒。
稳定工艺包括:以约350sccm的流率向处理室提供三甲基硅烷;以约1500sccm的流率向处理室提供氨;以约18000sccm的流率向处理室提供氮;保持室压力为约3.7Torr;保持加热器温度为约350℃;在约280密耳处设置气体分布器或“喷淋头”,保持约5秒。在13.56MHz的高频下施加约900W的RF功率水平以生成等离子体,保持约2-3秒,由此引发有机硅化合物的等离子体,从而沉积(掺杂碳的)硅氮化物层。
稳定工艺包括:以约350sccm的流率向处理室提供三甲基硅烷;以约700sccm的流率向处理室提供氨;以约1200sccm的流率向处理室提供氦;保持室压力为约3.7Torr;保持加热器温度为约350℃;在约280密耳处设置气体分布器或“喷淋头”,保持约5秒。在13.56MHz的高频下施加约900W的RF功率水平以生成等离子体,保持约60秒,由此引发有机硅化合物的等离子体,从而沉积掺杂氮的硅碳化物层。
测得的实施例4的衬底的粘附力GC为约2.9±0.3J-m2。
实施例5
粘附工艺包括硅化物工艺,包括:氨等离子体处理,硅化物形成的稳定工艺;硅化物形成;然后在衬底表面上沉积掺杂氮的硅碳化物。该工艺如下进行。
等离子体处理工艺包括:以约75sccm的流率向处理室提供氨;以约5000sccm的流率向处理室提供氮;保持室压力为约4.2Torr;保持加热器温度为约350℃;在约350密耳处设置气体分布器或“喷淋头”;并且,通过在13.56MHz的高频下施加约150W的RF功率水平,生成等离子体,保持约15秒。
稳定工艺包括:以约325sccm的流率向处理室提供氨;以约400sccm的流率向处理室提供氦;保持室压力为约3Torr;保持加热器温度为约350℃;在约300密耳处设置气体分布器或“喷淋头”,保持约10秒。
如下形成硅化物:以约125sccm的流率向处理室提供硅烷;以约400sccm的流率向处理室提供氦;以约325sccm的流率向处理室提供氨;保持室压力为约3Torr;保持加热器温度为约350℃;在约300密耳处设置气体分布器或“喷淋头”,保持约2.5秒。
可如下沉积掺杂氮的硅碳化物:以约160sccm的流率向处理室提供三甲基硅烷;以约325sccm的流率向处理室提供氨;以约400sccm的流率向处理室提供氦;保持室压力为约3Torr;保持加热器温度为约350℃;在约300密耳处设置气体分布器或“喷淋头”;并且通过在13.56MHz的高频下施加约300-310W的RF功率水平,生成等离子体,保持约76秒。
测得的实施例4衬底的粘附力GC为约3.9±0.5J-m2。
实施例6
等离子体处理工艺包括:以约75sccm的流率向处理室提供氨;以约5000sccm的流率向处理室提供氮;保持室压力为约4.2Torr;保持加热器温度为约350℃;在约350密耳处设置气体分布器或“喷淋头”;通过在13.56MHz的高频下施加约150W的RF功率水平,生成等离子体,保持约15秒。
稳定工艺包括:以约75sccm的流率向处理室提供氨;以约5000sccm的流率向处理室提供氮;保持室压力为约4.2Torr;保持加热器温度为约350℃;在约495密耳处设置气体分布器或“喷淋头”,保持约5秒。通过以约125sccm的流率向处理室提供硅烷来形成硅化物,保持约2.5秒。
如下沉积硅氮化物:以约220sccm的流率向处理室提供硅烷;以约75sccm的流率向处理室提供氨;以约5000sccm的流率向处理室提供氮;保持室压力为约4.2Torr;保持加热器温度为约350℃;在约495密耳处设置气体分布器或“喷淋头”;通过在13.56MHz的高频下施加约440-450W的RF功率水平,生成等离子体,保持约2秒。
可如下沉积掺杂氮的硅碳化物:以约160sccm的流率向处理室提供三甲基硅烷;以约325sccm的流率向处理室提供氨;以约400sccm的流率向处理室提供氦;保持室压力为约3Torr;保持加热器温度为约350℃;在约300密耳处设置气体分布器或“喷淋头”;通过在13.56MHz的高频下施加约300-310W的RF功率水平,生成等离子体,保持约72秒。
测得的实施例4的衬底的粘附力GC为约5.3J-m2。
层沉积
通过使有机硅化合物反应来沉积硅碳化物层,从而形成含碳-硅键且介电常数小于约4的电介质层。硅碳化物层优选为无定型氢化硅碳化物。可以在惰性气体、氢气和二者的等离子体中沉积硅碳化物层。硅碳化物电介质层可以是掺杂的硅碳化物层。硅碳化物层可以作为阻挡层沉积在与导电材料或电介质层相邻的位置,或者硅碳化物电介质层可以是沉积在一个或多个电介质层之间的蚀刻终止层。
用于沉积硅碳化物的合适的有机硅化合物的实例优选包括以下结构:
其中,R包括有机官能团,包括烷基、链烯基、环己烯基、芳基及其官能衍生物。有机化合物可具有多于一个的与硅原子连接的R基,本发明可使用具有或不具有Si-H键的有机硅化合物。
有机硅化合物包括脂族有机硅化合物、环状有机硅化合物或其组合(其具有至少一个硅-碳键)并且,任选地,该结构中可以包含氧。环状有机硅化合物通常具有包含三个或更多个硅原子的环。脂族有机硅化合物具有包含一个或多个硅原子和一个或多个碳原子的直链或支化结构。可购得的脂族有机硅化合物包括在硅原子之间不含氧的有机硅烷,而对于掺杂氧的硅碳化物层,则包括在两个或更多个硅原子之间含有氧的有机硅氧烷。在本发明中,有机硅化合物的氟化衍生物也可用于沉积硅碳化物和硅氧碳化物层。
合适的脂族和环状有机硅化合物的例子包括,例如一种或多种下列化合物:
甲基硅烷 CH3-SiH3
二甲基硅烷 (CH3)2-SiH2
三甲基硅烷(TMS) (CH3)3-SiH
乙基硅烷 CH3-CH2-SiH3
二硅烷基甲烷 SiH3-CH2-SiH3
双(甲基硅烷基)甲烷 CH3-SiH2-CH2-SiH2-CH3
1,2-二硅烷基乙烷 SiH3-CH2-CH2-SiH3
1,2-双(甲基硅烷基)乙烷 CH3-SiH2-CH2-CH2-SiH2-CH3
2,2-二硅烷基丙烷 SiH3-C(CH3)2-SiH3
1,3,5-三硅烷基-2,4,6-三亚甲基 -(-SiH2CH2-)3-(环状)
二乙基硅烷 (C2H5)2SiH2
丙基硅烷 C3H7SiH3
乙烯基甲基硅烷 (CH2=CH)(CH3)SiH2
二乙烯基二甲基硅烷(DVDMS) (CH2=CH)2(CH3)2Si
1,1,2,2-四甲基二硅烷 HSi(CH3)2-Si(CH3)2H
六甲基二硅烷 (CH3)3Si-Si(CH3)3
1,1,2,2,3,3-六甲基三硅烷 H(CH3)2Si-Si(CH3)2-SiH(CH3)2
1,1,2,3,3-五甲基三硅烷 H(CH3)2Si-SiH(CH3)-SiH(CH3)2
二甲基二硅烷基乙烷 CH3-SiH2-(CH2)2-SiH2-CH3
二甲基二硅烷基丙烷 CH3-SiH2-(CH2)3-SiH2-CH3
四甲基二硅烷基乙烷 (CH)2-SiH-(CH2)2-SiH-(CH)2
四甲基二硅烷基丙烷 (CH3)2-SiH-(CH2)3-SiH-(CH3)2
以上所列仅为示例性,而不应当理解或解释为限制本发明的范围。
含苯基的有机硅化合物的苯基也可用于沉积硅碳化物材料,其通常包括以下结构:
其中,R为苯基。例如,合适的含苯基的有机硅化合物通常包括式SiHa(CH3)b(C6H5)c,其中a为0-3,b为0-3,c为1-4,且a+b+c=4。从此式得出的合适化合物的例子包括二苯基硅烷、二甲基苯基硅烷、二苯基甲基硅烷、苯基甲基硅烷及其组合。优选使用的是b为1-3且c为1-3的含苯基的有机硅化合物。最优选的作为阻挡层用于沉积的有机硅化合物包括具有式SiHa(CH3)b(C6H5)c的有机硅化合物,其中a为1或2、b为1或2且c为1或2。优选的化合物的例子包括二甲基苯基硅烷和二苯基甲基硅烷。
通常,在包含较具惰性的气体(例如,氮(N2))和稀有气体(例如氦或氩)的等离子体中使有机硅化合物反应。沉积的硅碳化物层的介电常数为约5或更小,掺杂的硅碳化物层的介电常数为约3或更小。处理气体还可包括氢气。氢气通常以约1:1至约10:1(例如,约1:1至约6:1)的有机硅化合物与氢气的摩尔比被添加。优选的有机硅化合物与氢气的沉积工艺具有约1:1至约1.5:1的有机硅化合物与氢气的摩尔比。
在一种实施方式中,通过以约10毫克/分钟(mgm)至约5000毫克/分钟(mgm)的流率将三甲基硅烷供给至等离子体处理室来沉积优选的硅碳化物层。对于不同的有机硅化合物,由于从毫克/分钟到标准立方分米/分钟(sccm)的转换可能存在差异,因此优选使用毫克/分钟。惰性气体(例如氦、氩或其组合)也被以约50sccm至约5000sccm的流率供给至处理室中。室压力被保持在约100mTorr至约15Torr。在沉积过程中,衬底表面温度被保持在约100℃至约450℃。沉积硅碳化物层的工艺的一个例子被2003年3月25日授权的美国专利No.6537733所公开,通过引用将其与本发明的权利要求和说明书一致的部分包含于此。
硅碳化物层也可以是含氧、氮、硼、磷或其组合的掺杂的硅碳化物层。掺杂的硅碳化物通常包含少于约15原子百分比(原子%)或更少的一种或多种掺杂物。掺杂物可用在处理气体中,掺杂物与有机硅化合物的比为约1:5或更小,例如,约1:5至约1:100。
在反应过程中,可用氧源或氮源来形成掺杂氧和/或掺杂氮的硅碳化物层。氧源的例子包括氧化气体(例如,氧、臭氧、一氧化碳、二氧化碳、氧化亚氮)和含氧的有机硅化合物或其组合,例如一氧化碳与含氧的有机硅化合物。掺杂氧的硅碳化物通常包含少于约15原子%的氧,优选约10原子%或更少的氧。
含氧有机硅化合物包括,例如:
二甲基二甲氧基硅烷(DMDMOS) (CH3)2-Si-(OCH3)2
二乙氧基甲基硅烷(DEMS) (CH3)-SiH-(OCH3)2
1,3-二甲基二硅氧烷 CH3-SiH2-O-SiH2-CH3
1,1,3,3-四甲基二硅氧烷(TMDSO) (CH3)2-SiH-O-SiH-(CH3)2
六甲基二硅氧烷(HMDS) (CH3)3-Si-O-Si-(CH3)3
六甲氧基二硅氧烷(HMDSO) (CH3O)3-Si-O-Si-(OCH3)3
1,3-双(硅烷基亚甲基)二硅氧烷 (SiH3-CH2-SiH2-)2-O
双(1-甲基二硅氧烷基)甲烷 (CH3-SiH2-O-SiH2-)2-CH2
2,2-双(1-甲基二硅氧烷基)丙烷 (CH3-SiH2-O-SiH2-)2-C(CH3)2
1,3,5,7-四甲基环四硅氧烷(TMCTS) -(-SiHCH3-O-)4-(环状)
八甲基环四硅氧烷(OMCTS) -(-Si(CH3)2-O-)4-(环状)
2,4,6,8,10-五甲基环五硅氧烷 -(-SiHCH3-O-)5-(环状)
1,3,5,7-四硅烷基-2,6-二氧-4,8-二亚甲基 -(-SiH2-CH2-SiH2-O-)2-(环状)
六甲基环三硅氧烷 -(-Si(CH3)2-O-)3-(环状)
1,3-二甲基二硅氧烷 CH3-SiH2-O-SiH2-CH3
六甲氧基二硅氧烷(HMDOS) (CH3O)3-Si-O-Si-(OCH3)3
及其氟化衍生物
掺杂氮的硅碳化物可包含高达20原子%的氮,并可通过添加含氮化合物来沉积,含氮化合物包括例如氨、氮气、氮气和氢气的混合物以及具有Si-N-Si键合基团的化合物(例如,硅氮烷)。合适的硅氮烷化合物包括脂族化合物(例如六甲基二硅氮烷和二乙烯基四甲基二硅氮烷)和环状化合物(例如六甲基环三硅氮烷)。
例如,通过以约50sccm至约10000sccm的流率将氧源和/或氮源或其它掺杂物引入处理室,可以沉积掺杂的硅碳化物层。例如,通过在沉积硅碳化物层时引入氮源(例如氨、氮、氮和氢的混合物,或其组合),可以沉积含氮的或掺杂氮的硅碳化物层。
通过在沉积过程中将膦(PH3)或硼烷(BH3)或其硼烷衍生物(例如,二硼烷(B2H6))引入处理室,可以进行低k硅碳化物层的磷和/或硼掺杂。认为掺杂物可降低沉积的硅碳化物材料的介电常数。可以以约50sccm至约10000sccm的流率将磷和/或硼掺杂物引入处理室。
处理气体中也可使用有机化合物(例如,脂族烃化合物)来提高沉积的硅碳化物材料的碳含量。合适的脂族烃化合物包括具有1至约20个相邻的碳原子的化合物。烃化合物可包含通过单键、双键和三键的任意组合而键合的相邻的碳原子。
沉积含氮硅碳化物层的工艺的例子被2000年7月28日、2001年2月23日提交的美国专利申请No.09/627667和2003年3月25日授权的美国专利No.6537733所公开,通过引用将其与本发明的权利要求和说明书一致的部分包含于此。沉积含氧硅碳化物层的工艺的例子被2002年7月15日提交的美国专利申请No.10/196498所公开,通过引用将其与本发明的权利要求和说明书一致的部分包含于此。沉积掺杂硼和/或磷的硅碳化物层的工艺的例子被2003年1月13日提交的美国专利申请No.10/342079所公开,通过引用将其与本发明的权利要求和说明书一致的部分包含于此。
通常,通过与其上沉积硅碳化物层的衬底相距约200mm至约600mm的气体分布板,将有机硅化合物、惰性气体和可选的掺杂物引入处理室。
可用单频和双频RF功率源来施加功率。例如,通过在高频(例如,约13MHz至约14MHz,如13.56MHz)下施加约0.03W/cm2至约6.4W/cm2的功率密度(对于200mm的衬底,为约10W至约2000W的RF功率水平,例如,约500W至约1100W),可以生成等离子体。通过在高频(例如,约13MHz至约14MHz,如13.56MHz)下施加约0.01W/cm2至约2.8W/cm2的功率密度(对于300mm的衬底,为约10W至约2000W的RF功率水平,例如,约500W至约1100W),可以生成等离子体。
可由双频RF功率源来施加功率。混合RF功率的双频源提供约10MHz至约30MHz(例如,约13.56MHz)的高频功率以及约100KHz至约500KHz(例如,约350KHz)的低频功率。混频RF功率施加的例子可包括第一RF功率和至少第二RF功率,其中,第一RF功率的频率范围为约10MHz至约30MHz,功率范围为约200W至约1000W;第二PF功率的频率范围为约100KHz至约500KHz,功率范围为约1W至约200W。第二RF功率与总混频功率的比优选小于约0.2∶1.0。
此外,气体混合物中的硅源与掺杂物的比率应为约1:1至约100:1。当在可从California,Santa Clara的Applied Materials,Inc购得的沉积室中对200mm的衬底实施时,上述工艺参数提供了100/min至约3000/min的硅碳化物层沉积速率。
本文所述的沉积硅碳化物层的实施方式用于说明本发明,所述的具体实施方式不应用于限制本发明的范围。本发明还涵盖其它用于沉积硅碳化物层的工艺和材料。
虽然上面所述涉及本发明的实施方式,但是可以设计本发明的其它和更多的实施方式,而不偏离本发明的基本范围,本发明的基本范围有所附权利要求确定。
Claims (14)
1.一种处理衬底的方法,包括:
将所述衬底置于处理室中,其中所述衬底包括在其上形成的一个或多个图案化的低k电介质层和导电材料;
将硅基化合物和含氮还原化合物同时引入所述处理室;
形成所述导电材料的硝基硅化物层;
引发所述硅基化合物和所述含氮还原化合物的等离子体;
沉积硅氮化物层;并且
在不破坏真空条件下,在所述硅氮化物层上沉积硅碳化物层。
2.如权利要求1的方法,其中所述硝基硅化物是通过热增强工艺、等离子体增强工艺或上述二者使所述硅基化合物和所述含氮还原化合物与所述导电材料反应而形成的。
3.如权利要求1的方法,其中所述硅基化合物包括无碳硅基化合物。
4.如权利要求3的方法,其中所述无碳硅基化合物包括硅烷。
5.如权利要求1的方法,其中所述硅碳化物层如下沉积:
将选自三甲基硅烷、2,4,6,8-四甲基环四硅氧烷、八甲基环四硅氧烷、二甲基苯基硅烷、二苯基甲基硅烷及其组合的有机硅化合物引入所述处理室;并且
生成所述有机硅化合物的等离子体。
6.如权利要求5的方法,还包括:在沉积所述硅碳化物层过程中,引入惰性气体、还原化合物、硅基化合物或其组合。
7.如权利要求1的方法,其中所述硅基化合物包括含碳硅基化合物。
8.如权利要求7的方法,其中所述含碳硅基化合物包括三甲基硅烷、二甲基苯基硅烷、二苯基甲基硅烷及其组合。
9.如权利要求8的方法,还包括:与所述含碳硅基化合物一起引入惰性气体,其中所述惰性气体包括氦、氩或其组合。
10.如权利要求1的方法,还包括:在沉积所述硅氮化物层之前,将所述硝基硅化物层暴露于包含氮和氢的还原化合物的等离子体中。
11.如权利要求9的方法,其中所述硝基硅化物是在惰性气体的存在下通过等离子体增强工艺使所述含碳硅基化合物和所述含氮还原化合物与所述导电材料反应而形成的。
12.如权利要求1的方法,还包括:
将包含氮和氢的还原化合物引入所述处理室;
在所述处理室中引发所述包含氮和氢的还原化合物的等离子体;并且
在将所述硅基化合物引入所述处理室之前,将所述导电材料暴露于所述包含氮和氢的还原化合物的所述等离子体中。
13.如权利要求12的方法,其中所述包含氮和氢的还原化合物包含氨、或者氮气和氢气的混合物。
14.如权利要求12的方法,还包括:与所述包含氮和氢的还原化合物一起引入惰性气体。
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Families Citing this family (43)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6967405B1 (en) | 2003-09-24 | 2005-11-22 | Yongsik Yu | Film for copper diffusion barrier |
US7420275B1 (en) | 2003-09-24 | 2008-09-02 | Novellus Systems, Inc. | Boron-doped SIC copper diffusion barrier films |
US7282438B1 (en) * | 2004-06-15 | 2007-10-16 | Novellus Systems, Inc. | Low-k SiC copper diffusion barrier films |
US20060281299A1 (en) * | 2004-08-18 | 2006-12-14 | Jei-Ming Chen | Method of fabricating silicon carbide-capped copper damascene interconnect |
JP2007208069A (ja) * | 2006-02-02 | 2007-08-16 | Elpida Memory Inc | 半導体装置及びその製造方法 |
US7501355B2 (en) * | 2006-06-29 | 2009-03-10 | Applied Materials, Inc. | Decreasing the etch rate of silicon nitride by carbon addition |
US8017522B2 (en) * | 2007-01-24 | 2011-09-13 | International Business Machines Corporation | Mechanically robust metal/low-κ interconnects |
US7915166B1 (en) | 2007-02-22 | 2011-03-29 | Novellus Systems, Inc. | Diffusion barrier and etch stop films |
US8173537B1 (en) | 2007-03-29 | 2012-05-08 | Novellus Systems, Inc. | Methods for reducing UV and dielectric diffusion barrier interaction |
WO2009055450A1 (en) * | 2007-10-25 | 2009-04-30 | Applied Materials, Inc. | Adhesion improvement of dielectric barrier to copper by the addition of thin interface layer |
US8124522B1 (en) | 2008-04-11 | 2012-02-28 | Novellus Systems, Inc. | Reducing UV and dielectric diffusion barrier interaction through the modulation of optical properties |
JP5507909B2 (ja) * | 2009-07-14 | 2014-05-28 | 東京エレクトロン株式会社 | 成膜方法 |
US8247332B2 (en) | 2009-12-04 | 2012-08-21 | Novellus Systems, Inc. | Hardmask materials |
CN102299101B (zh) * | 2010-06-25 | 2014-10-01 | 中芯国际集成电路制造(上海)有限公司 | 刻蚀终止层的制作方法 |
CN102403220A (zh) * | 2010-09-17 | 2012-04-04 | 中芯国际集成电路制造(上海)有限公司 | 一种SiCN扩散阻挡层制备工艺 |
CN102903665A (zh) * | 2011-07-25 | 2013-01-30 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件的制作方法 |
CN103107158A (zh) * | 2011-11-11 | 2013-05-15 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件及其形成方法 |
US10325773B2 (en) | 2012-06-12 | 2019-06-18 | Novellus Systems, Inc. | Conformal deposition of silicon carbide films |
US9234276B2 (en) | 2013-05-31 | 2016-01-12 | Novellus Systems, Inc. | Method to obtain SiC class of films of desired composition and film properties |
US10832904B2 (en) | 2012-06-12 | 2020-11-10 | Lam Research Corporation | Remote plasma based deposition of oxygen doped silicon carbide films |
US10211310B2 (en) | 2012-06-12 | 2019-02-19 | Novellus Systems, Inc. | Remote plasma based deposition of SiOC class of films |
US9243324B2 (en) * | 2012-07-30 | 2016-01-26 | Air Products And Chemicals, Inc. | Methods of forming non-oxygen containing silicon-based films |
US9337068B2 (en) | 2012-12-18 | 2016-05-10 | Lam Research Corporation | Oxygen-containing ceramic hard masks and associated wet-cleans |
US8916469B2 (en) * | 2013-03-12 | 2014-12-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabricating copper damascene |
CN104112734B (zh) * | 2013-04-18 | 2017-02-15 | 中芯国际集成电路制造(上海)有限公司 | 双嵌套铜互连结构及其制作方法 |
US10297442B2 (en) | 2013-05-31 | 2019-05-21 | Lam Research Corporation | Remote plasma based deposition of graded or multi-layered silicon carbide film |
US9576811B2 (en) | 2015-01-12 | 2017-02-21 | Lam Research Corporation | Integrating atomic scale processes: ALD (atomic layer deposition) and ALE (atomic layer etch) |
US9806252B2 (en) | 2015-04-20 | 2017-10-31 | Lam Research Corporation | Dry plasma etch method to pattern MRAM stack |
US20160314964A1 (en) | 2015-04-21 | 2016-10-27 | Lam Research Corporation | Gap fill using carbon-based films |
US9870899B2 (en) * | 2015-04-24 | 2018-01-16 | Lam Research Corporation | Cobalt etch back |
US9972504B2 (en) | 2015-08-07 | 2018-05-15 | Lam Research Corporation | Atomic layer etching of tungsten for enhanced tungsten deposition fill |
US10727073B2 (en) | 2016-02-04 | 2020-07-28 | Lam Research Corporation | Atomic layer etching 3D structures: Si and SiGe and Ge smoothness on horizontal and vertical surfaces |
US10002787B2 (en) | 2016-11-23 | 2018-06-19 | Lam Research Corporation | Staircase encapsulation in 3D NAND fabrication |
US9837270B1 (en) | 2016-12-16 | 2017-12-05 | Lam Research Corporation | Densification of silicon carbide film using remote plasma treatment |
US10566212B2 (en) | 2016-12-19 | 2020-02-18 | Lam Research Corporation | Designer atomic layer etching |
US10559461B2 (en) | 2017-04-19 | 2020-02-11 | Lam Research Corporation | Selective deposition with atomic layer etch reset |
US10832909B2 (en) | 2017-04-24 | 2020-11-10 | Lam Research Corporation | Atomic layer etch, reactive precursors and energetic sources for patterning applications |
US10585060B2 (en) * | 2017-09-29 | 2020-03-10 | International Business Machines Corporation | On-chip biosensors with nanometer scale glass-like carbon electrodes and improved adhesive coupling |
US10354883B2 (en) * | 2017-10-03 | 2019-07-16 | Mattson Technology, Inc. | Surface treatment of silicon or silicon germanium surfaces using organic radicals |
EP3776636A4 (en) | 2018-03-30 | 2021-12-22 | Lam Research Corporation | ATOMIC LAYER ENGRAVING AND SMOOTHING OF REFRACTORY METALS AND OTHER HIGH SURFACE BOND ENERGY MATERIALS |
DE102018110240A1 (de) * | 2018-04-27 | 2019-10-31 | Infineon Technologies Ag | Halbleitervorrichtung und Herstellung |
US11039540B2 (en) * | 2019-01-01 | 2021-06-15 | Catlam, Llc | Multi-layer circuit board with traces thicker than a circuit board layer |
JP7311628B2 (ja) * | 2019-04-30 | 2023-07-19 | マトソン テクノロジー インコーポレイテッド | メチル化処理を使用した選択的な堆積 |
Family Cites Families (94)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1147014A (en) * | 1967-01-27 | 1969-04-02 | Westinghouse Electric Corp | Improvements in diffusion masking |
US4262631A (en) * | 1979-10-01 | 1981-04-21 | Kubacki Ronald M | Thin film deposition apparatus using an RF glow discharge |
JPS5821324A (ja) * | 1981-07-30 | 1983-02-08 | Agency Of Ind Science & Technol | 水素添加した半導体薄膜成長用金属表面基板の前処理方法 |
JPH07111957B2 (ja) * | 1984-03-28 | 1995-11-29 | 圭弘 浜川 | 半導体の製法 |
US4795947A (en) * | 1984-11-16 | 1989-01-03 | Deutsche Thomson-Brandt Gmbh | Device for eliminating the interline flicker |
US5000113A (en) * | 1986-12-19 | 1991-03-19 | Applied Materials, Inc. | Thermal CVD/PECVD reactor and use for thermal chemical vapor deposition of silicon dioxide and in-situ multi-step planarized process |
US4895734A (en) * | 1987-03-31 | 1990-01-23 | Hitachi Chemical Company, Ltd. | Process for forming insulating film used in thin film electroluminescent device |
US5121706A (en) * | 1987-10-16 | 1992-06-16 | The Curators Of The University Of Missouri | Apparatus for applying a composite insulative coating to a substrate |
US4994410A (en) * | 1988-04-04 | 1991-02-19 | Motorola, Inc. | Method for device metallization by forming a contact plug and interconnect using a silicide/nitride process |
US4894352A (en) * | 1988-10-26 | 1990-01-16 | Texas Instruments Inc. | Deposition of silicon-containing films using organosilicon compounds and nitrogen trifluoride |
US5003178A (en) * | 1988-11-14 | 1991-03-26 | Electron Vision Corporation | Large-area uniform electron source |
US5011706A (en) * | 1989-04-12 | 1991-04-30 | Dow Corning Corporation | Method of forming coatings containing amorphous silicon carbide |
JPH03105974A (ja) * | 1989-09-19 | 1991-05-02 | Kobe Steel Ltd | 多結晶ダイヤ薄膜合成によるシヨツトキー・ダイオードの製作法 |
EP0449117A3 (en) * | 1990-03-23 | 1992-05-06 | Matsushita Electric Industrial Co., Ltd. | Organic polymer and preparation and use thereof |
FR2666324B1 (fr) * | 1990-09-03 | 1993-04-09 | Saint Gobain Vitrage Int | Couches minces de nitrure de silicium a proprietes ameliorees. |
US5273609A (en) * | 1990-09-12 | 1993-12-28 | Texas Instruments Incorporated | Method and apparatus for time-division plasma chopping in a multi-channel plasma processing equipment |
US5324360A (en) * | 1991-05-21 | 1994-06-28 | Canon Kabushiki Kaisha | Method for producing non-monocrystalline semiconductor device and apparatus therefor |
US5472829A (en) * | 1991-12-30 | 1995-12-05 | Sony Corporation | Method of forming a resist pattern by using an anti-reflective layer |
US5472827A (en) * | 1991-12-30 | 1995-12-05 | Sony Corporation | Method of forming a resist pattern using an anti-reflective layer |
EP0603391B1 (en) * | 1992-05-15 | 1997-07-23 | Shin-Etsu Quartz Products Co., Ltd. | Vertical heat treatment apparatus and heat insulating material |
US5298597A (en) * | 1992-09-18 | 1994-03-29 | Industrial Technology Research Institute | Aqueous preparation of polyamide with catalyst mixture |
US5409543A (en) * | 1992-12-22 | 1995-04-25 | Sandia Corporation | Dry soldering with hot filament produced atomic hydrogen |
US5433786A (en) * | 1993-08-27 | 1995-07-18 | The Dow Chemical Company | Apparatus for plasma enhanced chemical vapor deposition comprising shower head electrode with magnet disposed therein |
JPH07245332A (ja) * | 1994-03-04 | 1995-09-19 | Hitachi Ltd | 半導体製造装置および半導体装置の製造方法ならびに半導体装置 |
US5447887A (en) * | 1994-04-01 | 1995-09-05 | Motorola, Inc. | Method for capping copper in semiconductor devices |
US5665640A (en) * | 1994-06-03 | 1997-09-09 | Sony Corporation | Method for producing titanium-containing thin films by low temperature plasma-enhanced chemical vapor deposition using a rotating susceptor reactor |
JP3326974B2 (ja) * | 1994-07-28 | 2002-09-24 | ソニー株式会社 | 多層配線の形成方法および半導体装置の製造方法 |
US5736002A (en) * | 1994-08-22 | 1998-04-07 | Sharp Microelectronics Technology, Inc. | Methods and equipment for anisotropic, patterned conversion of copper into selectively removable compounds and for removal of same |
DE69531980T2 (de) * | 1994-08-23 | 2004-07-29 | At & T Corp. | Metallisierung von keramischen Materialien durch Auftrag einer haftenden reduzierbaren Schicht |
US5607773A (en) * | 1994-12-20 | 1997-03-04 | Texas Instruments Incorporated | Method of forming a multilevel dielectric |
JPH08186085A (ja) * | 1994-12-28 | 1996-07-16 | Nec Corp | 半導体装置の製造方法 |
US5710067A (en) * | 1995-06-07 | 1998-01-20 | Advanced Micro Devices, Inc. | Silicon oxime film |
US5599736A (en) * | 1995-06-28 | 1997-02-04 | Vanguard International Semiconductor Corporation | Fabrication method for polysilicon contact plugs |
US5638251A (en) * | 1995-10-03 | 1997-06-10 | Advanced Refractory Technologies, Inc. | Capacitive thin films using diamond-like nanocomposite materials |
US6013574A (en) * | 1996-01-30 | 2000-01-11 | Advanced Micro Devices, Inc. | Method of forming low resistance contact structures in vias arranged between two levels of interconnect lines |
US5741626A (en) * | 1996-04-15 | 1998-04-21 | Motorola, Inc. | Method for forming a dielectric tantalum nitride layer as an anti-reflective coating (ARC) |
US5869396A (en) * | 1996-07-15 | 1999-02-09 | Chartered Semiconductor Manufacturing Ltd. | Method for forming a polycide gate electrode |
DE19637334A1 (de) * | 1996-09-13 | 1998-03-19 | Bayer Ag | Stabilisierte blockierte Isocyanate |
US5730792A (en) * | 1996-10-04 | 1998-03-24 | Dow Corning Corporation | Opaque ceramic coatings |
US5711987A (en) * | 1996-10-04 | 1998-01-27 | Dow Corning Corporation | Electronic coatings |
US5855681A (en) * | 1996-11-18 | 1999-01-05 | Applied Materials, Inc. | Ultra high throughput wafer vacuum processing system |
JP4142753B2 (ja) * | 1996-12-26 | 2008-09-03 | 株式会社東芝 | スパッタターゲット、スパッタ装置、半導体装置およびその製造方法 |
US6080526A (en) * | 1997-03-24 | 2000-06-27 | Alliedsignal Inc. | Integration of low-k polymers into interlevel dielectrics using controlled electron-beam radiation |
US5893752A (en) * | 1997-12-22 | 1999-04-13 | Motorola, Inc. | Process for forming a semiconductor device |
KR19990030660A (ko) * | 1997-10-02 | 1999-05-06 | 윤종용 | 전자빔을 이용한 반도체장치의 층간 절연막 형성방법 |
US6071813A (en) * | 1997-10-20 | 2000-06-06 | Advanced Micro Devices, Inc. | Method and system for electrical coupling to copper interconnects |
US6051321A (en) * | 1997-10-24 | 2000-04-18 | Quester Technology, Inc. | Low dielectric constant materials and method |
US6555476B1 (en) * | 1997-12-23 | 2003-04-29 | Texas Instruments Incorporated | Silicon carbide as a stop layer in chemical mechanical polishing for isolation dielectric |
US6383955B1 (en) * | 1998-02-05 | 2002-05-07 | Asm Japan K.K. | Silicone polymer insulation film on semiconductor substrate and method for forming the film |
TW437017B (en) * | 1998-02-05 | 2001-05-28 | Asm Japan Kk | Silicone polymer insulation film on semiconductor substrate and method for formation thereof |
US6287990B1 (en) * | 1998-02-11 | 2001-09-11 | Applied Materials, Inc. | CVD plasma assisted low dielectric constant films |
US6303523B2 (en) * | 1998-02-11 | 2001-10-16 | Applied Materials, Inc. | Plasma processes for depositing low dielectric constant films |
US6340435B1 (en) * | 1998-02-11 | 2002-01-22 | Applied Materials, Inc. | Integrated low K dielectrics and etch stops |
US6660656B2 (en) * | 1998-02-11 | 2003-12-09 | Applied Materials Inc. | Plasma processes for depositing low dielectric constant films |
US6054379A (en) * | 1998-02-11 | 2000-04-25 | Applied Materials, Inc. | Method of depositing a low k dielectric with organo silane |
JP3305251B2 (ja) * | 1998-02-26 | 2002-07-22 | 松下電器産業株式会社 | 配線構造体の形成方法 |
US6174810B1 (en) * | 1998-04-06 | 2001-01-16 | Motorola, Inc. | Copper interconnect structure and method of formation |
US6068884A (en) * | 1998-04-28 | 2000-05-30 | Silcon Valley Group Thermal Systems, Llc | Method of making low κ dielectric inorganic/organic hybrid films |
US6060132A (en) * | 1998-06-15 | 2000-05-09 | Siemens Aktiengesellschaft | High density plasma CVD process for making dielectric anti-reflective coatings |
US6492266B1 (en) * | 1998-07-09 | 2002-12-10 | Advanced Micro Devices, Inc. | Method of forming reliable capped copper interconnects |
US6172421B1 (en) * | 1998-08-11 | 2001-01-09 | Advanced Micro Devices, Inc. | Semiconductor device having an intermetallic layer on metal interconnects |
US6071809A (en) * | 1998-09-25 | 2000-06-06 | Rockwell Semiconductor Systems, Inc. | Methods for forming high-performing dual-damascene interconnect structures |
US6169039B1 (en) * | 1998-11-06 | 2001-01-02 | Advanced Micro Devices, Inc. | Electron bean curing of low-k dielectrics in integrated circuits |
US6355571B1 (en) * | 1998-11-17 | 2002-03-12 | Applied Materials, Inc. | Method and apparatus for reducing copper oxidation and contamination in a semiconductor device |
JP2002533502A (ja) * | 1998-12-22 | 2002-10-08 | フイルメニツヒ ソシエテ アノニム | 吸着性を有する多孔質ポリメチルシルセスキオキサン |
US6251775B1 (en) * | 1999-04-23 | 2001-06-26 | International Business Machines Corporation | Self-aligned copper silicide formation for improved adhesion/electromigration |
JP3353743B2 (ja) * | 1999-05-18 | 2002-12-03 | 日本電気株式会社 | 半導体装置とその製造方法 |
US6221441B1 (en) * | 1999-05-26 | 2001-04-24 | Ppg Industries Ohio, Inc. | Multi-stage processes for coating substrates with liquid basecoat and powder topcoat |
US6204201B1 (en) * | 1999-06-11 | 2001-03-20 | Electron Vision Corporation | Method of processing films prior to chemical vapor deposition using electron beam processing |
SG125881A1 (en) * | 1999-12-03 | 2006-10-30 | Lytle Steven Alan | Define via in dual damascene process |
US6224441B1 (en) * | 2000-01-10 | 2001-05-01 | Vladimir Michael Kabakov | Propulsion system and method |
US6582777B1 (en) * | 2000-02-17 | 2003-06-24 | Applied Materials Inc. | Electron beam modification of CVD deposited low dielectric constant materials |
US6410462B1 (en) * | 2000-05-12 | 2002-06-25 | Sharp Laboratories Of America, Inc. | Method of making low-K carbon doped silicon oxide |
WO2002001627A1 (fr) * | 2000-06-26 | 2002-01-03 | Hitachi, Ltd. | Dispositif a semi-conducteur et procede de fabrication associe |
US6794311B2 (en) * | 2000-07-14 | 2004-09-21 | Applied Materials Inc. | Method and apparatus for treating low k dielectric layers to reduce diffusion |
US6573196B1 (en) * | 2000-08-12 | 2003-06-03 | Applied Materials Inc. | Method of depositing organosilicate layers |
US6365527B1 (en) * | 2000-10-06 | 2002-04-02 | United Microelectronics Corp. | Method for depositing silicon carbide in semiconductor devices |
US6340628B1 (en) * | 2000-12-12 | 2002-01-22 | Novellus Systems, Inc. | Method to deposit SiOCH films with dielectric constant below 3.0 |
US6537733B2 (en) * | 2001-02-23 | 2003-03-25 | Applied Materials, Inc. | Method of depositing low dielectric constant silicon carbide layers |
US6432822B1 (en) * | 2001-05-02 | 2002-08-13 | Advanced Micro Devices, Inc. | Method of improving electromigration resistance of capped Cu |
US6532150B2 (en) * | 2001-05-31 | 2003-03-11 | American Megatrends, Inc. | Disk drive carrier apparatus and associated method |
US6486082B1 (en) * | 2001-06-18 | 2002-11-26 | Applied Materials, Inc. | CVD plasma assisted lower dielectric constant sicoh film |
US6879046B2 (en) * | 2001-06-28 | 2005-04-12 | Agere Systems Inc. | Split barrier layer including nitrogen-containing portion and oxygen-containing portion |
US6541842B2 (en) * | 2001-07-02 | 2003-04-01 | Dow Corning Corporation | Metal barrier behavior by SiC:H deposition on porous materials |
US20030064154A1 (en) * | 2001-08-06 | 2003-04-03 | Laxman Ravi K. | Low-K dielectric thin films and chemical vapor deposition method of making same |
US6573193B2 (en) * | 2001-08-13 | 2003-06-03 | Taiwan Semiconductor Manufacturing Co., Ltd | Ozone-enhanced oxidation for high-k dielectric semiconductor devices |
US20030040195A1 (en) * | 2001-08-27 | 2003-02-27 | Ting-Chang Chang | Method for fabricating low dielectric constant material film |
US6887780B2 (en) * | 2001-08-31 | 2005-05-03 | Intel Corporation | Concentration graded carbon doped oxide |
US6759327B2 (en) * | 2001-10-09 | 2004-07-06 | Applied Materials Inc. | Method of depositing low k barrier layers |
JP4152619B2 (ja) * | 2001-11-14 | 2008-09-17 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法 |
US6764952B1 (en) * | 2002-03-13 | 2004-07-20 | Novellus Systems, Inc. | Systems and methods to retard copper diffusion and improve film adhesion for a dielectric barrier on copper |
TWI278963B (en) * | 2002-04-26 | 2007-04-11 | Agere Systems Inc | Copper silicide passivation for improved reliability |
US7749563B2 (en) * | 2002-10-07 | 2010-07-06 | Applied Materials, Inc. | Two-layer film for next generation damascene barrier application with good oxidation resistance |
US7229911B2 (en) * | 2004-04-19 | 2007-06-12 | Applied Materials, Inc. | Adhesion improvement for low k dielectrics to conductive materials |
-
2004
- 2004-04-19 US US10/828,023 patent/US20050233555A1/en not_active Abandoned
-
2005
- 2005-04-19 CN CN2008102118248A patent/CN101388359B/zh not_active Expired - Fee Related
- 2005-04-19 CN CNB2005800178624A patent/CN100481379C/zh not_active Expired - Fee Related
-
2013
- 2013-02-15 US US13/768,688 patent/US20130230986A1/en not_active Abandoned
Also Published As
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US20130230986A1 (en) | 2013-09-05 |
US20050233555A1 (en) | 2005-10-20 |
CN101388359B (zh) | 2011-07-06 |
CN101388359A (zh) | 2009-03-18 |
CN1961418A (zh) | 2007-05-09 |
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