CN100472761C - 缓变半导体层 - Google Patents

缓变半导体层 Download PDF

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Publication number
CN100472761C
CN100472761C CNB2005800279288A CN200580027928A CN100472761C CN 100472761 C CN100472761 C CN 100472761C CN B2005800279288 A CNB2005800279288 A CN B2005800279288A CN 200580027928 A CN200580027928 A CN 200580027928A CN 100472761 C CN100472761 C CN 100472761C
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CN
China
Prior art keywords
semiconductor layer
concentration
germanium
layer
silicon
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB2005800279288A
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English (en)
Chinese (zh)
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CN101006580A (zh
Inventor
马里亚姆·G·萨达卡
肖恩·G·托马斯
泰德·R·怀特
刘春利
亚历山大·L·巴尔
比希-安·阮
翁-耶·希恩
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NXP USA Inc
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Freescale Semiconductor Inc
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Publication of CN101006580A publication Critical patent/CN101006580A/zh
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Publication of CN100472761C publication Critical patent/CN100472761C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
    • H10D30/6748—Group IV materials, e.g. germanium or silicon carbide having a multilayer structure or superlattice structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/751—Insulated-gate field-effect transistors [IGFET] having composition variations in the channel regions

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)
CNB2005800279288A 2004-08-17 2005-08-08 缓变半导体层 Expired - Fee Related CN100472761C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/919,952 2004-08-17
US10/919,952 US7241647B2 (en) 2004-08-17 2004-08-17 Graded semiconductor layer

Publications (2)

Publication Number Publication Date
CN101006580A CN101006580A (zh) 2007-07-25
CN100472761C true CN100472761C (zh) 2009-03-25

Family

ID=35910124

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2005800279288A Expired - Fee Related CN100472761C (zh) 2004-08-17 2005-08-08 缓变半导体层

Country Status (6)

Country Link
US (1) US7241647B2 (enExample)
JP (1) JP2008510320A (enExample)
KR (1) KR20070047307A (enExample)
CN (1) CN100472761C (enExample)
TW (1) TWI371087B (enExample)
WO (1) WO2006023492A1 (enExample)

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DE102009010883B4 (de) * 2009-02-27 2011-05-26 Amd Fab 36 Limited Liability Company & Co. Kg Einstellen eines nicht-Siliziumanteils in einer Halbleiterlegierung während der FET-Transistorherstellung mittels eines Zwischenoxidationsprozesses
US8623728B2 (en) 2009-07-28 2014-01-07 Taiwan Semiconductor Manufacturing Company, Ltd. Method for forming high germanium concentration SiGe stressor
CN102903635B (zh) * 2011-07-25 2015-05-06 中芯国际集成电路制造(上海)有限公司 Mos晶体管的制造方法
CN102903636B (zh) * 2011-07-25 2015-05-06 中芯国际集成电路制造(上海)有限公司 Mos晶体管的制造方法
US20140057399A1 (en) * 2012-08-24 2014-02-27 International Business Machines Corporation Using Fast Anneal to Form Uniform Ni(Pt)Si(Ge) Contacts on SiGe Layer
CN105679645A (zh) * 2014-11-17 2016-06-15 上海华力微电子有限公司 嵌入式锗硅外延位错缺陷的改善方法

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CN1220489A (zh) * 1997-10-16 1999-06-23 国际商业机器公司 使用局部选择氧化在绝缘体上形成的体硅和应变硅
US6369438B1 (en) * 1998-12-24 2002-04-09 Kabushiki Kaisha Toshiba Semiconductor device and method for manufacturing the same
US20030013305A1 (en) * 2001-07-12 2003-01-16 Hitachi, Ltd. Method of producing semiconductor device and semiconductor substrate
US6562703B1 (en) * 2002-03-13 2003-05-13 Sharp Laboratories Of America, Inc. Molecular hydrogen implantation method for forming a relaxed silicon germanium layer with high germanium content
US6583437B2 (en) * 2000-03-17 2003-06-24 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
US6743651B2 (en) * 2002-04-23 2004-06-01 International Business Machines Corporation Method of forming a SiGe-on-insulator substrate using separation by implantation of oxygen
US6833332B2 (en) * 2002-01-04 2004-12-21 International Business Machines Corporation Method for fabrication of relaxed SiGe buffer layers on silicon-on-insulators and structures containing the same

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US5534713A (en) * 1994-05-20 1996-07-09 International Business Machines Corporation Complementary metal-oxide semiconductor transistor logic using strained SI/SIGE heterostructure layers
US5756898A (en) * 1994-06-27 1998-05-26 Texaco Inc. Passive acoustic method of measuring the effective internal diameter of a pipe containing flowing fluids
DE59707274D1 (de) * 1996-09-27 2002-06-20 Infineon Technologies Ag Integrierte CMOS-Schaltungsanordnung und Verfahren zu deren Herstellung
US5906951A (en) * 1997-04-30 1999-05-25 International Business Machines Corporation Strained Si/SiGe layers on insulator
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US6259138B1 (en) * 1998-12-18 2001-07-10 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having multilayered gate electrode and impurity regions overlapping therewith
JP3884203B2 (ja) 1998-12-24 2007-02-21 株式会社東芝 半導体装置の製造方法
JP2001036054A (ja) * 1999-07-19 2001-02-09 Mitsubishi Electric Corp Ｓｏｉ基板の製造方法
US6339232B1 (en) * 1999-09-20 2002-01-15 Kabushika Kaisha Toshiba Semiconductor device
US6524935B1 (en) * 2000-09-29 2003-02-25 International Business Machines Corporation Preparation of strained Si/SiGe on insulator by hydrogen induced layer transfer technique
US6890835B1 (en) 2000-10-19 2005-05-10 International Business Machines Corporation Layer transfer of low defect SiGe using an etch-back process
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US20020168802A1 (en) * 2001-05-14 2002-11-14 Hsu Sheng Teng SiGe/SOI CMOS and method of making the same
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US6475870B1 (en) * 2001-07-23 2002-11-05 Taiwan Semiconductor Manufacturing Company P-type LDMOS device with buried layer to solve punch-through problems and process for its manufacture
JP3985519B2 (ja) * 2001-12-27 2007-10-03 株式会社Ｓｕｍｃｏ 半導体基板及び電界効果型トランジスタ並びにこれらの製造方法
EP1428262A2 (en) * 2001-09-21 2004-06-16 Amberwave Systems Corporation Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same
US6621131B2 (en) * 2001-11-01 2003-09-16 Intel Corporation Semiconductor transistor having a stressed channel
US6638802B1 (en) * 2002-06-20 2003-10-28 Intel Corporation Forming strained source drain junction field effect transistors
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Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1220489A (zh) * 1997-10-16 1999-06-23 国际商业机器公司 使用局部选择氧化在绝缘体上形成的体硅和应变硅
US6369438B1 (en) * 1998-12-24 2002-04-09 Kabushiki Kaisha Toshiba Semiconductor device and method for manufacturing the same
US6583437B2 (en) * 2000-03-17 2003-06-24 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
US6709909B2 (en) * 2000-03-17 2004-03-23 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
US20030013305A1 (en) * 2001-07-12 2003-01-16 Hitachi, Ltd. Method of producing semiconductor device and semiconductor substrate
US6723541B2 (en) * 2001-07-12 2004-04-20 Hitachi, Ltd. Method of producing semiconductor device and semiconductor substrate
US6833332B2 (en) * 2002-01-04 2004-12-21 International Business Machines Corporation Method for fabrication of relaxed SiGe buffer layers on silicon-on-insulators and structures containing the same
US6562703B1 (en) * 2002-03-13 2003-05-13 Sharp Laboratories Of America, Inc. Molecular hydrogen implantation method for forming a relaxed silicon germanium layer with high germanium content
US6743651B2 (en) * 2002-04-23 2004-06-01 International Business Machines Corporation Method of forming a SiGe-on-insulator substrate using separation by implantation of oxygen

Also Published As

Publication number Publication date
WO2006023492A1 (en) 2006-03-02
CN101006580A (zh) 2007-07-25
JP2008510320A (ja) 2008-04-03
TWI371087B (en) 2012-08-21
US20060040433A1 (en) 2006-02-23
TW200620572A (en) 2006-06-16
KR20070047307A (ko) 2007-05-04
US7241647B2 (en) 2007-07-10

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