TWI371087B - Graded semiconductor layer - Google Patents

Graded semiconductor layer

Info

Publication number
TWI371087B
TWI371087B TW094127426A TW94127426A TWI371087B TW I371087 B TWI371087 B TW I371087B TW 094127426 A TW094127426 A TW 094127426A TW 94127426 A TW94127426 A TW 94127426A TW I371087 B TWI371087 B TW I371087B
Authority
TW
Taiwan
Prior art keywords
semiconductor layer
graded semiconductor
graded
layer
semiconductor
Prior art date
Application number
TW094127426A
Other languages
English (en)
Chinese (zh)
Other versions
TW200620572A (en
Inventor
Mariam G Sadaka
Shawn G Thomas
Ted R White
Chun-Li Liu
Alexander L Barr
Bich-Yen Nguyen
Voon-Yew Thean
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of TW200620572A publication Critical patent/TW200620572A/zh
Application granted granted Critical
Publication of TWI371087B publication Critical patent/TWI371087B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741Group IV materials, e.g. germanium or silicon carbide
    • H10D30/6748Group IV materials, e.g. germanium or silicon carbide having a multilayer structure or superlattice structure
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/751Insulated-gate field-effect transistors [IGFET] having composition variations in the channel regions

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)
TW094127426A 2004-08-17 2005-08-12 Graded semiconductor layer TWI371087B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/919,952 US7241647B2 (en) 2004-08-17 2004-08-17 Graded semiconductor layer

Publications (2)

Publication Number Publication Date
TW200620572A TW200620572A (en) 2006-06-16
TWI371087B true TWI371087B (en) 2012-08-21

Family

ID=35910124

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094127426A TWI371087B (en) 2004-08-17 2005-08-12 Graded semiconductor layer

Country Status (6)

Country Link
US (1) US7241647B2 (enExample)
JP (1) JP2008510320A (enExample)
KR (1) KR20070047307A (enExample)
CN (1) CN100472761C (enExample)
TW (1) TWI371087B (enExample)
WO (1) WO2006023492A1 (enExample)

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DE102009010883B4 (de) * 2009-02-27 2011-05-26 Amd Fab 36 Limited Liability Company & Co. Kg Einstellen eines nicht-Siliziumanteils in einer Halbleiterlegierung während der FET-Transistorherstellung mittels eines Zwischenoxidationsprozesses
US8623728B2 (en) 2009-07-28 2014-01-07 Taiwan Semiconductor Manufacturing Company, Ltd. Method for forming high germanium concentration SiGe stressor
CN102903635B (zh) * 2011-07-25 2015-05-06 中芯国际集成电路制造(上海)有限公司 Mos晶体管的制造方法
CN102903636B (zh) * 2011-07-25 2015-05-06 中芯国际集成电路制造(上海)有限公司 Mos晶体管的制造方法
US20140057399A1 (en) * 2012-08-24 2014-02-27 International Business Machines Corporation Using Fast Anneal to Form Uniform Ni(Pt)Si(Ge) Contacts on SiGe Layer
CN105679645A (zh) * 2014-11-17 2016-06-15 上海华力微电子有限公司 嵌入式锗硅外延位错缺陷的改善方法

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US6124627A (en) * 1998-12-03 2000-09-26 Texas Instruments Incorporated Lateral MOSFET having a barrier between the source/drain region and the channel region using a heterostructure raised source/drain region
US6259138B1 (en) * 1998-12-18 2001-07-10 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having multilayered gate electrode and impurity regions overlapping therewith
JP3884203B2 (ja) 1998-12-24 2007-02-21 株式会社東芝 半導体装置の製造方法
US6369438B1 (en) * 1998-12-24 2002-04-09 Kabushiki Kaisha Toshiba Semiconductor device and method for manufacturing the same
JP2001036054A (ja) * 1999-07-19 2001-02-09 Mitsubishi Electric Corp Soi基板の製造方法
US6339232B1 (en) * 1999-09-20 2002-01-15 Kabushika Kaisha Toshiba Semiconductor device
KR100392166B1 (ko) * 2000-03-17 2003-07-22 가부시끼가이샤 도시바 반도체 장치의 제조 방법 및 반도체 장치
US6524935B1 (en) * 2000-09-29 2003-02-25 International Business Machines Corporation Preparation of strained Si/SiGe on insulator by hydrogen induced layer transfer technique
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US6649480B2 (en) * 2000-12-04 2003-11-18 Amberwave Systems Corporation Method of fabricating CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs
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Also Published As

Publication number Publication date
WO2006023492A1 (en) 2006-03-02
CN101006580A (zh) 2007-07-25
JP2008510320A (ja) 2008-04-03
CN100472761C (zh) 2009-03-25
US20060040433A1 (en) 2006-02-23
TW200620572A (en) 2006-06-16
KR20070047307A (ko) 2007-05-04
US7241647B2 (en) 2007-07-10

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees