CN100339980C - 具有表面金属敷层的半导体器件 - Google Patents

具有表面金属敷层的半导体器件 Download PDF

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CN100339980C
CN100339980C CNB018102085A CN01810208A CN100339980C CN 100339980 C CN100339980 C CN 100339980C CN B018102085 A CNB018102085 A CN B018102085A CN 01810208 A CN01810208 A CN 01810208A CN 100339980 C CN100339980 C CN 100339980C
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plumb joint
semiconductor device
housing base
plumb
interval
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CN1432195A (zh
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H·布伦纳
T·赫菲
H·耶格尔
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Ams Osram International GmbH
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Osram Opto Semiconductors GmbH
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Abstract

本发明讲述了一种具有表面金属敷层的半导体器件，具有至少一个半导体本体(3)和一个外壳基体(2)，在所述的外壳基体(2)的表面上借助表面金属敷层来构造印刷线路结构(7)。所述印刷线路结构(7)的一个子区域构成了所述半导体器件的焊接头(1)。所述的焊接头(1)被组合成焊接头列，其中各个焊接头列以微小的预定间隔相互排列。

Description

具有表面金属敷层的半导体器件
技术领域
本发明涉及半导体器件，其具有至少一个半导体本体和一个外壳基体，所述的外壳基体为了安装所述的半导体器件而具有一个支承面，在该支承面上通过表面金属敷层构成多个焊接头，其中所述的焊接头被组合成多个焊接头列。
背景技术
具有表面金属敷层的半导体器件譬如在US 5,081,520中公开过。其中展示了一种具有半导体本体和基片的半导体器件，在其主面具有一种印刷线路结构形式的表面金属敷层。所述的半导体本体经过所述印刷线路结构的一个子区域进行接触。所述印刷线路结构的另一子区域被用作所述器件的接线区。
这种被实施为表面金属敷层的接线面也在所谓的MID技术(模制互接器件)或CIMID技术(芯片集成的模制互接器件)中应用，这譬如在US 5,929,516中曾公开过。
从US 5,081,520也可以得知，所述的接线面通常被构造在外壳或基片外边的附近。已知的接线方案譬如在于，把所述的接线面布置成平行的两列，这些列沿着外壳的两个相对的外边延伸。
其缺点在于，在上述类型的器件中，当所述的器件遭受温度变化负荷时处于焊接状态的焊接头容易断裂。这种温度变化负荷可能在正常的工作状态下出现，譬如由于季节性的外部温度变化，或在采取温度变换试验和温度冲击等质量控制措施时，或者在焊接过程自身之中。
发明内容
本发明的任务在于创造一种具有表面金属敷层的半导体器件，其诸如温度稳定性和热承受能力等热性能将得到改善。另外，该器件可以成本合适地进行制造。
根据本发明的半导体器件，其具有至少一个半导体本体和一个外壳基体，所述的外壳基体为了安装所述的半导体器件而具有一个支承面，在该支承面上通过表面金属敷层构成多个焊接头，其中所述的焊接头被组合成多个焊接头列，而且，所述的焊接头列以一个间隔相对排列，该间隔合适地大，以便防止所述焊接头之间的短路，而且该间隔足够地小，以便防止所述表面金属敷层或焊接头处的、基于所述外壳基体热膨胀的损坏，其中所述的焊接头被布置在所述外壳基体的凹口内。
按照本发明规定而构成一个半导体器件，具有至少一个半导体本体和一个外壳基体，所述的外壳基体为了安装所述的半导体器件而具有一个支承面，在该支承面上通过表面金属敷层构成多个焊接头，其中所述的焊接头被组合成多个焊接头列。所述焊接头列的间隔被保持得尽可能地小。
尽可能小的间隔被理解成如下范围的间隔，其下限取决于所需的位于各个接头之间的绝缘和所述器件的、特别是在焊接工艺中的可操作性。尤其是，把所述的间隔选择得如此之大，使得在为所述器件所设定的规范之内不会在接头之间产生短路。
对于位于焊接头列之间的尽可能小的间隔，其另一标准表现为通常在半导体工业内所采用的接头网格尺寸。优选地，位于接头列之间的间隔大约相当于沿着焊接头列而位于两个相邻的焊接头之间的间隔。
所述间隔范围的上限一方面取决于外壳材料和印刷电路板材料之间的热膨胀系数差，另一方面还取决于为所述器件所设定的温度范围。该上限可以针对分别采用的材料通过简单的温度变化试验求出。因此得出把焊接头列之间的间隔选择得如何之小，以便在为器件所规定的温度范围内，不会在表面金属敷层或焊接头处出现基于热膨胀的损坏。尤其在器件经焊接头被固定在印刷电路板上的情况下，因为外壳基体和印刷电路板之间的机械应力而会出现这种损坏，其中所述的应力又是基于印刷电路板和外壳基体的不同热膨胀而产生的。
因此本发明有利地减少了在表面金属敷层、焊接头处产生损坏的危险性，或者在焊接状态下减少了焊接处被损坏的危险性，譬如表面金属敷层的裂缝或焊接的断裂。另外，利用本发明还可以扩大为器件所设定的温度范围。
本发明的另一优点在于，通过紧密地布置焊接头，接头的网格是与外壳尺寸无关的。
本发明的一种尤其有利的实施方案在于，所述的焊接头列是并行布置的，因为这样可以紧密地布置各个焊接头。在使用自动装配设备时这种布置也是有利的。
另外，所述的两个印刷线路相对于所述外壳的对称轴对称地布置，这对所焊接的器件的机械稳定性是有利的。
根据本发明的一种优选改进方案，所述的焊接头被布置在所述外壳基体的凹口内。如此形成的位于焊接头之间的桥接片有利地精确确定了焊接头和印刷电路板表面之间的间隔。
另外，这样还提高了各个焊接头之间的绝缘，并阻止形成不利的焊桥。
在一种尤其优选的实施方案中，采用PPA(Polyphthalamid，聚邻苯二酰胺)作为外壳模塑物质。因此可以非常便宜地制造所述的器件。另外，PPA可以有利地用自动制造机器模塑和处理。本发明允许采用PPA，因为由于PPA器件外壳或印刷电路板的不同热膨胀系数而引起的不利影响已被大大地降低了。相反，在现有技术的器件中，必须采用特殊的外壳材料，其热膨胀系数与印刷电路板进行匹配。这种材料譬如是LCP(液晶聚合体)，它比PPA贵得多且难以处理。
本发明的一种优选改进方案在于，利用两个以微小间隔相互排列的、具有相同数量焊接头的焊接头列来进行外壳模塑。这种布置尤其简化了为将所述焊接头与半导体本体进行电连接而需要的印刷线路结构。
在此，在相对于热变化负荷的稳定性方面，本发明能允许比现有技术的器件多得多的触点数量。
附图说明
本发明的其它特征、优点和有益性可以从下面结合附图1-3对实施例的说明中得出。其中：
图1简要地示出了本发明器件的第一实施例，
图2简要地示出了本发明器件的第二实施例，以及
图3简要地示出了现有技术的器件。
具体实施方式
图1b示出了以MID技术制造的半导体器件的剖面图。在MID技术或CIMID技术中，使用一个具有凹口的基体2作为外壳，在所述的凹口内布置有半导体本体3。在外壳基体2上借助表面金属敷层来形成印刷线路结构7，这些印刷线路结构在所述凹口内形成了芯片接线区4和用于接触半导体本体3的金属丝接线区5。所述位于半导体本体3和印刷线路结构7之间的电连接譬如可以通过金属丝连接6来制造。
在所述外壳的外侧，通过印刷线路结构7来构成焊接头1。位于芯片接线区4或金属丝接线区5和所述焊接头1之间的电连接同样也通过在外壳基体2的表面上延伸的印刷线路7来实现。
在图1a中示出了所述外壳的构造有焊接头1的那一侧的俯视图。总共6个焊接头被排成两列，每列为三个焊接头(该数量显然不会对本发明构成限制)，其中所述的列相互平行且紧靠地排列。通过这种紧密的排列，避免了外壳基体2的热膨胀导致焊接头1发生强烈的错位。在此，把所述焊接头1在升温或降温时在所考察的温度间隔内因所述外壳基体2的膨胀而相对于印刷电路板所偏移的那一段称为所述的错位。因本发明而得到的、所述器件的有利的热特性是基于：所述错位的大小近似线性地与焊接头的间隔成比例，因此，相互间隔较小的焊接头1的紧密布置也只能导致所述焊接头1发生微小的错位。在器件的焊接状态下，微小的错位只会在焊点内产生微小的应力，从而避免了焊点断裂的危险性。
为了进行比较，在图3中示出了现有技术的焊点布置。在此情况下，焊接头1a，1b沿着两列并布置在外壳边的附近。因此相对的焊接头1a，1b相隔较远。在热膨胀的情况下这会导致上述较大的错位，并且相对于温度变化负荷会产生不稳定的焊点。
在图2中示出了另一实施例的透视图。此处是把印刷线路7和焊接头1布置在外壳表面上的凹口内。在所述器件的装入状态下，如此形成的位于印刷线路之间的桥接片8将直接位于所述的印刷电路板上，并准确而又可再现地确定了位于焊接头1和印刷电路板之间的间隔。通过这种确定，可以提高位于印刷电路板和器件之间的焊接的质量。
此外，通过所述的桥接片8还有效地相互隔离了各个焊接头1。这阻止了在装配工艺中在各个焊接头1之间形成不利的焊桥。
可以采用诸如PPA等热塑性塑料作为外壳材料。该材料在制造外壳时在注塑方法中被证明是可靠的，但它的热膨胀系数强烈地依赖于诸如FR4等典型印刷电路板材料的热膨胀系数。
其热膨胀系数类似于印刷电路板材料的其它可选材料，譬如LCP是更为昂贵的，它在注塑方法中较难以处理或在金属化为PPA时较差。优选地，可以在本发明的器件中采用诸如PPA等热塑性塑料作为外壳成形物质。
所示的利用CIMID技术的外壳适用于构造较大的三维器件结构。该外壳的另一应用领域表现为光学器件，譬如发光二极管、光电二极管或反射光栅，其中所述半导体本体上的凹口通过合适的、能透射辐射的材料进行覆盖。显然，本发明并不局限于这些或上述的实施例，而是表现为具有表面金属敷层的器件的一种接线设计，这种设计能使所述器件在装入状态下提高热承受能力。

Claims (7)

1.半导体器件，具有至少一个半导体本体(3)和一个外壳基体(2)，所述的外壳基体(2)为了安装所述的半导体器件而具有一个支承面，在该支承面上通过表面金属敷层构成多个焊接头(1)，其中所述的焊接头(1)被组合成多个焊接头列，
其特征为，
所述的焊接头列以一个间隔相对排列，该间隔合适地大，以便防止所述焊接头(1)之间的短路，而且该间隔足够地小，以便防止所述表面金属敷层或焊接头(1)处的、基于所述外壳基体热膨胀的损坏，其中所述的焊接头(1)被布置在所述外壳基体的凹口内。
2.按照权利要求1的半导体器件，
其特征为，
所述的焊接头列是并行布置的。
3.按照上述权利要求1或2的半导体器件，
其特征为，
所述的焊接头列相对于所述外壳的对称轴对称地布置。
4.按照权利要求1的半导体器件，
其特征为，
所述的外壳基体由一种模塑物质构成。
5.按照权利要求4的半导体器件，
其特征为，
所述的模塑物质含有聚邻苯二酰胺。
6.按照权利要求1的半导体器件，
其特征为，
在所述的支承面上构造两个具有相同数量焊接头(1)的焊接头列。
7.权利要求1所述的半导体器件的用途，用于制造发光二极管、光电二极管和反射光栅。
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