CH477765A - Verfahren zur Herstellung einer Halbleitervorrichtung und nach diesem Verfahren hergestellte Halbleitervorrichtung - Google Patents

Verfahren zur Herstellung einer Halbleitervorrichtung und nach diesem Verfahren hergestellte Halbleitervorrichtung

Info

Publication number
CH477765A
CH477765A CH1455567A CH1455567A CH477765A CH 477765 A CH477765 A CH 477765A CH 1455567 A CH1455567 A CH 1455567A CH 1455567 A CH1455567 A CH 1455567A CH 477765 A CH477765 A CH 477765A
Authority
CH
Switzerland
Prior art keywords
semiconductor device
manufacturing
device manufactured
manufactured
semiconductor
Prior art date
Application number
CH1455567A
Other languages
English (en)
Inventor
Schmitz Albert
Mulder Cornelis
Slob Arie
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Publication of CH477765A publication Critical patent/CH477765A/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222Bipolar technology
    • H01L21/8228Complementary devices, e.g. complementary transistors
    • H01L21/82285Complementary vertical transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/761PN junctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/082Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
    • H01L27/0823Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only including vertical bipolar transistors only
    • H01L27/0826Combination of vertical complementary transistors
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/037Diffusion-deposition
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/085Isolated-integrated
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/151Simultaneous diffusion

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Crushing And Grinding (AREA)
CH1455567A 1966-10-21 1967-10-18 Verfahren zur Herstellung einer Halbleitervorrichtung und nach diesem Verfahren hergestellte Halbleitervorrichtung CH477765A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL666614858A NL145396B (nl) 1966-10-21 1966-10-21 Werkwijze ter vervaardiging van een geintegreerde halfgeleiderinrichting en geintegreerde halfgeleiderinrichting, vervaardigd volgens de werkwijze.

Publications (1)

Publication Number Publication Date
CH477765A true CH477765A (de) 1969-08-31

Family

ID=19797975

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1455567A CH477765A (de) 1966-10-21 1967-10-18 Verfahren zur Herstellung einer Halbleitervorrichtung und nach diesem Verfahren hergestellte Halbleitervorrichtung

Country Status (11)

Country Link
US (1) US3702428A (de)
AT (1) AT280350B (de)
BE (1) BE705379A (de)
BR (1) BR6794062D0 (de)
CH (1) CH477765A (de)
DK (1) DK122554B (de)
ES (1) ES346217A1 (de)
GB (1) GB1206427A (de)
NL (1) NL145396B (de)
NO (1) NO120746B (de)
SE (1) SE334949B (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3909318A (en) * 1971-04-14 1975-09-30 Philips Corp Method of forming complementary devices utilizing outdiffusion and selective oxidation
JPS5113627B2 (de) * 1971-08-25 1976-05-01
JPS5514543B2 (de) * 1972-01-25 1980-04-17
US3891480A (en) * 1973-10-01 1975-06-24 Honeywell Inc Bipolar semiconductor device construction
US4013484A (en) * 1976-02-25 1977-03-22 Intel Corporation High density CMOS process
US4087900A (en) * 1976-10-18 1978-05-09 Bell Telephone Laboratories, Incorporated Fabrication of semiconductor integrated circuit structure including injection logic configuration compatible with complementary bipolar transistors utilizing simultaneous formation of device regions
US4357622A (en) * 1980-01-18 1982-11-02 International Business Machines Corporation Complementary transistor structure
US4485552A (en) * 1980-01-18 1984-12-04 International Business Machines Corporation Complementary transistor structure and method for manufacture
JPS5730359A (en) * 1980-07-30 1982-02-18 Nec Corp Semiconductor device
NL8104862A (nl) * 1981-10-28 1983-05-16 Philips Nv Halfgeleiderinrichting, en werkwijze ter vervaardiging daarvan.
EP0093304B1 (de) * 1982-04-19 1986-01-15 Matsushita Electric Industrial Co., Ltd. Integrierte Halbleiterschaltung und Verfahren zur Herstellung derselben
JPS5994861A (ja) * 1982-11-24 1984-05-31 Hitachi Ltd 半導体集積回路装置及びその製造方法
US4940671A (en) * 1986-04-18 1990-07-10 National Semiconductor Corporation High voltage complementary NPN/PNP process
US5529939A (en) * 1986-09-26 1996-06-25 Analog Devices, Incorporated Method of making an integrated circuit with complementary isolated bipolar transistors
US5132235A (en) * 1987-08-07 1992-07-21 Siliconix Incorporated Method for fabricating a high voltage MOS transistor
IT1218230B (it) * 1988-04-28 1990-04-12 Sgs Thomson Microelectronics Procedimento per la formazione di un circuito integrato su un substrato di tipo n,comprendente transistori pnp e npn verticali e isolati fra loro
US4951115A (en) * 1989-03-06 1990-08-21 International Business Machines Corp. Complementary transistor structure and method for manufacture
US4910160A (en) * 1989-06-06 1990-03-20 National Semiconductor Corporation High voltage complementary NPN/PNP process
US5369042A (en) * 1993-03-05 1994-11-29 Texas Instruments Incorporated Enhanced performance bipolar transistor process
JP3409548B2 (ja) * 1995-12-12 2003-05-26 ソニー株式会社 半導体装置の製造方法
US6977420B2 (en) * 1998-09-30 2005-12-20 National Semiconductor Corporation ESD protection circuit utilizing floating lateral clamp diodes
US11355585B2 (en) 2019-10-01 2022-06-07 Analog Devices International Unlimited Company Bipolar junction transistor, and a method of forming a charge control structure for a bipolar junction transistor
US11404540B2 (en) 2019-10-01 2022-08-02 Analog Devices International Unlimited Company Bipolar junction transistor, and a method of forming a collector for a bipolar junction transistor
US11563084B2 (en) 2019-10-01 2023-01-24 Analog Devices International Unlimited Company Bipolar junction transistor, and a method of forming an emitter for a bipolar junction transistor

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL297820A (de) * 1962-10-05
US3327182A (en) * 1965-06-14 1967-06-20 Westinghouse Electric Corp Semiconductor integrated circuit structure and method of making the same
US3391035A (en) * 1965-08-20 1968-07-02 Westinghouse Electric Corp Method of making p-nu-junction devices by diffusion
US3412295A (en) * 1965-10-19 1968-11-19 Sprague Electric Co Monolithic structure with three-region complementary transistors
US3449643A (en) * 1966-09-09 1969-06-10 Hitachi Ltd Semiconductor integrated circuit device
US3502951A (en) * 1968-01-02 1970-03-24 Singer Co Monolithic complementary semiconductor device

Also Published As

Publication number Publication date
US3702428A (en) 1972-11-07
AT280350B (de) 1970-04-10
DE1614286B2 (de) 1975-07-17
DE1614286A1 (de) 1970-06-25
GB1206427A (en) 1970-09-23
NL145396B (nl) 1975-03-17
BE705379A (de) 1968-04-19
DK122554B (da) 1972-03-13
NO120746B (de) 1970-11-30
ES346217A1 (es) 1969-03-16
BR6794062D0 (pt) 1973-12-27
SE334949B (de) 1971-05-10
NL6614858A (de) 1968-04-22

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