CA2050353A1 - Method and processor for high-speed convergence factor determination - Google Patents

Method and processor for high-speed convergence factor determination

Info

Publication number
CA2050353A1
CA2050353A1 CA2050353A CA2050353A CA2050353A1 CA 2050353 A1 CA2050353 A1 CA 2050353A1 CA 2050353 A CA2050353 A CA 2050353A CA 2050353 A CA2050353 A CA 2050353A CA 2050353 A1 CA2050353 A1 CA 2050353A1
Authority
CA
Canada
Prior art keywords
modified
factor
factor determination
convergence factor
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2050353A
Other languages
French (fr)
Other versions
CA2050353C (en
Inventor
Brett Louis Lindsley
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2050353A1 publication Critical patent/CA2050353A1/en
Application granted granted Critical
Publication of CA2050353C publication Critical patent/CA2050353C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/535—Dividing only
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/552—Powers or roots, e.g. Pythagorean sums
    • G06F7/5525—Roots or inverse roots of single operands
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/535—Indexing scheme relating to groups G06F7/535 - G06F7/5375
    • G06F2207/5355—Using iterative approximation not using digit recurrence, e.g. Newton Raphson or Goldschmidt
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • G06F7/487—Multiplying; Dividing
    • G06F7/4873—Dividing

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)

Abstract

2050353 9110188 PCTABS00006 A high-speed processor utilizes combinational logic and range limitation for a modified input value to increase efficiency in convergence factor determination for convergent division and square root computation. An input value (101) is modified to a value in a limited range (104), which is then partitioned into two subdivisions (106, 108). By utilizing these two groupings, the processing platform minimizes time consumption in conversion factor determination by inverting selected binary bits to form a modified factor (114) and utilizes that modified factor to facilitate high-speed convergence factor computation.
CA002050353A 1989-12-29 1990-12-03 Method and processor for high-speed convergence factor determination Expired - Fee Related CA2050353C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US45891589A 1989-12-29 1989-12-29
US458,915 1989-12-29

Publications (2)

Publication Number Publication Date
CA2050353A1 true CA2050353A1 (en) 1991-06-30
CA2050353C CA2050353C (en) 1994-08-30

Family

ID=23822608

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002050353A Expired - Fee Related CA2050353C (en) 1989-12-29 1990-12-03 Method and processor for high-speed convergence factor determination

Country Status (5)

Country Link
EP (1) EP0461230A4 (en)
JP (1) JPH04505978A (en)
KR (1) KR940008610B1 (en)
CA (1) CA2050353C (en)
WO (1) WO1991010188A1 (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4878190A (en) * 1988-01-29 1989-10-31 Texas Instruments Incorporated Floating point/integer processor with divide and square root functions
US4949296A (en) * 1988-05-18 1990-08-14 Harris Corporation Method and apparatus for computing square roots of binary numbers
US5157624A (en) * 1990-12-13 1992-10-20 Micron Technology, Inc. Machine method to perform newton iterations for reciprocal square roots

Also Published As

Publication number Publication date
KR940008610B1 (en) 1994-09-24
CA2050353C (en) 1994-08-30
WO1991010188A1 (en) 1991-07-11
EP0461230A1 (en) 1991-12-18
KR920701901A (en) 1992-08-12
JPH04505978A (en) 1992-10-15
EP0461230A4 (en) 1993-08-18

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