CA2009548A1 - Memoire principale partagee par deux processeurs ou plus a systemes d'exploitation individuels - Google Patents

Memoire principale partagee par deux processeurs ou plus a systemes d'exploitation individuels

Info

Publication number
CA2009548A1
CA2009548A1 CA2009548A CA2009548A CA2009548A1 CA 2009548 A1 CA2009548 A1 CA 2009548A1 CA 2009548 A CA2009548 A CA 2009548A CA 2009548 A CA2009548 A CA 2009548A CA 2009548 A1 CA2009548 A1 CA 2009548A1
Authority
CA
Canada
Prior art keywords
processors
operating system
operating systems
pairs
main storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2009548A
Other languages
English (en)
Other versions
CA2009548C (fr
Inventor
Ernest D. Baker
John M. Dinwiddie, Jr.
Lonnie E. Grice
John M. Loffredo
Kenneth R. Sanderson
Gustavo A. Suarez
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of CA2009548A1 publication Critical patent/CA2009548A1/fr
Application granted granted Critical
Publication of CA2009548C publication Critical patent/CA2009548C/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1629Error detection by comparing the output of redundant processing systems
    • G06F11/1641Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1658Data re-synchronization of a redundant component, or initial sync of replacement, additional or spare unit
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1675Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1679Temporal synchronisation or re-synchronisation of redundant processing components at clock signal level
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/161Computing infrastructure, e.g. computer clusters, blade chassis or hardware partitioning

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Quality & Reliability (AREA)
  • Mathematical Physics (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
  • Memory System (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
CA002009548A 1989-05-17 1990-02-07 Memoire principale partagee par deux processeurs ou plus a systemes d'exploitation individuels Expired - Fee Related CA2009548C (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/353,113 1989-05-17
US07/353,113 US5144692A (en) 1989-05-17 1989-05-17 System for controlling access by first system to portion of main memory dedicated exclusively to second system to facilitate input/output processing via first system

Publications (2)

Publication Number Publication Date
CA2009548A1 true CA2009548A1 (fr) 1990-11-17
CA2009548C CA2009548C (fr) 1996-07-02

Family

ID=23387812

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002009548A Expired - Fee Related CA2009548C (fr) 1989-05-17 1990-02-07 Memoire principale partagee par deux processeurs ou plus a systemes d'exploitation individuels

Country Status (9)

Country Link
US (2) US5144692A (fr)
EP (1) EP0398695B1 (fr)
JP (1) JP2618072B2 (fr)
AT (1) ATE170643T1 (fr)
BR (1) BR9002304A (fr)
CA (1) CA2009548C (fr)
DE (1) DE69032607T2 (fr)
PT (1) PT94055A (fr)
SG (1) SG45151A1 (fr)

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Also Published As

Publication number Publication date
DE69032607D1 (de) 1998-10-08
EP0398695A2 (fr) 1990-11-22
DE69032607T2 (de) 1999-05-27
SG45151A1 (en) 1998-01-16
US5363497A (en) 1994-11-08
ATE170643T1 (de) 1998-09-15
CA2009548C (fr) 1996-07-02
US5144692A (en) 1992-09-01
PT94055A (pt) 1991-11-29
JPH0374756A (ja) 1991-03-29
EP0398695A3 (fr) 1994-02-02
JP2618072B2 (ja) 1997-06-11
BR9002304A (pt) 1991-08-06
EP0398695B1 (fr) 1998-09-02

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