CA1258138A - Method for manufacture of printed circuit boards having solder-masked traces - Google Patents
Method for manufacture of printed circuit boards having solder-masked tracesInfo
- Publication number
- CA1258138A CA1258138A CA000515260A CA515260A CA1258138A CA 1258138 A CA1258138 A CA 1258138A CA 000515260 A CA000515260 A CA 000515260A CA 515260 A CA515260 A CA 515260A CA 1258138 A CA1258138 A CA 1258138A
- Authority
- CA
- Canada
- Prior art keywords
- copper
- traces
- areas
- holes
- tin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/243—Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3473—Plating of solder
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09736—Varying thickness of a single conductor; Conductors in the same plane having different thicknesses
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/043—Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
- H05K3/064—Photoresists
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
Abstract
ABSTRACT OF THE DISCLOSURE
Printed circuit boards having solder coated pads and through-holes and bare copper traces protected by a directly applied solder mask or by a coating of non-reflowable metal and a solder mask thereover, are manu-factured by a process which avoids the need for tin-lead stripping and the need for separate application and leveling of molten solder. In the preferred process, liquid resists are applied to circuit boards having tin-lead over copper plated holes and pads so as to define and etch protect bare copper traces of desired pattern circuitry (as well as other desired configu-rations). Copper areas other than those protected by the etch-resist and tin-lead plating are etched away, the etch-resist removed and solder mask applied over the bare copper traces or other desired bare copper areas or, alternatively, to bare copper first coated with a non-reflowable metal. The tin-lead plating is then preferably reflowed and solidified to provide the pads and through-holes with solder coating.
Printed circuit boards having solder coated pads and through-holes and bare copper traces protected by a directly applied solder mask or by a coating of non-reflowable metal and a solder mask thereover, are manu-factured by a process which avoids the need for tin-lead stripping and the need for separate application and leveling of molten solder. In the preferred process, liquid resists are applied to circuit boards having tin-lead over copper plated holes and pads so as to define and etch protect bare copper traces of desired pattern circuitry (as well as other desired configu-rations). Copper areas other than those protected by the etch-resist and tin-lead plating are etched away, the etch-resist removed and solder mask applied over the bare copper traces or other desired bare copper areas or, alternatively, to bare copper first coated with a non-reflowable metal. The tin-lead plating is then preferably reflowed and solidified to provide the pads and through-holes with solder coating.
Description
1~58138 5~1-035 METHOD FOR MANUFACTURE OF PRINTED CIRCUIT BOARDS
BACKGROUND OF THE INVENTION
The present invention relates to printed circuit boards of the type having a solder mask ov~r non-reflow-able metal, such as bare copper traces etched on a suit-able substrate, and, more particularly to a method of manufacture of such circuit boards and to the unique printed circuit boards resulting therefrom.
As is well understood in the art, the manufacture of double-sided printed circuit boards requires the provision of conductive through-holes for interconnecting components on opposite sides of the board. The non-conductive surfaces exposed when through-holes are drilled in a non-conductive substrate having metal cladding on both sides must, therefore, be provided with a conductive coating, and this generally is accomplished by a first electroless deposition of copper onto the suitably conditioned through-hole surfaces, fallowed by electroplating of copper to build up additional thickness.
In application of the actual circuit patterns to the metal-clad board surfaces, it is necessary to employ ~L258~38 plating resists so as to prevent all but particular areas of the board ~through-holes and/or traces and/or pads and/or other areas) from receiving applied metal platings such as the copper electroplate used in through-hole plating or the commonly-employed tin-lead coating applied as an etch-resist preliminary to the step of etching away undesired metal down to the non-conductive substrate surface so as to form the appropriate conductive circuit pattern.
1~ Apart from its use as an etch-resist, tin-lead is a preferred overplating for otherwise exposed copper areas on the circuit board so as to prevent oxidative degrada-tion of the copper surfaces.
In the ultimate fabrication of a printed circuit board in which various compo~ents and connections are soldered, it is generally accepted that improved solderability of circuit pads and through-holes can be provided to the ultimate fabricator by having the manu-facturer precoat these areas with a solderable metal, generally a tin-lead composite closely similar in com-position to the solder actually used in the eventual soldering of components and connections. For appli-cations where hand-soldering by the fabricator is to be performed, little difficulty is encountered in applying solder to desired areas without disturbing or inadver-tently soldering adjacent conductive traces. However, when soldering is to be conducted in mass techniques, such as with wave soldering or dip soldering methods, inadvertent soldering and improper connections can occur. As a consequence, manufacturers apply a solder resist or solder mask over those areas of the board to be protected from solder, includlng the tin-lead coated copper traces.
1:~58~38 It has been recognized that the technique of solder resist over tin-lead coated copper can, however, lead to its own peculiar problems. For e~ample~ since the tin-lead is a reflowable metal, ultimate wave or dip solderin~ can cause the tin-lead to wick up under the mask or simply to melt and no longer provide support for the mask. Due to these disadvantages, it has been proposed to apply the solder mask directly over bare copper at those areas where protection from solder is desired. This "solder mask over bare copper"
(SMOBC) technique avoids the problems inherent in the application of the mask over tin-lead coated copper, and can yield printed circuit boards with finer line definition and higher current density capabilities. ~nfortunately, the known solder mask over bare copper techniques involve added manufacturing operations, and hence added cost, and present waste disposal and pollution control problems.
Known techniques for solder mask over bare copper, while effective for eliminating problems inherent in application of solder mask to tin-lead coated copper, involve a number of steps which on their face appear almost duplicative but which nevertheless are necessary to ~ain the advantages of SMOBC. In particular, tin-lead is applied in the normal course of manufacture as an etch-resist over surfaces such as traces, pads and holes, and this tin-lead etch-resist is generally of the same or similar alloy composition as the solder eventually applied to the pads and ~2515 ~38 holes. Nevertheless, the manufacturing sequence requires that this tin-lead etch-resist be stripped and removed so that effective solder masking of bare copper traces can be accomplished. Not only do these additional steps result in increased manufacturin~ cost, but significant waste removal and pollution concerns arise. Still further, truly flat solder surfaces are difficult to obtain even using hot air leveling.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide printed circuit boards of the type in which a solder mask is present directly over bare copper surfaces where soldering is undesired and/or directly over a non-reflowable metal coated on bare copper surfaces.
A further object of the invention is to provide a process fcr manufacturing boards of the type described which is economical in e~ecution and eliminates problems present in known processes as to waste disposal.
A more particular object of the invention is to provide printed circuit boards, and methods for their manufacture, of the type containing solder-coated pads and throu~h-holes, and bare copper traces having a directly-applied solder mask thereon.
~258138 Still another object of the invention is to provide printed circuit boards, and methods for their manufacture, of the tvpe having solder-coated pads and through-holes, bare copper traces having solder mask directly applied thereon, and additional bare copper surface configurations for application of other components and structures.
These and other objects are achieved throu~h a unique method of manufacturin~ printed-circuit boards in which tin-lead is selectively plated only onto those surfaces requirin~
both resistance to etching and subsequent solder coating. A
liquid positive or negative resist is employed as an etch resist for those copper areas where eventual solder coating is not desired, and a solder mask is applied either directly over these bare copper areas after etching and removal of the resist or directly over a non-reflowable metal which has been coated onto the bare copper areas. The desired solder coating of surfaces of the printed circuit board is present simply by reason of the previously-applied tin-lead etch resist, which tin-lead coating can, if desired, be reflowed.
The method of the invention eliminates the need for stripping away of tin-lead etch resist and the need for subsequent application and leveling of molten solder.
According to the present invention, a non-conductive substrate material of the type commonly employed for printed ~L25~138 circuit boards is provided with through-holes and pads which surround the surface openings to the through holes. The hole surfaces and the pad surfaces are built up of copper over which is applied a tin-lead plating. Other surfaces of the non-conductive substrate are built up solely with copper, resistance to tin-lead plating being conferred by a suitable resinous plating resist which is applied to those copper surfaces, including those areas of the copper surface where traces or other surface configurations eventually will be patterned, and then stripped off after tin-lead plating is applied to pads and holes. With the board in this configuration, a resinous material resistant to copper etching solutions is applied to the copper surfaces in a pattern which defines the traces and any other desired surface configurations, while at the same time protecting them from copper etching. Resistance to copper etching already is conferred to pads and holes by reason of the previously-applied tin-lead plate. Any exposed copper is then etched away down to the surface of the non-conductive substrate and the etch resist removed so as to expose bare copper in the desired pattern of traces and any other areas (e.g., lands for surface mount devices, bases for shield cans) desired. At this point, solder mask may be applied directly over (at least) the bare copper traces or, alternatively, a non-reflowable metal coating can first be applied to at least the traces, followed by application of the solder mask over at least the non-reflowable metal. The 1~5~3~38 pad and hole areas containin~ tin-lead platin~ are not so masked, and thus present the desired solder coatin~ without any need for tin-lead strippin~ and separate solder application. As usually will be the case, the tin-lead 6 coating on the pads and holes preferably will be reElowed and solidified for provision of the desired solder coat.
As will be apparent, the method of the invention eliminates the need for tin-lead stripping because tin-lead is applied only to those areas (pads, thro~l~h-holes) which eventually are to be provided with solder coating. The need for tin-lead plate on traces (which must be removed so as tc permit soLder mask over bare copper) is eliminated by utilization of resinous or~anic resist materials as the etch-resist for these areas. Through use of li~uid resists for 16 conferring etch-resistance to traces and other desired areas, close conformance to the topography of the surfaces to be protected is attained.
In order to more clearly describe the inventive method and its advantages, there is -Eirst presented in the following sections a detailed step-wise e~planation of a preferred embodiment of the process, followed by discussion of particular features, parameters, substitutions, alternatives and the like.
~2S8~38 BRIEF DESCRI TION _E~THE_~RAWINGS
As previously notedl FIGS. lA through lJ represent schematic illustrations of a circuit board cross-section during its various stages in a known solder mask over bare copper manufacturing method.
In like manner, FIGS. 2A through 2J schematicaily illustrate by cross-section the manufacturing method of the present invention, there again being no attempt to accurately represent relative layer thicknesses, ~ole sizes, etc. Also as in the earlier figures, the depicted hole and pad areas are associated with traces Inot shown) other than those shown, and the depicted traces are associated with holes and pads (not shown) other than the depicted hole and pads.
DETAILED DESCRIPTION OF THE INVENTION
Disadvantages of the prior art process are.mentioned hereinbefore and in order to e~plain these disadvantages in more detail, a typical SMOBC process is schematically set forth in the cross-sections represented b~ FIGS. lA through lJ. Layer thicknesses and through-hole sizes are not representative of either actual or relative scale. For ease of representation of the various steps in the process, a section of the printed circuit board is shown involving, on each side, one through-hole, one pad. and one trace line; the trace will be in association with a different pad and ~58~3~3 through-hole area on the board (not shown), while the through-hole and pad will be associated with a different trace on the board (no-t shown~.
As shown in FIG. lA, a non-conductive substrate 10, typically an epoxy glass resin, has applied to it on both sides thin copper foil laminate 12. A throuah-hole 1~ has been drilled in the laminated board, and the inner hole surfaces are thus composed of the non-conductive substrate.
In order to provide ~ conductive connection between the circuitry eventually applied on both sides of the laminate, the through-hole surfaces must be made conductive.
As shown in FIG. lB, the first step in this process is to electrolessly deposit a copper layer 16 on the entirety of the board, i.e., on the through-hole surfaces and on the copper foil 12 ~conditionino and activating steps preliminary to copper deposition not shown).
The desired circuit pattern is then applied to the electroless copper layer through application and subsequent e~posure and development of a neoative photo-resist. The areas of the photo-resist e~posed to lioht cross-link and become insoluble to developers which remove non-e~posed, non-cross-linked areas. As a consequence, there are now present on the electroless copper layer, e~posed copper areas corresponding to traces, pads and through-holes, while ~:~51~138 remaining areas are covered by material 18 resistant to subsequent plating, as shown in FIG. lC.
In the next step in the process, copper thickness in the e~posed areas is built up through an electroplated copper layer 20 to arrive at the configuration shown in FIG. lD.
Following copper electroplating, an etch resist 22, generally tin-lead, is electroplated onto e~posed copper surfaces as depicted in FIG. lE. After completion of this step, the plating resist 18 is removed (FIG. lF) in preparation for copper etching, the etching resulting in the con~iguration shown in FIG. lG.
Since the solder mask is to be applied to bare copper, the tin-lead etch resist 22 is stripped away in the ne~t step as shown in FIG lH. It is now desired to solder l~ coat the pads and through-holes but not the traces and, accordingly, a solder mask 2~ is applied to the board in a pattern appropriate to protect all areas where solder is undesired, as shown in FIG. lI. Thereafter, the e~posed copper at the holes and pads is cleaned and prepared for solder coating, and then solder coated bv, e.g., hot air level solder to present the solder-coated s~lrface '~6 as shown in FIG. lJ. Electrolytic processes for application of a solder coat cannot be employed in this method at -this stage 13l!~
since the prior step of copper etching has removed the electrical continuitv among areas of the board.
Referring to FIGS. 2A through 2J, the method of the invention makes use of a conventional non-conductive substrate 100, typically having a nominal thickness of 0.0~9 inches, containing through holes 140, and having copper foil 120 laminated on both sides of the substrate (FIG. 2A), generally in an amount to provide a coverage of about one ounce of copper per square foot on each side (0.0014 inches in thickness). The copper foil surfaces 120 and the exposed non-conductive through hole surfaces are then treated according to any known electroless copper depositing process (including the various conditioning, activating, accelerating, rinsing steps involved in conditioning the surfaces and securing suitable deposition~ to deposit a copper layer 160 thereon (FIG. 2B), generally of about 40 to 120 X 10 -6 inches in thickness.
12S8~L38 - Because the board will undergo various plating pro-cesses, a plating resist 180 of suitable pattern is applied to the electroless copper surfaces. Generally, the resist will be of the photosensitive type (negative S or positive-ac ing) and can be of the dry film or liquid type~ Dry film resists typically will be employed where it is desired that certain through-holes receive no further coatings, since the dry film will easily tent over and protect these holes. Preferably, the resist will be a negative photoresist in which exposure to light results in insolubilization (cross-linking) of the resist material, while those areas not exposed to light remain in a form which permits dissolution and removal with a suitable developer. After application, exposure and development, the plating resist on the copper layer will be as shown in FIG. 2C. In particular it will ~e noted that pads and through-holes are exposed in this configuration while areas of the board where traces eventually will be applied are protected by the resist.
The pads and holes, which are not protected with plating resist material, are then provided with an electroplated copper coating 200, (generally about 0.001 inches thick) 'as shown in FIG. 2D, utilizing any known plating technique and bath suitable for such purpose. A
tin-lead alloy 220, suitable both as an etch-resist and as the eventual solder coating for the through-holes and pads, is then electroplated onto the exposed pad and hole surfaces as shown in FIG. 2E, generally to a thickness of about 0.0003 inches. After tin-lead plating, the plating resist 180 is removed to provide a board as shown in FIG.
2F.
At this point in the process, a liquid photosensitive resist, which may be either a negative or positive resist, is applied to the surfaces 160 and exposed and ~258138 developed in a suitable manner to leave on the surfaces - 160 resist material in the con~iguration of the trace pattern. For negative resists, the trace pattern is in the form of exposed, cross-linked resist, while unexposed, non-cross-linked areas are removed. For positive resists, the trace pattern is in the form of unexposed, insoluble resist, while exposed, solubilized portions are removed. The configuration of the board with the applied, exposed and developed resist 240 is schematically shown in FIG. 2G.
As will now be apparent, traces are now protected by the resist 240 while the pads and holes already have been plated with etch-resistant tin-lead 220. At this stage in the method of manufacture, exposed copper areas are removed with a suitable copper etchant to which the etch resist and tin-lead coating are resistant to arrive at the configuration shown in FIG. 2H. The resist 240 is then stripped away to expose the bare copper traces as shown in FIG. 2I. A solder mask 260 is then applied over the bare copper traces and other areas to be protected from solder (FIG. 2J). In practice, for ease of appli cation and for conferring improved insulation resistance to the non~conductive substrate, the entire board will be solder masked except those areas (pads, holes) where solder is desired. The pads and through-holes are then "provided" with solder simply by the presence thereon of the previously-applied tin-lead etch resist 220. If desired, this tin-lead coating can be reflowed and solidified as known in the art to provide the solder coating.
The method of manufacture according to the present invention provides all the advantages of solder mask over bare copper techniques, while greatly simplifying the process, eliminating need for stripping of tin-lead, ~25~i38 eliminating concern over waste di posal, and eliminating need for application and leveling of molten solder as the means for providing pads and through-holes with solder coat.
S Although the method of the present invention has been specifically described with respect to solder mask over bare copper type printed circuit boards, it also is possible to first apply a non-reflowable metal to the "to-be-solder-masXed" bare copper (as well as to certain other copper areas which will not be solder masked) and then apply the solder mask directly over certain areas where the non-reflowable metal has been provided. This method of manufacture has the advantage of providing the copper with improved corrosion resistance and improved solderability characteristics ~for those areas which are not solder masked where subse~uent compsnent connections will take place), while still retaining all the advan tages of solder mask over bare copper (as compared to solder mask over tin-lead) and, relative to other SM9BC
methods, all the advantages of the present inventive manufacturing method. Thus, since the coating applied to the bare metal to be solder masked is a non-reflowable metal, the wicking and other problems encountered when solder mask is applied over tin-lead are avoided. More-over, since the bare copper areas coated by non-reflow-able metal are arrived at without any need for tin-lead application and stripping, the method exhibits all the earlier-discussed advantages over prior art SMOBC
techniques.
Suitable non-reflowable metals are those metals or metal compositions whose melting point is aDove the temperatures at which any operations subsequent to their application will occur. Among the non-reflowable metals other than copper which can be used according to this 125~
.- mode of processing are immersion tin coatings, electro-less nickel-boron coatings and immersion gold coatings.
The various procedures and materials employed in the manufacturing method of the present invention are all known and used for the same or related individual pur-poses in the art. The non-conductive substrate generally will be an epoxy glass resin although other resinous materials ~uch as phenolic resins and polyimide may also be employed. The composite board, i.e., non-conductive substrate clad on both sides with copper film is readily available from manufacturers in such form.
As will be seen in the method of the invention,-the bare copper traces which form the circuitry on the s~rface of the finished board may (for example as in the previously described detailed embodiment) consist ~in terms of copper) only ~f the original copper foil provided on the starting board and the layer of electro-lessly deposited copper. As a consequence, where the traces are required to be of particular thickness for given applications, such thickness may be obtained by use of copper foil of sufficient thickness such that the overall thickness in conjunction with the later electro-less copper plate is of the desired specification, or by any other suitable method. Tvpically the starting boards ~5 are provided with at least about O.S ounces of copper foil per square foot Oh each side, and most preferably at least about 1.0 ounce of copper foil. In the present invention, electroless copper coatings of from about 40 to 120 X 10-6 inches generally will be employed with the aforementioned thicknesses of copper foil. As noted, the electroless copper deposition may be effected in any of the known manners using, for example, .ormaldehyde-reduced baths and the typical preliminary surface treating and catalytic activation SeqUeQCes.
~258~3~
Application of a suitable pattern for the plating resist according to the invention can be effected by means of any of the known resist materials, including the known organic photoresists, and, as to these, can be employed with either positive or negative resists, dry film or liquid type. The desired result is simply application to all areas of the electrolessly copper coated board of a material which will resist coating in subsequent plating steps, i.e., copper electroplating and tin-lead electroplating. In the method of the invention, these areas include trace precursor areas, i.e., those areas at which the traces subsequently will be patterned.
For ease of processing and application, negative photoresist films are preferred, and a host of sui~able such resist materials are known in the art. The films chosen are those of a thickness generally equal to the final plating thickness in the unprotected areas so that mushroaming of the plating coat can be minimized. Suit-able negative films are the Riston-series from duPont, Dynachem Laminar* and Hercules A~uamer, all of which-are three-ply systems in which the film is drawn on a poly-ester backing sheet and then covered with a protective polymer film removed before lamination to the board surfaces. Once applied, the films are exposed through a light mask exhibiting the desired artwork configuration.
Exposure results in cross-linking of the resist material and unexposed areas can then be washed away in dilute solutions of, e.g., sodium bicarbonate.
Electroplating of copper and tin-lead in sequence to the areas of the board not protected with resist may employ any of the methods (e.g., pyrophosphate or copper sulphate baths for copper and tin fluoborate, lead fluoborate, fluoboric acid for the tin-lead) known and available in the art. Generally, the copper will be *trade mark ~:25~3138 electroplated to a thickness of about 1 mil while the tin-lead alloy will be plate~ to a thickness on the order of about 0.4 mil. Following electroplating, the resist film is stripped away using any solvent suitable for the type film employed, e.g., caustic if a fully aqueous film was used or an organic material such as methylene chloride for semi-aqueous or solvent-strippable resists, in an immersion or spray technique.
At this stage in the manufacturing process, the board is now ready for subsequent processing so as to attain solder mask over bare copper traces (or over copper coated with non-reflowable metal), but without the need for the costly and probl~matical methods of the prior art. The key feature for achieving this goal is arranging on the required ~oard areas a resinous material resistant to the subsequent copper etching. This preferably is attained by application, exposure and development of a liquid photoresist.
The use of a liquid positive or negative photoresist for this stage in the process is highly advantageous in terms of its ability to adhere and conform to the desired surfaces and its range of flexibility in building up a desired thickness. At the point in the process just prior to application of this resist, the topography of the circuit board is not perfectly level, and known commercially available dry films could either crack along the edges of the traces (leaving those areas exposed and unprotected during etching) or tent over areas which i, should be etched. Liquid resists can adhere to non-level 3~ surfaces and reduce or eliminate these problems. The liquid resists can be applied to the board surfaces in any of the techniques known in the art, such as spray coating, roller coating, curtain coating or screening.
~2S~
- Although either positive or negative liquid photo-resists may be employed, each has certain characteristics which may make choice of one over the other expedient for certain applications. Each can conform and adhere to non-level surfaces and be applied to desired thickness.
Positive resists have the advantage of being exposed and developed multiple times but, under some circumstances, plugging of through holes with positive liquid resists can occur. Thus, when positive liquid is used, the exposed areas are the areas which become solubilized and capable of being washed away, while the unexposed areas are those that remain as the etch resist. If in the course of application the liquid resist bleeds into a hole, the difficulty in exposing that bleed-in to light of proper exposure for solubilization can lead to resist residues remaining in the hole which could break down electrical connections. Liquid negative resists, on the other hand, have reduced sensitivity to this problem since negative resist which might bleed into a hole can be washed away, because it is exposure which insolubilizes the negative resist material.
.
As noted, the liquid resist may be applied according to any known method to produce a variety of coating thicknesses which will provide etch resistance to the covered areas (generally on the order of 0.3 to 0.4 mil). Screening using a standard squeegee and mesh sizes from 110 to 310 threads per inch are appropriate. After application, the liquid resist is post-baked for removal of solvent contained thereinr after which the resist is exposed to light in appropriate patterns and developed in, e.g., aqueous alkaline solutions. Any suitable positive or negative liquid resist may be employed, such as PR 64 (MacDermid, Inc., Waterbury, Connecticut (positive) and the 747 type microresists available from the Eastman Kodak Company (negative).
12~ 3~
- As a result of the application, exposure and develop-ment of the liquid resist, the resist remaining on the board surf ace defines and protects the traces in the board circuitry against subsequent etching, while pads and holes already are protected by their tin-lead coating. Etching away of the copper in unprotected areas can be conducted using standard processes and materials that do not attack the liquid resist or the tin-lead, such as alkaline, ammonium chloride-based etchants and acid hydrogen peroxide-based etchants su~h as hydrogen-peroxide/sulfuric acid-based etchants, and the like.
After etching, the photoresist used to protect traces is stripped (e.g., using 20% caustic).
After stripping of the etch-resistant photoresist, solder mask may then be applied at least to the now-exposed bare copper traces. As noted, ease of appli-cation usually dictates that all areas of the bcard except those areas where solder is to exist ( pads, holes) be solder masked and, indeed, solder mask on the dielectric substrate will generally improve its insulation resistance.
In an alternative embodiment of the invention, there is first applied to bare copper areas a non-reflowable metal coating such as an immersion tin coating, to ~5 improve the corrosion resistance of the copper and improve its solderability characteristics in later processing (for those areas which will not be solder ! masked, i.e., where subsequent component connections will take place). Solder mask is th~n applied over defined ~o areas coated with non-reflowable metal, and, as earlier described, will generally be applied to all board areas except those where solder is to be presen~. In either case, the solder mask may be any of the known organic 1258~38 - materials suitable for application to bare copper, non-reflowable metals and other board areas where protection from solder is required, such as Novolak epoxy cured using a methylene dianiline catalyst. After curiny of 5 the solder mask, the tin-lead coating on the pads and holes provides the requisite solder coating on these areas and, if desired, can be reflowed in conventional manner to render the deposit molten, accelerate alloying and produce a fused, dense, amorphous solder coat on solidification.
Apart from use of the method of manufacture of the present invention to provide printed circuit boards with solder mask over bare copper (or over non-refiowable metal generally) and solder plated pads and holes, addi-tional surface configurations can be provided on theboard using this method. In particular, the etch-resists used to define and protect copper traces can at the same time be patterned so as to define and protect other areas of the board surface, such as areas which serve as lands for surface mounted devices or bases for shield cans used for EMI-~FI shielding. Subsequent to copper etching and stripping of the resist, these areas exhibit an excep-tionally flat copper surface (made up, e.g., of the copper foil and electrolessly deposited copper), hishly suitable for effecting complete bonding and connections, and particularly, e.g., for surface mount devices. These copper-exposed areas generally will be protected with an electroless or immersion coating of non-reflowable metal (such as immersion tin), particularly if reflow of the tin-lead on the pads and through-holes is to be effected.
Although the present invention has been described with resp~ct to particular features and embodlments, it will be apparent to those skilled in the art that various modifications and improvements may be made without depar-ting from rhe scope and spirit of the invention, asdefined by the appended claims.
BACKGROUND OF THE INVENTION
The present invention relates to printed circuit boards of the type having a solder mask ov~r non-reflow-able metal, such as bare copper traces etched on a suit-able substrate, and, more particularly to a method of manufacture of such circuit boards and to the unique printed circuit boards resulting therefrom.
As is well understood in the art, the manufacture of double-sided printed circuit boards requires the provision of conductive through-holes for interconnecting components on opposite sides of the board. The non-conductive surfaces exposed when through-holes are drilled in a non-conductive substrate having metal cladding on both sides must, therefore, be provided with a conductive coating, and this generally is accomplished by a first electroless deposition of copper onto the suitably conditioned through-hole surfaces, fallowed by electroplating of copper to build up additional thickness.
In application of the actual circuit patterns to the metal-clad board surfaces, it is necessary to employ ~L258~38 plating resists so as to prevent all but particular areas of the board ~through-holes and/or traces and/or pads and/or other areas) from receiving applied metal platings such as the copper electroplate used in through-hole plating or the commonly-employed tin-lead coating applied as an etch-resist preliminary to the step of etching away undesired metal down to the non-conductive substrate surface so as to form the appropriate conductive circuit pattern.
1~ Apart from its use as an etch-resist, tin-lead is a preferred overplating for otherwise exposed copper areas on the circuit board so as to prevent oxidative degrada-tion of the copper surfaces.
In the ultimate fabrication of a printed circuit board in which various compo~ents and connections are soldered, it is generally accepted that improved solderability of circuit pads and through-holes can be provided to the ultimate fabricator by having the manu-facturer precoat these areas with a solderable metal, generally a tin-lead composite closely similar in com-position to the solder actually used in the eventual soldering of components and connections. For appli-cations where hand-soldering by the fabricator is to be performed, little difficulty is encountered in applying solder to desired areas without disturbing or inadver-tently soldering adjacent conductive traces. However, when soldering is to be conducted in mass techniques, such as with wave soldering or dip soldering methods, inadvertent soldering and improper connections can occur. As a consequence, manufacturers apply a solder resist or solder mask over those areas of the board to be protected from solder, includlng the tin-lead coated copper traces.
1:~58~38 It has been recognized that the technique of solder resist over tin-lead coated copper can, however, lead to its own peculiar problems. For e~ample~ since the tin-lead is a reflowable metal, ultimate wave or dip solderin~ can cause the tin-lead to wick up under the mask or simply to melt and no longer provide support for the mask. Due to these disadvantages, it has been proposed to apply the solder mask directly over bare copper at those areas where protection from solder is desired. This "solder mask over bare copper"
(SMOBC) technique avoids the problems inherent in the application of the mask over tin-lead coated copper, and can yield printed circuit boards with finer line definition and higher current density capabilities. ~nfortunately, the known solder mask over bare copper techniques involve added manufacturing operations, and hence added cost, and present waste disposal and pollution control problems.
Known techniques for solder mask over bare copper, while effective for eliminating problems inherent in application of solder mask to tin-lead coated copper, involve a number of steps which on their face appear almost duplicative but which nevertheless are necessary to ~ain the advantages of SMOBC. In particular, tin-lead is applied in the normal course of manufacture as an etch-resist over surfaces such as traces, pads and holes, and this tin-lead etch-resist is generally of the same or similar alloy composition as the solder eventually applied to the pads and ~2515 ~38 holes. Nevertheless, the manufacturing sequence requires that this tin-lead etch-resist be stripped and removed so that effective solder masking of bare copper traces can be accomplished. Not only do these additional steps result in increased manufacturin~ cost, but significant waste removal and pollution concerns arise. Still further, truly flat solder surfaces are difficult to obtain even using hot air leveling.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide printed circuit boards of the type in which a solder mask is present directly over bare copper surfaces where soldering is undesired and/or directly over a non-reflowable metal coated on bare copper surfaces.
A further object of the invention is to provide a process fcr manufacturing boards of the type described which is economical in e~ecution and eliminates problems present in known processes as to waste disposal.
A more particular object of the invention is to provide printed circuit boards, and methods for their manufacture, of the type containing solder-coated pads and throu~h-holes, and bare copper traces having a directly-applied solder mask thereon.
~258138 Still another object of the invention is to provide printed circuit boards, and methods for their manufacture, of the tvpe having solder-coated pads and through-holes, bare copper traces having solder mask directly applied thereon, and additional bare copper surface configurations for application of other components and structures.
These and other objects are achieved throu~h a unique method of manufacturin~ printed-circuit boards in which tin-lead is selectively plated only onto those surfaces requirin~
both resistance to etching and subsequent solder coating. A
liquid positive or negative resist is employed as an etch resist for those copper areas where eventual solder coating is not desired, and a solder mask is applied either directly over these bare copper areas after etching and removal of the resist or directly over a non-reflowable metal which has been coated onto the bare copper areas. The desired solder coating of surfaces of the printed circuit board is present simply by reason of the previously-applied tin-lead etch resist, which tin-lead coating can, if desired, be reflowed.
The method of the invention eliminates the need for stripping away of tin-lead etch resist and the need for subsequent application and leveling of molten solder.
According to the present invention, a non-conductive substrate material of the type commonly employed for printed ~L25~138 circuit boards is provided with through-holes and pads which surround the surface openings to the through holes. The hole surfaces and the pad surfaces are built up of copper over which is applied a tin-lead plating. Other surfaces of the non-conductive substrate are built up solely with copper, resistance to tin-lead plating being conferred by a suitable resinous plating resist which is applied to those copper surfaces, including those areas of the copper surface where traces or other surface configurations eventually will be patterned, and then stripped off after tin-lead plating is applied to pads and holes. With the board in this configuration, a resinous material resistant to copper etching solutions is applied to the copper surfaces in a pattern which defines the traces and any other desired surface configurations, while at the same time protecting them from copper etching. Resistance to copper etching already is conferred to pads and holes by reason of the previously-applied tin-lead plate. Any exposed copper is then etched away down to the surface of the non-conductive substrate and the etch resist removed so as to expose bare copper in the desired pattern of traces and any other areas (e.g., lands for surface mount devices, bases for shield cans) desired. At this point, solder mask may be applied directly over (at least) the bare copper traces or, alternatively, a non-reflowable metal coating can first be applied to at least the traces, followed by application of the solder mask over at least the non-reflowable metal. The 1~5~3~38 pad and hole areas containin~ tin-lead platin~ are not so masked, and thus present the desired solder coatin~ without any need for tin-lead strippin~ and separate solder application. As usually will be the case, the tin-lead 6 coating on the pads and holes preferably will be reElowed and solidified for provision of the desired solder coat.
As will be apparent, the method of the invention eliminates the need for tin-lead stripping because tin-lead is applied only to those areas (pads, thro~l~h-holes) which eventually are to be provided with solder coating. The need for tin-lead plate on traces (which must be removed so as tc permit soLder mask over bare copper) is eliminated by utilization of resinous or~anic resist materials as the etch-resist for these areas. Through use of li~uid resists for 16 conferring etch-resistance to traces and other desired areas, close conformance to the topography of the surfaces to be protected is attained.
In order to more clearly describe the inventive method and its advantages, there is -Eirst presented in the following sections a detailed step-wise e~planation of a preferred embodiment of the process, followed by discussion of particular features, parameters, substitutions, alternatives and the like.
~2S8~38 BRIEF DESCRI TION _E~THE_~RAWINGS
As previously notedl FIGS. lA through lJ represent schematic illustrations of a circuit board cross-section during its various stages in a known solder mask over bare copper manufacturing method.
In like manner, FIGS. 2A through 2J schematicaily illustrate by cross-section the manufacturing method of the present invention, there again being no attempt to accurately represent relative layer thicknesses, ~ole sizes, etc. Also as in the earlier figures, the depicted hole and pad areas are associated with traces Inot shown) other than those shown, and the depicted traces are associated with holes and pads (not shown) other than the depicted hole and pads.
DETAILED DESCRIPTION OF THE INVENTION
Disadvantages of the prior art process are.mentioned hereinbefore and in order to e~plain these disadvantages in more detail, a typical SMOBC process is schematically set forth in the cross-sections represented b~ FIGS. lA through lJ. Layer thicknesses and through-hole sizes are not representative of either actual or relative scale. For ease of representation of the various steps in the process, a section of the printed circuit board is shown involving, on each side, one through-hole, one pad. and one trace line; the trace will be in association with a different pad and ~58~3~3 through-hole area on the board (not shown), while the through-hole and pad will be associated with a different trace on the board (no-t shown~.
As shown in FIG. lA, a non-conductive substrate 10, typically an epoxy glass resin, has applied to it on both sides thin copper foil laminate 12. A throuah-hole 1~ has been drilled in the laminated board, and the inner hole surfaces are thus composed of the non-conductive substrate.
In order to provide ~ conductive connection between the circuitry eventually applied on both sides of the laminate, the through-hole surfaces must be made conductive.
As shown in FIG. lB, the first step in this process is to electrolessly deposit a copper layer 16 on the entirety of the board, i.e., on the through-hole surfaces and on the copper foil 12 ~conditionino and activating steps preliminary to copper deposition not shown).
The desired circuit pattern is then applied to the electroless copper layer through application and subsequent e~posure and development of a neoative photo-resist. The areas of the photo-resist e~posed to lioht cross-link and become insoluble to developers which remove non-e~posed, non-cross-linked areas. As a consequence, there are now present on the electroless copper layer, e~posed copper areas corresponding to traces, pads and through-holes, while ~:~51~138 remaining areas are covered by material 18 resistant to subsequent plating, as shown in FIG. lC.
In the next step in the process, copper thickness in the e~posed areas is built up through an electroplated copper layer 20 to arrive at the configuration shown in FIG. lD.
Following copper electroplating, an etch resist 22, generally tin-lead, is electroplated onto e~posed copper surfaces as depicted in FIG. lE. After completion of this step, the plating resist 18 is removed (FIG. lF) in preparation for copper etching, the etching resulting in the con~iguration shown in FIG. lG.
Since the solder mask is to be applied to bare copper, the tin-lead etch resist 22 is stripped away in the ne~t step as shown in FIG lH. It is now desired to solder l~ coat the pads and through-holes but not the traces and, accordingly, a solder mask 2~ is applied to the board in a pattern appropriate to protect all areas where solder is undesired, as shown in FIG. lI. Thereafter, the e~posed copper at the holes and pads is cleaned and prepared for solder coating, and then solder coated bv, e.g., hot air level solder to present the solder-coated s~lrface '~6 as shown in FIG. lJ. Electrolytic processes for application of a solder coat cannot be employed in this method at -this stage 13l!~
since the prior step of copper etching has removed the electrical continuitv among areas of the board.
Referring to FIGS. 2A through 2J, the method of the invention makes use of a conventional non-conductive substrate 100, typically having a nominal thickness of 0.0~9 inches, containing through holes 140, and having copper foil 120 laminated on both sides of the substrate (FIG. 2A), generally in an amount to provide a coverage of about one ounce of copper per square foot on each side (0.0014 inches in thickness). The copper foil surfaces 120 and the exposed non-conductive through hole surfaces are then treated according to any known electroless copper depositing process (including the various conditioning, activating, accelerating, rinsing steps involved in conditioning the surfaces and securing suitable deposition~ to deposit a copper layer 160 thereon (FIG. 2B), generally of about 40 to 120 X 10 -6 inches in thickness.
12S8~L38 - Because the board will undergo various plating pro-cesses, a plating resist 180 of suitable pattern is applied to the electroless copper surfaces. Generally, the resist will be of the photosensitive type (negative S or positive-ac ing) and can be of the dry film or liquid type~ Dry film resists typically will be employed where it is desired that certain through-holes receive no further coatings, since the dry film will easily tent over and protect these holes. Preferably, the resist will be a negative photoresist in which exposure to light results in insolubilization (cross-linking) of the resist material, while those areas not exposed to light remain in a form which permits dissolution and removal with a suitable developer. After application, exposure and development, the plating resist on the copper layer will be as shown in FIG. 2C. In particular it will ~e noted that pads and through-holes are exposed in this configuration while areas of the board where traces eventually will be applied are protected by the resist.
The pads and holes, which are not protected with plating resist material, are then provided with an electroplated copper coating 200, (generally about 0.001 inches thick) 'as shown in FIG. 2D, utilizing any known plating technique and bath suitable for such purpose. A
tin-lead alloy 220, suitable both as an etch-resist and as the eventual solder coating for the through-holes and pads, is then electroplated onto the exposed pad and hole surfaces as shown in FIG. 2E, generally to a thickness of about 0.0003 inches. After tin-lead plating, the plating resist 180 is removed to provide a board as shown in FIG.
2F.
At this point in the process, a liquid photosensitive resist, which may be either a negative or positive resist, is applied to the surfaces 160 and exposed and ~258138 developed in a suitable manner to leave on the surfaces - 160 resist material in the con~iguration of the trace pattern. For negative resists, the trace pattern is in the form of exposed, cross-linked resist, while unexposed, non-cross-linked areas are removed. For positive resists, the trace pattern is in the form of unexposed, insoluble resist, while exposed, solubilized portions are removed. The configuration of the board with the applied, exposed and developed resist 240 is schematically shown in FIG. 2G.
As will now be apparent, traces are now protected by the resist 240 while the pads and holes already have been plated with etch-resistant tin-lead 220. At this stage in the method of manufacture, exposed copper areas are removed with a suitable copper etchant to which the etch resist and tin-lead coating are resistant to arrive at the configuration shown in FIG. 2H. The resist 240 is then stripped away to expose the bare copper traces as shown in FIG. 2I. A solder mask 260 is then applied over the bare copper traces and other areas to be protected from solder (FIG. 2J). In practice, for ease of appli cation and for conferring improved insulation resistance to the non~conductive substrate, the entire board will be solder masked except those areas (pads, holes) where solder is desired. The pads and through-holes are then "provided" with solder simply by the presence thereon of the previously-applied tin-lead etch resist 220. If desired, this tin-lead coating can be reflowed and solidified as known in the art to provide the solder coating.
The method of manufacture according to the present invention provides all the advantages of solder mask over bare copper techniques, while greatly simplifying the process, eliminating need for stripping of tin-lead, ~25~i38 eliminating concern over waste di posal, and eliminating need for application and leveling of molten solder as the means for providing pads and through-holes with solder coat.
S Although the method of the present invention has been specifically described with respect to solder mask over bare copper type printed circuit boards, it also is possible to first apply a non-reflowable metal to the "to-be-solder-masXed" bare copper (as well as to certain other copper areas which will not be solder masked) and then apply the solder mask directly over certain areas where the non-reflowable metal has been provided. This method of manufacture has the advantage of providing the copper with improved corrosion resistance and improved solderability characteristics ~for those areas which are not solder masked where subse~uent compsnent connections will take place), while still retaining all the advan tages of solder mask over bare copper (as compared to solder mask over tin-lead) and, relative to other SM9BC
methods, all the advantages of the present inventive manufacturing method. Thus, since the coating applied to the bare metal to be solder masked is a non-reflowable metal, the wicking and other problems encountered when solder mask is applied over tin-lead are avoided. More-over, since the bare copper areas coated by non-reflow-able metal are arrived at without any need for tin-lead application and stripping, the method exhibits all the earlier-discussed advantages over prior art SMOBC
techniques.
Suitable non-reflowable metals are those metals or metal compositions whose melting point is aDove the temperatures at which any operations subsequent to their application will occur. Among the non-reflowable metals other than copper which can be used according to this 125~
.- mode of processing are immersion tin coatings, electro-less nickel-boron coatings and immersion gold coatings.
The various procedures and materials employed in the manufacturing method of the present invention are all known and used for the same or related individual pur-poses in the art. The non-conductive substrate generally will be an epoxy glass resin although other resinous materials ~uch as phenolic resins and polyimide may also be employed. The composite board, i.e., non-conductive substrate clad on both sides with copper film is readily available from manufacturers in such form.
As will be seen in the method of the invention,-the bare copper traces which form the circuitry on the s~rface of the finished board may (for example as in the previously described detailed embodiment) consist ~in terms of copper) only ~f the original copper foil provided on the starting board and the layer of electro-lessly deposited copper. As a consequence, where the traces are required to be of particular thickness for given applications, such thickness may be obtained by use of copper foil of sufficient thickness such that the overall thickness in conjunction with the later electro-less copper plate is of the desired specification, or by any other suitable method. Tvpically the starting boards ~5 are provided with at least about O.S ounces of copper foil per square foot Oh each side, and most preferably at least about 1.0 ounce of copper foil. In the present invention, electroless copper coatings of from about 40 to 120 X 10-6 inches generally will be employed with the aforementioned thicknesses of copper foil. As noted, the electroless copper deposition may be effected in any of the known manners using, for example, .ormaldehyde-reduced baths and the typical preliminary surface treating and catalytic activation SeqUeQCes.
~258~3~
Application of a suitable pattern for the plating resist according to the invention can be effected by means of any of the known resist materials, including the known organic photoresists, and, as to these, can be employed with either positive or negative resists, dry film or liquid type. The desired result is simply application to all areas of the electrolessly copper coated board of a material which will resist coating in subsequent plating steps, i.e., copper electroplating and tin-lead electroplating. In the method of the invention, these areas include trace precursor areas, i.e., those areas at which the traces subsequently will be patterned.
For ease of processing and application, negative photoresist films are preferred, and a host of sui~able such resist materials are known in the art. The films chosen are those of a thickness generally equal to the final plating thickness in the unprotected areas so that mushroaming of the plating coat can be minimized. Suit-able negative films are the Riston-series from duPont, Dynachem Laminar* and Hercules A~uamer, all of which-are three-ply systems in which the film is drawn on a poly-ester backing sheet and then covered with a protective polymer film removed before lamination to the board surfaces. Once applied, the films are exposed through a light mask exhibiting the desired artwork configuration.
Exposure results in cross-linking of the resist material and unexposed areas can then be washed away in dilute solutions of, e.g., sodium bicarbonate.
Electroplating of copper and tin-lead in sequence to the areas of the board not protected with resist may employ any of the methods (e.g., pyrophosphate or copper sulphate baths for copper and tin fluoborate, lead fluoborate, fluoboric acid for the tin-lead) known and available in the art. Generally, the copper will be *trade mark ~:25~3138 electroplated to a thickness of about 1 mil while the tin-lead alloy will be plate~ to a thickness on the order of about 0.4 mil. Following electroplating, the resist film is stripped away using any solvent suitable for the type film employed, e.g., caustic if a fully aqueous film was used or an organic material such as methylene chloride for semi-aqueous or solvent-strippable resists, in an immersion or spray technique.
At this stage in the manufacturing process, the board is now ready for subsequent processing so as to attain solder mask over bare copper traces (or over copper coated with non-reflowable metal), but without the need for the costly and probl~matical methods of the prior art. The key feature for achieving this goal is arranging on the required ~oard areas a resinous material resistant to the subsequent copper etching. This preferably is attained by application, exposure and development of a liquid photoresist.
The use of a liquid positive or negative photoresist for this stage in the process is highly advantageous in terms of its ability to adhere and conform to the desired surfaces and its range of flexibility in building up a desired thickness. At the point in the process just prior to application of this resist, the topography of the circuit board is not perfectly level, and known commercially available dry films could either crack along the edges of the traces (leaving those areas exposed and unprotected during etching) or tent over areas which i, should be etched. Liquid resists can adhere to non-level 3~ surfaces and reduce or eliminate these problems. The liquid resists can be applied to the board surfaces in any of the techniques known in the art, such as spray coating, roller coating, curtain coating or screening.
~2S~
- Although either positive or negative liquid photo-resists may be employed, each has certain characteristics which may make choice of one over the other expedient for certain applications. Each can conform and adhere to non-level surfaces and be applied to desired thickness.
Positive resists have the advantage of being exposed and developed multiple times but, under some circumstances, plugging of through holes with positive liquid resists can occur. Thus, when positive liquid is used, the exposed areas are the areas which become solubilized and capable of being washed away, while the unexposed areas are those that remain as the etch resist. If in the course of application the liquid resist bleeds into a hole, the difficulty in exposing that bleed-in to light of proper exposure for solubilization can lead to resist residues remaining in the hole which could break down electrical connections. Liquid negative resists, on the other hand, have reduced sensitivity to this problem since negative resist which might bleed into a hole can be washed away, because it is exposure which insolubilizes the negative resist material.
.
As noted, the liquid resist may be applied according to any known method to produce a variety of coating thicknesses which will provide etch resistance to the covered areas (generally on the order of 0.3 to 0.4 mil). Screening using a standard squeegee and mesh sizes from 110 to 310 threads per inch are appropriate. After application, the liquid resist is post-baked for removal of solvent contained thereinr after which the resist is exposed to light in appropriate patterns and developed in, e.g., aqueous alkaline solutions. Any suitable positive or negative liquid resist may be employed, such as PR 64 (MacDermid, Inc., Waterbury, Connecticut (positive) and the 747 type microresists available from the Eastman Kodak Company (negative).
12~ 3~
- As a result of the application, exposure and develop-ment of the liquid resist, the resist remaining on the board surf ace defines and protects the traces in the board circuitry against subsequent etching, while pads and holes already are protected by their tin-lead coating. Etching away of the copper in unprotected areas can be conducted using standard processes and materials that do not attack the liquid resist or the tin-lead, such as alkaline, ammonium chloride-based etchants and acid hydrogen peroxide-based etchants su~h as hydrogen-peroxide/sulfuric acid-based etchants, and the like.
After etching, the photoresist used to protect traces is stripped (e.g., using 20% caustic).
After stripping of the etch-resistant photoresist, solder mask may then be applied at least to the now-exposed bare copper traces. As noted, ease of appli-cation usually dictates that all areas of the bcard except those areas where solder is to exist ( pads, holes) be solder masked and, indeed, solder mask on the dielectric substrate will generally improve its insulation resistance.
In an alternative embodiment of the invention, there is first applied to bare copper areas a non-reflowable metal coating such as an immersion tin coating, to ~5 improve the corrosion resistance of the copper and improve its solderability characteristics in later processing (for those areas which will not be solder ! masked, i.e., where subsequent component connections will take place). Solder mask is th~n applied over defined ~o areas coated with non-reflowable metal, and, as earlier described, will generally be applied to all board areas except those where solder is to be presen~. In either case, the solder mask may be any of the known organic 1258~38 - materials suitable for application to bare copper, non-reflowable metals and other board areas where protection from solder is required, such as Novolak epoxy cured using a methylene dianiline catalyst. After curiny of 5 the solder mask, the tin-lead coating on the pads and holes provides the requisite solder coating on these areas and, if desired, can be reflowed in conventional manner to render the deposit molten, accelerate alloying and produce a fused, dense, amorphous solder coat on solidification.
Apart from use of the method of manufacture of the present invention to provide printed circuit boards with solder mask over bare copper (or over non-refiowable metal generally) and solder plated pads and holes, addi-tional surface configurations can be provided on theboard using this method. In particular, the etch-resists used to define and protect copper traces can at the same time be patterned so as to define and protect other areas of the board surface, such as areas which serve as lands for surface mounted devices or bases for shield cans used for EMI-~FI shielding. Subsequent to copper etching and stripping of the resist, these areas exhibit an excep-tionally flat copper surface (made up, e.g., of the copper foil and electrolessly deposited copper), hishly suitable for effecting complete bonding and connections, and particularly, e.g., for surface mount devices. These copper-exposed areas generally will be protected with an electroless or immersion coating of non-reflowable metal (such as immersion tin), particularly if reflow of the tin-lead on the pads and through-holes is to be effected.
Although the present invention has been described with resp~ct to particular features and embodlments, it will be apparent to those skilled in the art that various modifications and improvements may be made without depar-ting from rhe scope and spirit of the invention, asdefined by the appended claims.
Claims (14)
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. A method for manufacturing printed circuit boards containing conductive through-holes, conductive pads surrounding, said through-holes and conductive copper traces forming a circuit pattern on said board, and wherein said pads and through-holes are provided with a solder coating and said copper traces, either as bare copper or bare copper coated with a non-reflowable metal, are provided with a solder mask, said method comprising the steps of:
(a) providing a circuit board material containing through-holes and pads surrounding the surface openings of said through-holes, said board consisting of a planar non-conductive substrate material having copper foil laminated to each side thereof, the areas defined by said through-holes consisting of layered coatings, radially inward to the center of said hole, of electroless copper, electroplated copper and electroplated tin-lead, the areas defined by said pads consisting of layered coatings, commencing from said non-conductive substrate surface, of electroless copper, electroplated copper and electroplated tin-lead, and trace precursor areas on at least one surface of said non-conductive substrate consisting of lavered coatings, commencing from said substrate surface, of copper foil and electroless copper;
(b) applying, exposing and developing a liquid photo-sensitive material on said trace precursor areas but not to the through-hole or pad areas so as to define at least a trace pattern and provide said trace precursor areas, in said pattern, with a resinous material resistant to copper etching;
(c) removing copper from the areas of said circuit board not provided with etch-resistant resinous material or tin-lead coating, so as to expose said non-conductive substrate surfaces at those areas;
(d) removing said etch-resistant resinous material from said trace precursor areas to expose bare copper traces consisting of copper foil and electroless copper; and (e) thereafter processing said circuit board by a method selected from (1) applying a solder mask over at least the bare copper traces but not over said through-hole or pad surfaces, (2) applying to at least said bare copper traces but not to the through-hole or pad areas a coating of non-reflowable metal and thereafter applying solder mask over at least said non-reflowable metal coated traces but not to through-holes or pad surfaces, and (3) combinations thereof, so as to provide a circuit board having pads and through-holes provided with a solder coating and at least traces protected by a solder mask.
(a) providing a circuit board material containing through-holes and pads surrounding the surface openings of said through-holes, said board consisting of a planar non-conductive substrate material having copper foil laminated to each side thereof, the areas defined by said through-holes consisting of layered coatings, radially inward to the center of said hole, of electroless copper, electroplated copper and electroplated tin-lead, the areas defined by said pads consisting of layered coatings, commencing from said non-conductive substrate surface, of electroless copper, electroplated copper and electroplated tin-lead, and trace precursor areas on at least one surface of said non-conductive substrate consisting of lavered coatings, commencing from said substrate surface, of copper foil and electroless copper;
(b) applying, exposing and developing a liquid photo-sensitive material on said trace precursor areas but not to the through-hole or pad areas so as to define at least a trace pattern and provide said trace precursor areas, in said pattern, with a resinous material resistant to copper etching;
(c) removing copper from the areas of said circuit board not provided with etch-resistant resinous material or tin-lead coating, so as to expose said non-conductive substrate surfaces at those areas;
(d) removing said etch-resistant resinous material from said trace precursor areas to expose bare copper traces consisting of copper foil and electroless copper; and (e) thereafter processing said circuit board by a method selected from (1) applying a solder mask over at least the bare copper traces but not over said through-hole or pad surfaces, (2) applying to at least said bare copper traces but not to the through-hole or pad areas a coating of non-reflowable metal and thereafter applying solder mask over at least said non-reflowable metal coated traces but not to through-holes or pad surfaces, and (3) combinations thereof, so as to provide a circuit board having pads and through-holes provided with a solder coating and at least traces protected by a solder mask.
2. A method for manufacturing printed circuit boards containing conductive through-holes, conductive pads and conductive traces forming a circuit pattern on said board, and wherein said pads and through-holes are provided with a solder coating and said traces, either as bare copper or bare copper coated with a non-reflowable metal, are provided with a solder mask, said method consisting of:
(a) providing a non-conductive substrate material (1) having through-holes therein, the exposed surfaces of said through-holes consisting of a tin-lead plating over a previously-applied copper surface; (2) having pads surrounding the surface openings of said through-holes, the exposed surfaces of said pads consisting of a tin-lead plating over a previously-applied copper plating; (3) and having remaining areas on its surface consisting of copper coating;
(b) arranging on at least some of said remaining areas consisting of copper coating, but not to the through-hole or path areas, an etch-resistant resinous material in the pattern of desired traces;
(c) etching exposed copper coating from said substrate surfaces;
(d) removing said etch-resistant resinous material so as to expose the pattern of desired bare copper traces;
and e) thereafter processing said circuit board by a method selected from (1) applying a solder mask over at least the bare copper traces but not over said through-hole or pad surfaces, (2) applying to at least said bare copper traces, but not to the through-hole or path areas, a coating of non-reflowable metal and thereafter applying solder mask over at least said non-reflowable metal but not to through-hole or pad surfaces, and (3) combinations thereof, so as to provide a circuit board having pads and through-holes provided with a solder coating and at least traces protected by a solder mask.
(a) providing a non-conductive substrate material (1) having through-holes therein, the exposed surfaces of said through-holes consisting of a tin-lead plating over a previously-applied copper surface; (2) having pads surrounding the surface openings of said through-holes, the exposed surfaces of said pads consisting of a tin-lead plating over a previously-applied copper plating; (3) and having remaining areas on its surface consisting of copper coating;
(b) arranging on at least some of said remaining areas consisting of copper coating, but not to the through-hole or path areas, an etch-resistant resinous material in the pattern of desired traces;
(c) etching exposed copper coating from said substrate surfaces;
(d) removing said etch-resistant resinous material so as to expose the pattern of desired bare copper traces;
and e) thereafter processing said circuit board by a method selected from (1) applying a solder mask over at least the bare copper traces but not over said through-hole or pad surfaces, (2) applying to at least said bare copper traces, but not to the through-hole or path areas, a coating of non-reflowable metal and thereafter applying solder mask over at least said non-reflowable metal but not to through-hole or pad surfaces, and (3) combinations thereof, so as to provide a circuit board having pads and through-holes provided with a solder coating and at least traces protected by a solder mask.
3. The method according to claim 2 wherein said etch-resistant resinous material in the pattern of desired traces -is formed by application and light exposure of a liquid photosensitive material in the pattern of said desired traces, followed by removal of undeveloped resist material.
4. The method according to claim 3 wherein said liquid photosensitive material is of the negative type, and wherein areas thereof unexposed to light are removed.
5. The method according to claim 3 wherein said liquid photosensitive material is of the positive type, and wherein areas thereof exposed to light are removed.
6. The method according to claims 1 or 2 wherein said etch-resistant resinous material also is arranged so as to define and protect from etching, copper coated surfaces on said substrate other than traces.
7. The method according to claims 1 or 2 wherein said etch-resistant resinous material also is arranged so as to define and protect from etching, copper coated surfaces on said substrate corresponding to areas for mounting of surface mounted devices.
8. The method according to claims 1 or 2 wherein said solder mask is applied over bare copper traces.
9. The method according to claims 1 or 2 wherein at least said bare copper traces are coated with a non-reflowable metal and thereafter covered with a solder mask.
10. The method according to claims 1 or 2 wherein said tin-lead plating on said pad and through-hole surfaces is reflowed and solidified after application of solder mask over at least said copper traces or said copper traces coated with non-reflowable metal.
11. A method for the manufacture of printed circuit boards containing through-holes, pads and traces, comprising the steps of:
a) providing a planar non-conductive substrate having copper-foil laminated to both sides thereof and having through-holes made therein;
b) electrolessly depositing a copper layer on the copper-foil and through-hole surfaces;
c) applying a plating-resistant resinous material to areas of said laminated, coated substrate other than said through-hole surfaces and the areas defining pads surrounding the surface openings of said through-holes;
d) subjecting said substrate to a copper electroplating process to deposit additional copper thickness on the electroless copper of said through-holes and pad surfaces;
e) applying a tin-lead plating over the electroplated copper of said through-hole and pad surfaces;
f) removing said plating-resistant resinous material from said copper foil/electroless copper surfaces;
g) applying an etch-resistant resinous material to at least portions of said copper foil/electroless copper surfaces but not to the through-hole or path areas to define a trace pattern therein and protect said surfaces from copper etching;
h) removing copper foil and electroless copper from those areas not protected by said etch-resist or said tin-lead plating;
i) removing said etch-resist to expose bare copper traces consisting of copper foil and electroless copper;
j) applying a solder mask over at least said bare copper traces; and k) reflowing and solidifying the tin-lead plating on pad and through-hole surfaces to provide thereon a solder coating.
a) providing a planar non-conductive substrate having copper-foil laminated to both sides thereof and having through-holes made therein;
b) electrolessly depositing a copper layer on the copper-foil and through-hole surfaces;
c) applying a plating-resistant resinous material to areas of said laminated, coated substrate other than said through-hole surfaces and the areas defining pads surrounding the surface openings of said through-holes;
d) subjecting said substrate to a copper electroplating process to deposit additional copper thickness on the electroless copper of said through-holes and pad surfaces;
e) applying a tin-lead plating over the electroplated copper of said through-hole and pad surfaces;
f) removing said plating-resistant resinous material from said copper foil/electroless copper surfaces;
g) applying an etch-resistant resinous material to at least portions of said copper foil/electroless copper surfaces but not to the through-hole or path areas to define a trace pattern therein and protect said surfaces from copper etching;
h) removing copper foil and electroless copper from those areas not protected by said etch-resist or said tin-lead plating;
i) removing said etch-resist to expose bare copper traces consisting of copper foil and electroless copper;
j) applying a solder mask over at least said bare copper traces; and k) reflowing and solidifying the tin-lead plating on pad and through-hole surfaces to provide thereon a solder coating.
12. The method according to claim 11 wherein said etch-resistant resinous material of step (g) results from application, exposure and development of a liquid photosensitive material to said copper foil/electroless copper surfaces.
13. The method according to claim 12 wherein said liquid photosensitive material is of the negative type.
14. The method according to claim 12 wherein said liquid photosensitive material is of the positive type.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US76381285A | 1985-08-08 | 1985-08-08 | |
| US763,812 | 1985-08-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1258138A true CA1258138A (en) | 1989-08-01 |
Family
ID=25068881
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000515260A Expired CA1258138A (en) | 1985-08-08 | 1986-08-01 | Method for manufacture of printed circuit boards having solder-masked traces |
Country Status (5)
| Country | Link |
|---|---|
| EP (1) | EP0233201A4 (en) |
| JP (1) | JPS63500837A (en) |
| AU (1) | AU5956286A (en) |
| CA (1) | CA1258138A (en) |
| WO (1) | WO1987000938A1 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01293694A (en) * | 1988-05-23 | 1989-11-27 | Mitsubishi Electric Corp | Manufacture of printed-circuit board |
| JPH0423485A (en) * | 1990-05-18 | 1992-01-27 | Cmk Corp | Printed wiring board and manufacture thereof |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1410780A (en) * | 1972-09-29 | 1975-10-22 | Exacta Circuits Ltd | Through-hole plated printed circuits |
| JPS49103167A (en) * | 1973-02-08 | 1974-09-30 | ||
| JPS50127176A (en) * | 1974-01-25 | 1975-10-06 | ||
| JPS5141869A (en) * | 1974-10-04 | 1976-04-08 | Hitachi Ltd | KOMITSUDOPATAANTASOINSATSUKAIROBAN NO SEIZOHOHO |
| CA1054259A (en) * | 1977-10-14 | 1979-05-08 | John A. Galko | Printed circuit board carrying protective mask having improved adhesion |
| US4291118A (en) * | 1979-12-26 | 1981-09-22 | W. R. Grace & Co. | Relief imaging liquids |
| US4325780A (en) * | 1980-09-16 | 1982-04-20 | Schulz Sr Robert M | Method of making a printed circuit board |
| JPS5771159A (en) * | 1980-10-21 | 1982-05-01 | Citizen Watch Co Ltd | Heterogeneous electroplating method for circuit substrate |
| US4436806A (en) * | 1981-01-16 | 1984-03-13 | W. R. Grace & Co. | Method and apparatus for making printed circuit boards |
| JPS57145353A (en) * | 1981-03-03 | 1982-09-08 | Sharp Corp | Preparation of tape carrier type substrate |
| JPS5816594A (en) * | 1981-07-22 | 1983-01-31 | 共立工業株式会社 | Method of producing printed circuit board |
| JPS5830196A (en) * | 1981-08-17 | 1983-02-22 | 共立工業株式会社 | Method of producing printed circuit board |
| JPS58130595A (en) * | 1982-01-28 | 1983-08-04 | 日立化成工業株式会社 | Method of producing printed circuit board |
| DE3320183A1 (en) * | 1983-06-03 | 1984-12-06 | ANT Nachrichtentechnik GmbH, 7150 Backnang | METHOD FOR PRODUCING PRINTED CIRCUITS |
| US4582778A (en) * | 1983-10-25 | 1986-04-15 | Sullivan Donald F | Multi-function photopolymer for efficiently producing high resolution images on printed wiring boards, and the like |
| US4487654A (en) * | 1983-10-27 | 1984-12-11 | Ael Microtel Limited | Method of manufacturing printed wiring boards |
-
1986
- 1986-06-09 EP EP19860904002 patent/EP0233201A4/en not_active Withdrawn
- 1986-06-09 AU AU59562/86A patent/AU5956286A/en not_active Abandoned
- 1986-06-09 WO PCT/US1986/001270 patent/WO1987000938A1/en not_active Application Discontinuation
- 1986-06-09 JP JP50322886A patent/JPS63500837A/en active Pending
- 1986-08-01 CA CA000515260A patent/CA1258138A/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| EP0233201A1 (en) | 1987-08-26 |
| AU5956286A (en) | 1987-03-05 |
| JPS63500837A (en) | 1988-03-24 |
| WO1987000938A1 (en) | 1987-02-12 |
| EP0233201A4 (en) | 1987-11-30 |
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Legal Events
| Date | Code | Title | Description |
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| MKEX | Expiry |