CA1211570A - Method of coding a sequence of blocks of binary data bits into a sequence of blocks of binary channel bits, arrangement for demodulating the data bits coded in accordance with the method, and recording medium having an information structure containing - Google Patents

Method of coding a sequence of blocks of binary data bits into a sequence of blocks of binary channel bits, arrangement for demodulating the data bits coded in accordance with the method, and recording medium having an information structure containing

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Publication number
CA1211570A
CA1211570A CA000381362A CA381362A CA1211570A CA 1211570 A CA1211570 A CA 1211570A CA 000381362 A CA000381362 A CA 000381362A CA 381362 A CA381362 A CA 381362A CA 1211570 A CA1211570 A CA 1211570A
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Prior art keywords
bits
blocks
block
channel
separation
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CA000381362A
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French (fr)
Inventor
Kornelis A. Immink
Hiroshi Ogawa
Jakob G. Nijboer
Kentaro Odaka
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Koninklijke Philips NV
Original Assignee
Kornelis A. Immink
Hiroshi Ogawa
Jakob G. Nijboer
Kentaro Odaka
N.V. Philips'gloeilampenfabrieken
Philips Electronics N.V.
Koninklijke Philips Electronics N.V.
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Application filed by Kornelis A. Immink, Hiroshi Ogawa, Jakob G. Nijboer, Kentaro Odaka, N.V. Philips'gloeilampenfabrieken, Philips Electronics N.V., Koninklijke Philips Electronics N.V. filed Critical Kornelis A. Immink
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/38Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40Transmitting circuits; Receiving circuits
    • H04L25/49Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof

Abstract

ABSTRACT:
The invention relates to the serial transmission of binary data via an information channel and relates in particular to a method of coding and decoding predetermined binary block codes. The invention particularly relates to cases in which the information channel is in the form of an optical disc. In a block coding method, blocks of, for example, m data bits are converted to blocks of n channel bits (n > m). The blocks of information bits thus obtained must satisfy, for example, the requirement of being (d, k)-constrained. In (d, k)-constrained sequences the run length of "zeroes" is limited form a minimum d to a maxi-mum k of zeroes between each pair of consecutive "ones".
This coding has the disadvantage that it has a low-fre-quency spectrum which is too great to be ignored. Accord-ing to the invention, a block of separation bits is included between each of the blocks of n-information bits. In those cases where the format is not prescribed by the (d, k)-constraint the separation bits are chosen such that the low-frequency spectrum and particularly the direct current unbalance is as low as possible.

Description

`. I I
PHI 80 007 l g-12-1980 "method ox coding a sequence of blocks of binary data bits into a sequence of blocks of binary channel bits, arrange-mint for demodulating the data bits coded in accordance with the method, and recording medium having an information structure containing sequences of blocks of binary channel bits."
A. Background of the invention.
A Field of the invention."
The invention relates to a method of coding a sequence of binary data bits into a sequence of binary channel bits, the sequence of data wits hying divided into consecutive and sequential blocks, each comprising m data bits, these blocks being coded into sequential blocks of (n1~n2) channel bits nun m), each of these blocks of channel bits comprising a block of no information bits and lo a block of no separation bits such that sequential blocks of information bits are separated by each time one block of separation bits, two sequential channel bits of` a first type, the type "1" are separated by at least d sequential and consecutive bits of a second type, the type I and 'lo the number of sequential and consecutive channel bits of ' the second type being not more than k. The invention further -relates to a modulator for carrying out the method of coding a sequence of binary data bits into a sequence of binary channel bits; to a conversion circuit comprising the 20 modulator; to a demodulator for decoding the data bits coded in accordance with the method; to a recording medium having an information structure comprising sequences of channel bit cells and to an arrangement for reproducing information bits derived from a transmission channel, a 25 recording medium in particular.
In digital transmission or magnetic and optical recording/reproduction systems the information to be trays-milted or to be recorded is usually in the form of a so-quince of symbols. These symbols together form the (often 30 binary) alphabet. For the case a binary alphabet is con-corned (in the further course of this description -this alphabet is represented by the symbols I and I one symbol, for example the "1", can be recorded in accordance I, :

with the NRZ-mark code as a transition between two states of magnetization or focus on the magnetic disc, tape or optical disc. The other symbol, the "C)'7, is recorded by -the absence of such a transition.
As a result of certain system requirements, con-straits are imposed in practice on the sequences of sum-boys which may occur. Some systems are required to be self-clocking. This implies that the sequence of symbols to be transmit-ted or to ye recorded should have sufficient transitions to generate from the symbol sequence a clock signal which is required for detection and synchronization.
A further requirement may be that certain symbol sequences must not occur in the information signal as these sequences are in-tended for special purposes, for example as a sync chronizing sequence. Imitation of the synchronizing sequence by the information signal cancels the unambiguity of the synchronizing signal and consequently, its suitability for that purpose. It may further be required that the transit lions do not follow too closely after each other in order to limit the inter symbol interference.
In the case of magnetic or optical recording this requirement may also be related to -the information density on the recording medium, as, when at a predetermined minimum distance between two consecutive -transitions on the record-in medium the minimum time interval Twin corresponding therewith of the signal to be recorded may be increased, the information density is increased -to the same extent. Also the required minimum band width Bin is correlated to the minimum distance Twin between transitions (Bin - 2-T - ) When use is made of information channels which do not transmit direct current, as is usually the case with magnetic recording channels this results in the require-mint that the symbol sequences in -the information channel comprise the lowest possible (possibly no) direct current component.
A Description of the prior art.
A method of the type described in -the opening pane-graph is disclosed in reference Do The article relates ,~, .3 ...

57i~

to block codes based on d-, k- or (d, constrained q-r~ary blocks of symbols which blocks satisfy -the follow-iIlg requirements:
(a) d~cons-trainto -two Tao symbols are separated by a run of at least _ consecutive symbols of the "O" -type;
(b) k-constraint: the maximum length of a run of kinesic-live symbols of -tile type "O" is k.
A sequence of, for example binary data bits is divided into consecutive and ~ecLuenl-ial block ? each Levine lo m data bits. These blocks OIL m data bits are coded into blocks of n information bitts (n m). Since no m, the number of combinations with n information bits exceeds the number of possible blocks of data bits (2 ). If, for example, the constraint requirement is imposed on tile blocks of inform lo motion bits to be transmitted or -to be recorded, mapping of -the em blocks of data bitts on-to likewise em blocks of information bits (out of a possible number of on blocks) is chosen so that mapping is only carried out on those blocks of information bits which satisfy the requirement 20 imposed.
Table I on page 439 of reference Do shows how many different blocks of information bits there are, depend ding on the length of the block (n) and -the requirement imposed on d. So, there are 8 blocks of information bitts 25 having a length no at the condition that the minimum distance do Consequently, blocks of data Boyce having a length my (23 = 8 data words) could be represented by blocks of information bits having a length no two cons-cutive "Taipei symbols in the blocks of information bits 30 being separated by at least one Type symbol. For -this example, coding -then is ( indicates mapping of one block onto the other block and vice versa);
000 , 0000 01 1 ' -- --I 0100 100 Jo 0101 101 c --------3 1000 C~7~

110 4 Jo 1001 1 1 1 '- - - --- '1010 When linking up -the block of information bitts it is in some cases, however, hot possible to satisfy -the requirement (in the example the d-con,traint) without taking further measures In the said article it is pro posed -to include separation bitts between the blocks of information bits. or the case of constraint coding one lock of separation biros, comprising dBase of the "Taipei 10 is sufficient. In the above-mentioned example, where d-1, one separation bit (one zero) is therefore sufficient. Each bloat{ of 3 data bitts is then encoded by 5 (4~1) channel bits.
This coding method has the disadvantage that the 15 contribution of the low frequencies (including d c) to the frequency spectrum of` the stream of channel bitts is rather high. A further disadvantage is that -the coding converters (modulator, demodulator), the demodulator in particular, are complicated.
As regards the first disadvantage it should be noted that reference Do indicates that the direct current unbalance of (d, constrained codes can be limited by interconnecting the blocks of channel bits by means of a so-called inverting ox a non-inverting link. Acting thus 25 the sign of the contribution of the instantaneous block of channel bits to -the direct current unbalance is chosen so that the direct current unbalance of the preceding blocks of charnel bits is reduced. However here a (do icon strained code is concerned whose blocks of information bits 30 can be linked-up without coming into conflict with the (d, constraint so that the addition of separation bits for reasons of (d, constraining is not necessary.
By Summary of the invention.
It is an object of the invention to provide a 35 method of the type described in the opening paragraph for the coding of a sequence of binary data bits into a sequent go of binary channel bits which improves -the low frequency spectrum properties of the signal -to be derived from the Jo 57~

channel bits and which method enables the use of a simple demodulator.
The method according to the invention is kirk-terraced in that it comprises the following steps.
1. converting blocks, containing bits of data bits, into blocks, containing n bits, of information bitts,
2. generating a set of possible sequences of channel bits, each sequence comprising at least one block of informal lion bits and one block of separation bits and these possible sequences each comprising the blocks of inform motion bits supplemented by one of -the possible bit come binations of the blocks of separation bits;
3. determining the direct current unbalance of each of -the possible sequences of channel bitts determined in the preceding step,
4. determining for each of the possible sequences of channel bits the sum of the number of separation bits and the number of consecutive and sequential information bits of the type "O" which immediately precede a bit of the "1"
type and the sum of the number following after a bit of the "1" -type, this bit forming part of one of the blocks of separation bits, and the sum of the number of swooper-lion bits and the number of consecutive and sequential information bits of the "O" type immediately preceding and following after that block of separation bits, I generating a first indication signal for those sequences of channel bits the values of the sum determined in the preceding step of which are higher than Ed and no-t more than equal to k, 6. selecting from the sequences of channel bits which resulted in the first indication signal that sequence of channel bits which minimizes the direct current unbalance C. short description of the drawings __ __ _ Embodiments of -the invention end their advantages will now be further described with reference to -the draw-inks In these drawings:
Figure 1 shows some bit sequences for 1111istra-t-in an embodiment of the coding format according lo -the Puke Jo owe G 9- 1 2-198 invention;
Figure 2 shows stone further embodiments of -the format of the channel coding to be llSeCI ill the reduction of the direct current unbalance according -to the invention;
Figure 3 is a flow char-t of` Len embodiment of -the method according to the invention;
Figure 4 illustrates a block of synchronizing bitts for use in the method according to the invention;
Figure 5 SWISS alp ~moocliment of` a llemodulator lo in accordance with the invention for decoding -the data bits which were coded in accordance with the method;
Figure 6 shows an embodiment of the means for detecting a sequence of synchronizing bits according -to -the invention;
lo [I use 7 Chihuahuas an embodiment of a frame - format for use in the method according -to the invention Corresponding elements in the Figures have been given the same reference symbols.
D. References.
-20 (1) Tang, DOT., Bawl, LO "Block codes for a class of con-strained noiseless channels". Information and Control, Vol. 17, no. 5, Dec. 19709 pp.436-461.
(2) Pettily ARM., "Charge-constrained byte-oriented (0,33 code", IBM Technical Disclosure Bulletin, Vow 19, No.
I 7. Dec. 19769 pp.2715-2717.
E. Desert lion of` the embodiments.
P
Figure 1 shows some bit sequences to illustrate the method of coding a run of binary data bits (Figure pa) into a run of binary channel bitts (Figure 1b). The run of 30 data bits it divided in-to consecutive and sequential blocks BY. Each block of data bits comprises m data bits. By way of example, the choice m - 8 will be used in the further course of this description and in the Figures. The same applies, however for any other value of m. A lock of m 35 data bits BDj generally comprises one of` the 2 possible bit sequences.
Such bit sequences are not so suitable for direct optical or magnetic Al recording and -that for several reasons.
i. .

Pluck 80 007 7 When namely -two data symbols of the ~]_11 type, which are for example recorded on the recording medium as a -transition from one magnetizing direction to the other or as a -tray-session to a pit, immediately follow after each another, then these transitions must not be too close to each other in view of their mutual interaction Issue limits the inform motion density. it the same time the minimum band width B which is required to transmit or record the bit stream men is increased when the minimum distance 'Mooney between cons-eutive transitions (Bin 1/(2Tmjn)re~uirement which is often imposed on data transmission and optimal or magnetic Al recording systems is that the bit sequences must have sufficient transitions to recover from the transmit-ted signal a clock signal with which sync ehronization can be carried out. A block having m zeroes,preceded in worst case situations by a block ending in a number of zeros and followed by a block beginning with a number of zeros, would endanger the dock extraction.
Information channels which do not transmit Doherty current, such as magnetic recording channels must Earthier satisfy the requirement that the datcl stream to be recorded comprises a direct current component which is as small as possible. With optical recording it it desirable that the low-frequeney portion of the data spectrum is suppressed to the best possible extent, -this in view of the servo controls. In addition, the demodulation is simplified when the direct current component is relatively small.
For the above and other reasons a so-called channel coding is performed on the data bits before they are transmitted v the channel or before they are recorded.
In the case of block coding (reference Do the blocks of data bits which each contain m bits are coded as blocks of information bits which each comprise no information bitts.
Figure 1 shows how the block of data bits Bid is converted into a block of information bits Byway By way of example the choice no - I will be used in the further course of this description and in the Figures. us no is greater than m, no-t all -the combinations which can be formed _ with no bits are utilized those combinations which do not fit in well with -the channel -to be utilized are not used So, in -the example given only 256 word, need to be selected from -the more than 16.000 possible channel words for the required one-to-one mapping of data words on-to channel words. Consequently, some requirements may be imposed on the channel words. One requirement is that between two con-secutive information bits of a first -type, the "1" type, at least d sequential and consecutive information bits of one type, the 'JO" -type are situated within the same block of no information bitts. Table I on page 439 of reference Do shows how many such binary words there are, depending on -the value of d. It appears from the table that for no = 14 -there are 277 words with a-t least -two do bitts of the "O" -type between consecutive bits (of -the "1" type.
When coding blocks of eight data bits of which there may be 2 = 256 combinations, as blocks of 14 channel bitts the requirement do can therefore be amply satisfied.
Catenation of the block of information bits Bit is, however, not possible without further measures when the same requirements of d constrained is no-t only imposed within a block of no bits but also extends over the bound defy between two consecutive blocks. To -this end, reference Do proposes (page 451~ -to include one or more separation bits between the blocks of channel bits. It can be easily seen that when a number of "O" type separation bits at least equal to d is included, that the d-constraint is satisfied. Figure 1 shows that a block of channel bitts BCi consist of the bloc of information bits Bit and a block of separation bits BSi. The block of separation bits comprises no bits so that the block of channel bitts BCi comprises no no bits. By way of example the choice no = 3 will be used in the further course of the description and in -the Figures, unless indicated differently.
In order -to make -the clock generation as reliable as possible a further requirement may be that -the maximum number of "O" -type bitts which may occur uninterruptedly between two consecutive "1" type hits within one block of I

information bits is limited to a predetermined value k. In the example where my and nl=14 it is possible to eliminate from the 277 words which satisfy do those words, for example which have a very high value for k. It appears that k may be limited to 10. Consequently, a set of 28 (in general em) blocks of data bits of 8 bits each (in general m) is mapped onto a set of also 28 (in general em) blocks of information bits/ which information bits have been selected from 214 (in general 2nl) possible blocks of information bits, which is partly the result of the fact that the following requirements have been imposed: do and k=10 (in general do k-constrained). It is still at one's option which one of the blocks of data bits is to be also-elated with one of the blocks of information bits. In the above-mentioned reference (Do) a number translation from data bits to information bits is unambiguously determined in a mathematically closed form. Although this translation can, in principle, be used, preference is given to a different association as will be further explained herein-after.
Catenation of the furthermore k-constrained chant not words It is only possible, which also applies for the d-constrained blocks, when separation blocks have been arranged between the blocks of information bits Bit. In principle the same separation blocks of no bits each can be used for this purpose as the requirements d-constrained and k-constrained are not each others opposite, but are rather complementary. when, consequently, the sum of the number of bit values of the "O" type preceding a given separation block exceeds the number of values following after that separation block and the no bits of the swooper-lion block itself exceed the value _, -then at least one of the bit values of the "O" type of the separation block should be replaced by a bit value of the "l" type in order to split the sequence of heroes into sequences which are each not more than k bits long.
In addition to their function of ensuring that the requirements of (d, constraint are satisfied the I

separation blocks can be dimensioned so that they can also be utilized for minimizing the direct current unbalance.
This is cased on the recognition of -the fact that for some catenations of blocks of information bits a predetermined format of the block of separation bits is indeed prescribed but that in a large number of cases either no requirements or only limited requirements are imposed on the format of the block of separation bits. The degree of freedom created thus is used for minimizing the current unbalance.
The coming into existence and the growth of the direct current unbalance can be explained as follows. The block of information bits Boil as shown in Figure lb is rev corded on the recording medium, for example in the form of a NRZ-rnark format. With this format a "1" is marked by a transition at the beginning of the relevant bit cell and becomes a "O" when no transition is recorded. The bit sequence shown in Boil then assumes a shape which is denoted by WE, in which shape this bit sequence is recorded on the recording medium. This sequence has a direct current us-balance as for the present sequence the positive level has length which is longer than the negative level A measure which is often used for the direct current unbalance is the digital sum value, abbreviated to d.s.v. Assuming the levels of the wave form to be WE + 1 and -1, respectively, the d.s.v. is then equal to the running integral of the wave form WE and is IT in the example shown in figure 1 , T
being the length of one bit interval. When such sequences are repeated, the direct current unbalance will grow.
Generally, this direct current unbalance results in a base line movement and reduces the effective signal-to-noise ratio and, consequently, the reliability of the detection of the recorded signals The block of separation bits BSi is used as follows to limit the direct current unbalance. At a given instant a block of data bits Bid is supplied. This block of data bits Bid is converted into a block of information bits BIT for example by means of a liable stored in a store.
Thereafter, a set of possible blocks of channel bits/ con-7~3 twining (no + no) bits is generated. All these blocks come prose the same block of information bitts (bit cells 1 to 14, inclusive, Figure lo supplemented by the possible bit combinations of the no separation bits (bit cells 15, 16 and 17~ Figure lb). Consequently in the example shown in Figure lb a set consisting of on _ 8 possible blocks of channel bits is produced. rrhereafter the following pane-meters are determined from each of the possible blocks of channel bits, in principle in an arbitrary sequence:
I a) it is determined for the relevant possible block of channel bits, in view of the preceding block of channel bits, whether the requirement of d-cons-trained and -the requirement of k-constrained do not conflict with the format of the present block of separation bits;
d) determination of the d.s.v. for the relevant, possible block of channel bits.
A first indication signal is generated for those possible blocks of channel bits which do not conflict with the d-constraint and k-constraint requirements. The choice of the coding parameters guarantees that such an indication signal is generated for at least one of -the possible blocks of information bits. Finally, from the possible blocks of channel bits for which a first indication signal has been venerated that block of channel bits is, for example, selected which has in an absolute sense the lowest d.sAv~
However, a still better method is the accumulation of the d.s.v. of the preceding blocks of channel bits and to select from the blocks of channel bits which are eligible for -the next-coming transmission that block which will cause the absolute value of the accumulated d.s.v. -to decrease. The word selected thus is transmitted or recorded.
An advantage of this method is that the separation bits which are already necessary for other purposes can now also be utilized in a simple manner for the limitation of the direct current unbalance. An additional advantage is that the intervention in the signal to be transmit-ted is limited to -the blocks of separation bitts and does no-t ox-tend to the blocks of information bitts (ignoring -the PHI 80 00~ 12 polarity of the wave form to be -transmitted or recorded).
The demodulation of the read, recorded signal -then only relates -to the information bitts, eye separation bits may be left out of consideration.
Figure 2 shows some further embodimerlts of -the method. Figure pa shows schematically -the sequences of blocks of channel bitts .,,, Boil BCi, Boil ..., these blocks comprising a predetermined number of (no + no) bits.
Each block of channel bits comprises blocks of information bits consisting of no bits) and blocks of separation bits...
Boil Boil BSi, Boil ,,., each consisting of no bits, In this embodiment -the direct current unbalance is determined across several blocks for example as shown in Figure pa across two blocks of channel bits BCi and Boil The direct current unbalance is determined in a similar manner as described for the embodiment of Figure 1, on the proviso that the possible formats of super blocks are generated for each super block SBCi, that is to say the blocks of information bits for block BCi and blocks Boil are supplemented by all the possible combinations which can be formed with the no separation bits of blocks BSi and block Boil That combination which minimizes the direct current unbalance is thereafter selected from this set.
This method has the advantage -that the remaining direct current unbalance has a more uniform character as it is considered more than one block of channel bits in advance which intervention is optimum.
An advantageous variant of this method has -the distinctive feature that the super block SBCi (Figure pa) I is shifted one block of channel bits only after the direct current unbalance has been minimized. This means that block BC'i (in Figure aye, which is part of the super block SBCi, is processed and that the subsequent super block SBCi+1 (not shown) contains the blocks Boil and BC'i~2 (not shown) for which the above-described direct current unbalance minimizing operation is performed. So the block BCi+1 is part of both the super block SBCi end the subsequent block SAC It is theft perfectly possible HO 80 007 aye that the (provisional) choice for the separation bits in block Boil made in super block SBCi differs from the ultimate choice made in super block SBCi+l. As each block is assessed several times (twice in the present example) the direct current unbalance and consequently the noise contribution is further reduced Figure 2b shows a further embodiment in which the direct current unbalance is determined for several blocks simultaneously (SBCj), for example as shown in Figure lo 2b for four blocks of channel bits BCj(ll, BCj~2), BCj(3) and BCj(4). Each of these blocks of channel bits comprises a predetermined number of no information bits. However, the number of separation bits comprised in the blocks of separation bits BSj(1~, BSj(2), BSj(3) and BSj( ) is not the same for each block of channel bits. The number of inform motion bits may, for example, amount to 14 and the number of separation bits for the blocks BSjl1), BSj~2) and BSj(3) ox - r may be 2 for each block and 6 for block BSj(4~. Deter-mining the direct current unbalance is carried out in a similar manner as described for the embodiment of figure pa.
In addition -to the advantages already mentioned in the foregoing and which also apply here, this method has the advantage -that the availability of a relatively long block of separation bits increases the possibilities of reducing the direct current unbalance More specifically, the remaining direct current unbalance of a sequence of channel bits in which each block of channel bits comprises an equal number of, for example, 3 bits is larger than the remaining direct current unbalance of a sequence of channel bits -the blocks of separation bits of which comprise an average of 3 bits, divided however into 2-2-2-6 bits.
It should be noted that the described -time so-quinces of functions and associated states of the method can be realized by means of universal sequential logic circuits such as commercially available microprocessors with associated stores and peripheral equipment Figure 3 shows a flow Hart of such an implementation. The following explanatory texts are associated with the legends of the geometrical figures which illustrate, time-sequentially, the functions and states of the coding method. Callahan A
shows the reference symbol, B the legend and column C -the explanatory text associated with the relevant geometrical Figure A B C
1 DISC :=0; the digital sum value (d.s.v) of age.
it the preceding blocks of channel bits is given -the value zero at the start of the method. The first data word BY is given the number it Proceed the geometrical figure 2;
2 Bid The block of data bitts of m bitts of the number i is selected from a store. Proceed to geometrical I
PHI 80 OWE 14 9-l2-1980 figure 3;
3 Bit (Bid) The block of data bits having numb bier i (Bid) -is converted into a block of informatioIl bits consist tying of no bits (Bit) by means of a Table stored in -the store; pro-aced -to geometrical Figure 4;
4 joy A parameter is initiated at a value O; -the parameter l is the number of one of the blocks of channel bits consisting of` n1~n2 bits which is possibly eligible for transmission or recording; pro-aced to geometrical Figure 5;
lo 5 j:=j+1 The parameter l is increased by 1;
proceed to geometrical Figure 6.
6 j I? When the relevant parameters have been determined of all the q posy sidle blocks of channel bitts, operations are continued by the operation indicated by geometrical Figure 13. In geometrical Figure 6 this is indicated by the link N.
When j Q, operations are con-tinted by the operation indicated by geometrical Figure 7;
7 BCi:=BIi+BSj The jut possible block of channel bitts BCi is formed by supplement tying -the block of information bits Bit by the jut combination ox the block of separation bits BSJ; pro-aced to geometrical Figure 8;
8 DSVj=? The d.s.v. of -the jth possible block of charnel bitts is determined proceed to geometrical Figure 9;
9 kj ? It is checked whether the jut posy sidle block of channel bits on catenation with -the preceding blocks S; I

ox channel bitts BCi 1 satisfies the k-constraint requirement, If this requirement is satisfied operations are continued by the operation indicated in geometrical Figure 10 (link N). If this require-mint is not satisfied, then the following step is the operation indicated by geometrical Figure lo 11 (link Ye.
10 Ed? It is checked whether -the j possible block of channel bits on catenation with -the preceding block ox channel bits Sue 1 satisfies the d-constraint requirement. If this requirement is satisfied the following step is the operation indicated by geometrical Figure 12 (link N). When this requirement is not satisfied, then the operation is continued by the step indicated by geometrical Figure 11 (link Y);
11 DSV~J):=max The d.s.v. of the jth block ox channel bits is given such a high value (Max) that this block can definitely not be selected; pro-aced to geometrical Figure 12;
12 DS~(Ci) -DSV(j)~ The d.s.v. ox the j block of DSVaCc channel 'bits (dsv~i) is added to the accumulated dsv (DSVacc) of -the preceding blocks of channel bits to obtain a new accumulated value of the d.s.v. (DSV(J); pro-aced to geometrical Figure 5; 5 13 mix /DSV:=DSV(e) The minimum value ox the dsv ox the q possible 'blocks of channel bits is determined. This appears to be the d.s.v. ox the first Puke 80 007 IT I 19~0 bleakly of` channel bits (Proceed to gnome t Rockwell Figure I
lo BY The first block of channel bitts is selected from the q possible bloats;
proceed to geometrical figure 15;
DS~Tacc ~DSV( ) The accumulated value ox` the d so (DSVacc) is made equal to the accumulated -value of the do of the selected first block owe inform motion bitts; proceed -to gnome Roy-eel Figure 16;
16 it 1 The number of the blocks of data and information Boyce is increased by one. Proceed to geometrical Figure 2; the cycle is now repeated for -the next, the it block of data bits.
The slow chart shown above is applicable to the embodiment shown in Figure 1. For the embodiments ox Figure the corresponding flow charts hold, talking the modifica-lions already described into consideration.
In order to enable a distinction when demodulate in the transmitted or recorded stream of channel bits be-tweet the information bits and the separation bits (n3+n4) 25 namely no synchronizing information bits and nil swanker-sizing separation bitts, are included in the stream of channel bits blocks. A block of synchronizing bits is, for example, inserted after each predetermined number of blocks of information and separation bits. After detection of this 30 word it can then be unambiguously determined in which bit position information bits and in which bit positions so-parathion bits are present. Measures should therefore be -taken to prevent the synchronization word from being imitated by certain bit sequences in the information and 35 separation blocks. To this end a ionic block owe swanker-sizing bits, that is to say synchronizing bits which are not present in information and separation bit sequences can be chosen. Sequences which do no-t satisfy the require-Al PI-IQ 80 007 17 9-12-l~80 rent of being d-constrained or k-constrained are not so attractive or this purpose as the information density or the self clocking properties are when affected negatively.
However the choice is very loomed WE -thin the group of sequences itch satisfy -the (d, k)-coIlstraint requirements.
different method is therefore proposed. The block of synchronizing bits includes, or example, at least two times in succession and consecutively a sequence which comprises S bits of the "Taipei between -two sequent trial bits of the "Taipei. Preferably, S is equal to k.
Figure 4 shows a bloclc of synchronizing bits SUN. The block comprises two times in succession and consecutively a so-quince (10000000000, 1 followed by 10 zeros) denoted by SUE and SUNUP respectively. This sequence may also be 15 present in -the channel bit stream, namely for sequences where h-10. ivory, to prevent the sequence from occurring two times in succession and consecutively outside the block of synchronizing bits, the first indication signal is suppressed when the sum of the number of separation bits 20 and the number of sequential and consecutive information bits of the "0" type immediately proceeding a bit of the "1" type, the latter forming part of the block of separation bits, is equal to k and also equal to the sum of the number of consecutive and sequential information bits of the "0"
25 -type which immediately follows after the said bit of the "1" type of the block of separation bits. The other, at-ready indicated way to prevent imitation would be to use two times in succession the sequence 100000000000 thus 1, followed by 11 zeros.
In addition, the block of synchronization bits also comprises a block of synchronization separation bits.
The function of the block of separation bits is exactly the same as the function described in the foregoing of the block of` separation bits between the blocks of information 35 bits. (consequently they have for their purpose to satisfy the (d, constraint and a limited direct current unbalance requirement. The measures which are taken -to prevent the synchronizing pattern frombeiIlg imitated yin the run of lo A So channel bits as it occllrs -Tao telex in succession and con-secutively, these same measures also pronto this pattern from occurring three times before or after the block of synchronizing bits.
The above-described method, Thigh may also be referred to as modulating or encoding, is of a considerably simpler character in the opposite direction, -that is -to say during demodulation or decoding. Limitation of -the direct current unbalance is effected without affecting the lo blocks of information bits, so that the information in -the separation blocks is irrelevant for demodulating the information In addition, the choice taken at the modulator end which m bit long block of data bits is associated with which no long block of information bit is of importance 15 not only for the modulator but also for the demodulator.
Amelia the complexity of the demodulator depends on this choice. In magnetic recording systems -the complexity of modulator and demodulator are of equal importance as they are in general both present in -the apparatus. In systems 20 for optical record ng3 the recording medium is of the "read-only" type so that the consumer equipment need only comprise a demodulator. So in this latter case it is particularly important to reduce the complexity of the demodulator as much as possible even at the cost of the complexity of the 25 modulator-Figure 5 shows an embodiment of a demodulator which demodulates the blocks of 8 data bitts from blocks of 14 information bitts. Figure pa shows the block schematic circuit diagram of the demodulator. The demodulator comprises AND-gates 17-0 to 17~51, inclusive, each having one or more inputs. One of the 14 bitts of the blocks of information bits is applied -to each input, which are of the inverting or non inverting -type. Figure 5b shows in 35 column Of how -this is carried out. Column 1 represents the least significant bit position C1 of the 14 bit inform motion block, column 14 the most significant bit position CLUE and the intermediate columns 2 to 13, inclusive no-pi PUKE 80 007 19 ~12-1980 present the remailing, corresponding Will tile bit position significant bit positions. The lines O owe I inclusive relate to -the number of -the AND-gate, thaw is -to say line O relates -to the input format of AND-gate -lo O, line 1 relates to the input format of Andante '17-19 etc. A
symbol 1 in the i column of line I signified that the j l~ND-gate 17 is supplied via a ilon~inverting input with -the content of -the i bit position By. A symbol O in the i column of line i signifies that the j Date -lo is supplied via an inverting input with the content of the i bit position (Of). Consequently, (line 0)9 an inverting input of Agate 17-0 is connected to -the i bit position (C1), and a non-inverting input is connected to the 4 bit position (CLIP); (line 1) a non-inverting input of ED-
5 gate 17-0 is connected to the 3 bit position, C3); etc.
The demodulator further _olnprises 8 Orates 18-1 -to 18-8~ inclusive, the inputs o-f which are connected to the outputs of the AND gates 17-0 -to 17-51, inclusive.
no 5b shows ion column At ho this is realized. Column 20 Awl relates to AND-gate 18-1~ column A relates to AND-gate 18-~, ... and column A replates -to Date 18-8, A.
locator A in the it column of the jth line inducts that the output ox AND-gate 17-j is connected to the input of OR-gate 18-i.
For the AND-gates 17-50 and 17-51 the circuit is modified as follows. An inverting output of both AND-gate 17-50 and 17-51 are each collected to an input of a further ~UND-gate 19. An output of OR-circuit 18-4 is connected to a further input ox Negate 19.
Each output of the OR-gates 18-1 9 18-2, 18-3 and 18-5 to 18-8, inclusive, and an output of AND-gate 19 are connected to an output 20~i. The decoded block of 8 data bits is consequently available in parallel fornl at this output.
The demodulator shown in logger pa may, alter-natively be in the form of a so-called ELLA (field pro-grumble logic array), for example the Signetics 'bipolar PLY type 82S100/82S10l. The Table shown in Eigllre 5 is the PUKE I 007 ''I 9-12-1980 programmable table for this array.
The lemodulator shown in Logger is, because of its simplicity eminently suitably for optical record ding systems ox the "read-only" type.
The block of synchronizing bits can be detected with the means shorn in Figure 6. The transmitted or read recorded signal is applied to an input terminal 21. The signal is in the (ark) format. This signal is applied directly to a first input of an OR-gate ''2 and -to a second lo input of OR-gate 23 via a delay clement 23. A so-called NAZI signal is then available at the output of` OR gate 22, which is connected to the input of a shift register 24. The shift register comprises a number of sections, each having a tap, which number is equal to the number of I bits comprised in the block of synchronizing bits. In the example used in the foregoing, the shift register must have 23 sections a namely in order to be able -to contain the sequence 10000000000100000000001. Each tap is connected to an input of an AND-gate 25, which input is either an in-20 venting or a non-inverting input. When the synchronization sequence is present at the inputs of Negate 25, a signal will then be generated at an output 26 of this AND-gate which may be used as an incaution signal for the detection of the synchronizing pattern. By means of this signal the 25 bit stream is divided in two blocks of (n1-~n2) bits eke These blocks of channel bits are shifted, one after the other, in a further shift register. The most sifnigicant no bits are read in parallel and applied to the inputs of the AND-gates 17, as shown in Figure pa. The least sign-30 ficant no bits are irrelevant for the demodulation.
The coded signal is, for example, recorded on antiquely recording medium. The signal has a form denoted by IF in Figure 1b The signal is applied on the recording medium in a helical information structure The information 35 structure comprises a sequence of a number of super blocks, for example ox the type shown in Figure 7. A super block Ski comprises a block of synchronizing bits Sync, this block being implemented as shown ill Fig ire 4, and a number (33 in the embodiment) of blocks of channel bits, each having (nl-~n2) bits BCI, BC2, ... BC33. A channel bit of the "1" type is represented by a transition in the record-in medium, for example a transition from no-pit to pit; a channel bit of the "O" type is represented on -the record in medium by the absence of a transition. The helical information track is subdivided into eliminator cells, the bit cells. On the recording medium these bit cells form a spatial structure, which corresponds to a subdivision in the time (period time of one bit) of -the stream of channel bits.
Independent of the content of the information and separation bits, a number of details can be distinguished a-t the recording medium. For the medium the k-constraint implies that the maximum distance between two consecutive transitions is clue bit cells. The longest pit (or no-pit) has therefore a length of (clue) bit cells. The d-constraint implies that the minimum distance between the two kinesic-live transitions is do The shortest bit (or no-pit) has therefore a length of do bit cells. Furthermore, at regular distances, there is a pit of the maximum length followed by (or preceded by) a no-pit of the maximum length. This structure is part of the block of the sync chronization bits.
In a preferred embodiment k=10, do and a super-block Ski comprises 588 channel bit cells. The super block Ski comprises a block of synchronization bits of 27 bit cells and 33 blocks of channel bit cells, each having 17 (14+3) channel bit cells.
A modulator, a transmission channel, for example an optical recording medium, and a demodulator may together be part of a system, for example a system for the conversion of analog information (music, speech) into digital inform motion, which information is recorded on an optical record-in medium. The information recorded on the recording medium (or a copy thereof) can be reproduced by means of an arrangement which is suitable for the reproduction of -the type of information which has been recorded on -the "1~3 recording medium The conversion circuit comprises in particular an analog-to--digital converter for converting the analog signal music, speech) to be recorded into a digital sign net of a predetermined format (source kidding In add-lion, the conversion circuit may include a portion of an error-correction system, In the conversion circuit the digital signal is converted into a format by means of which the errors which particularly occur during reading of the recording median can be corrected in the arrange-mint for the reproduction of the signals. An error eon-reaction system which is suitable for this purpose is disk closed in Applicant's Canadian Patent No. 1,163,3~1 issued March 6, 19~4.
The digital, error-protected signal is there-after applied to -the modulator described in the foregoing (channel coding) for conversion into a digital signal which is adapted to the channel properties. In addition the synchronization pattern is supplied and the signal is brought -to a suitable frame format, The signal thus obtained is used to generate a control signal, for example for a laser (N~Z-mark format) by means of which a helical information structure is applied on the recording medium in the form of a sequence of pits/no pits of a predator-mined length The recording medium or a copy thereof can bread by means of an arrangement for the reproduction of the information bit derived from the recording medium.
To this end the arrangement comprises a modulator, which has already been described in detail, the decoder portion of the error correction system and a digital/analog con-venter for reconstituting a replica of the analog signal which is applied to the conversion circuit.

I

Claims (13)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. A method of minimizing the direct current unbal-ance in a data information handling system comprising cod-ing a sequence of binary data bits into a sequence of binary channel bits, this sequence of data bits being divided into consecutive and sequential blocks, each com-prising m data bits, these blocks being coded into sequen-tial blocks of (n1 + n2) channel bits (n1 + n2) > m, each of these blocks of channel bits comprising a block of n1 information bits and a block of n2 separation bits such that sequential blocks of information bits are separated by each time one block of separation bits, two sequential channel bits of a first type, the type "1", are separated by at least d sequential and consecutive bits of a second type, the type "0", and the number of sequential and con-secutive channel bits of the second type being not more than k, characterized in that the method comprises the following steps:
-1- converting blocks, containing m-bits of data bits into block containing n1 bits of information bits;
-2- generating a set of possible sequences of channel bits, each sequence comprising at least one block of information bits and one block of separation bits and these possible sequences each comprising the blocks of information bits supplemented by one of the possi-ble bit combinations of the blocks of separation bits;
-3- determining the direct current unbalance of each of the possible sequences of channel bits determined in the preceding step;
-4- determining for each of the possible sequences of channel bits the sum of the number of separation bits and the number of consecutive and sequential informa-tion bits of the "0" type which immediately precede a bit of the "1" type and the sum of the number follow-ing after a bit of the "1"-type, this bit forming part of one of the block of separation bits, and the sum of the number of separation bits and the number of con-secutive and sequential information bits of the "0"
type immediately preceding and following after that block of separation bits.
-5- generating a first indication signal for those channel bit sequences the values of the sums determined in the preceding step of which are higher than d and not more than equal to k.
-6- selecting from the sequences of channel bits which resulted in the first indication signal that sequence of channel bits which minimizes the direct current unbalance.
2. A method as claimed in Claim 1, characterized in that the fifth step comprises the following sub-step:
-5a- suppressing the first indication signal for that sequence of channel bits for which the sum, determined in the fourth step, of the number of separation bits and the number of consecutive and sequential informa-tion bits of the "0"-type immediately preceding a bit of the "1" type of the block of separation bits is equal to the sum, which was also determined in the fourth step, of the number of separation bits and the number of consecutive and sequential information bits of the "0" type which immediately follows after a bit of the "1" type of the block of separation bits, this sum being equal to s;
and in that the method further comprises the following steps:
-7- dividing a sequence of blocks of (n1 + n2) channel bits into consecutive and sequential frames, each having p blocks;
-8- inserting a block of synchronization channel bits between every two sequential frames, this block of synchromization channel bits comprising a predeter-mined block of n3 synchronization information bits, this block comprising at least two times in succession and consecutively a sequence which comprises, between two sequential bits of the "1" type, s bits of the "0"

type and furthermore comprising a block of n4 synchro-nization separation bits, this block of separation bits being determined by carrying out the steps -2- to -6-, inclusive, with respect to the block of synchro-nization channel bits.
3. A method as claimed in Claim 2, characterized in that s=k.
4. A method as claimed in Claim 1 or 20 character-ized in that the sixth step comprises the further sub-steps:
- determining the accumulated direct current unbalance of the preceding blocks of channel bits;
- determining the absolute value of the sum of the accumu-lated direct current unbalance and the direct current unbalance of each of the sequences of channel bits which resulted in the first indication signal.
5. A method as claimed in Claim 1, characterized in that the sequence of channel bits comprises four blocks of information bits each having n1 bits and four blocks of separation bits, in that three blocks of separation bits have a first length n2' and one block a length n2'' and that n2'' > n1'.
6. A method as claimed in Claim 5, characterized in that n1 = 14, n2' = 2, n2'' = 6 and m = 8.
7. A method as claimed in Claim 1, characterized in that the sequence of channel bits comprises one block of information bits having n1 bits and a block of separation bits having n2 bits.
8. A method as claimed in Claim 7, characterized in that n1 = 14, n2 = 3 and m = 8.
9. A method as claimed in Claim 1, 3 or 4, charac-terized in that the sequence of channel bits is formed by at least two blocks of channel bits and that consecutive sequences of channel bits jointly relate to at least one block of channel bits.
10. A demodulator for decoding the data bits coded in accordance with the method claimed in Claim 2, character-ized in that the demodulator comprises:

- means for detecting the synchronizing pattern;
- means for dividing the run of channel bits into blocks each having (n1 + n2) channel bits;
- means for separating the blocks having n1 information bits from the blocks having n2 separation bits;
- means for converting a block of n1 information bits into a block of m data bits.
11. A demodulator as claimed in Claim 10, character-ized in that the conversion means comprise AND-gates, each AND-gate having inputs to which there are applied in par-allel the information bits coming from at least one pre-determined bit position of the blocks of information bits in that the means further comprise OR gates having inputs which are connected in a predetermined manner to the out-puts of the AND-gates and that these OR-gates further have outputs for outputting the decoded AND-gate bits in par-allel.
12. A recording medium having an information struc-ture comprising sequences of channel bit cells, as claimed in claim 1 these chan-nel bit cells each comprising a binary data bit which is represented by a level transition or no level transition at the beginning of the bit cell, characterized in that the maximum distance between two consecutive transitions is equal to the length of (k+1) bit cells, in that the minimum distance between two consecutive transitions is equal to the length of (d+1) bit cells, that sequences of not more than two times the maximum distance of (k+1) bit cells are present, and in that the said sequences are part of a syn-chronizing sequence.
13. A recording medium as claimed in Claim 12, char-acterized in that k=10, d=2; in that the recording medium comprises between two consecutive sequences which are at the maximum distance from each other a frame having 561 channel bit cells, this frame comprising 33 blocks each having 17 channel bit cells and in that the synchronizing sequence comprises 27 channel bit cells.
CA000381362A 1980-07-14 1981-07-08 Method of coding a sequence of blocks of binary data bits into a sequence of blocks of binary channel bits, arrangement for demodulating the data bits coded in accordance with the method, and recording medium having an information structure containing Expired CA1211570A (en)

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NL8004028 1980-07-14

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Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1147858A (en) * 1980-07-16 1983-06-07 Discovision Associates System for recording digital information in a pulse-length modulation format
JPS5846751A (en) * 1981-09-11 1983-03-18 Sony Corp Binary code modulating method and recording medium and its reproducer
NL8200207A (en) * 1982-01-21 1983-08-16 Philips Nv METHOD OF ERROR CORRECTION FOR TRANSFERRING BLOCK DATA BITS, AN APPARATUS FOR CARRYING OUT SUCH A METHOD, A DECODOR FOR USE BY SUCH A METHOD, AND AN APPARATUS CONTAINING SUCH A COVER.
NL8203575A (en) * 1982-09-15 1984-04-02 Philips Nv METHOD FOR CODING A STREAM OF DATA BITS, DEVICE FOR CARRYING OUT THE METHOD AND DEVICE FOR DECODING A STREAM DATA BITS.
GB2141906A (en) * 1983-06-20 1985-01-03 Indep Broadcasting Authority Recording of digital information
JPH0683271B2 (en) * 1983-10-27 1994-10-19 ソニー株式会社 Information conversion method
JPS60113366A (en) * 1983-11-24 1985-06-19 Sony Corp Information conversion system
JPS60128752A (en) * 1983-12-16 1985-07-09 Akai Electric Co Ltd Digital modulation system
NL8400212A (en) * 1984-01-24 1985-08-16 Philips Nv METHOD FOR CODING A STREAM OF DATA BITS, APPARATUS FOR PERFORMING THE METHOD AND DEVICE FOR DECODING THE FLOW BITS OBTAINED BY THE METHOD
JPS6122474A (en) * 1984-07-10 1986-01-31 Sanyo Electric Co Ltd Synchronizing signal recording method
EP0193153B1 (en) * 1985-02-25 1991-11-13 Matsushita Electric Industrial Co., Ltd. Digital data recording and reproducing method
US4675650A (en) * 1985-04-22 1987-06-23 Ibm Corporation Run-length limited code without DC level
DE3529435A1 (en) * 1985-08-16 1987-02-26 Bosch Gmbh Robert METHOD FOR TRANSMITTING DIGITALLY CODED SIGNALS
NL8700175A (en) * 1987-01-26 1988-08-16 Philips Nv METHOD FOR TRANSFERRING INFORMATION BY CODE SIGNALS, INFORMATION TRANSMISSION SYSTEM FOR CARRYING OUT THE METHOD, AND TRANSMITTING AND RECEIVING DEVICE FOR USE IN THE TRANSMISSION SYSTEM.
DE69026904T2 (en) * 1989-10-31 1997-01-02 Sony Corp Circuit for digital modulation
JP2805096B2 (en) * 1989-10-31 1998-09-30 ソニー株式会社 Digital modulation method and demodulation method
CA2044051A1 (en) * 1990-06-29 1991-12-30 Paul C. Wade System and method for error detection and reducing simultaneous switching noise
JPH0730431A (en) * 1993-04-02 1995-01-31 Toshiba Corp Data modulating/demodulating system and modulator/ demodulator
EP0655850A3 (en) * 1993-10-28 1995-07-19 Philips Electronics Nv Transmission and reception of a digital information signal.
DE69526392D1 (en) * 1994-07-08 2002-05-23 Victor Company Of Japan Digital modulation / demodulation method and apparatus for using the same
EP0991069B1 (en) * 1998-09-15 2001-03-28 Gerhard Prof. Dr. Seehausen Method and apparatus for coding digital information data and recording medium with structure of information obtained with that method
WO2000057417A1 (en) 1999-03-23 2000-09-28 Koninklijke Philips Electronics N.V. Method of decoding a stream of channel bits of a signal relating to a binary channel signal into a stream of source bits of a signal relating to a binary source signal
EE200000688A (en) 1999-03-23 2002-04-15 Koninklijke Philips Electronics N.V. Media, Encoder, Encoder, Decoder, and Decoder
CN100574116C (en) 1999-05-19 2009-12-23 三星电子株式会社 Turbo-interleaving device and method
US6721893B1 (en) 2000-06-12 2004-04-13 Advanced Micro Devices, Inc. System for suspending operation of a switching regulator circuit in a power supply if the temperature of the switching regulator is too high

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3215779A (en) * 1961-02-24 1965-11-02 Hallicrafters Co Digital data conversion and transmission system
GB1540617A (en) * 1968-12-13 1979-02-14 Post Office Transformation of binary coded signals into a form having lower disparity
DE1963945A1 (en) * 1969-12-20 1971-06-24 Ibm Encoder
JPS5261424A (en) * 1975-11-17 1977-05-20 Olympus Optical Co Ltd Encode system
JPS5356917A (en) * 1976-11-02 1978-05-23 Olympus Optical Co Ltd Coding system
JPS5570922A (en) * 1978-11-21 1980-05-28 Mitsubishi Electric Corp Demodulation system of digital signal

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