CA1200319A - Register control processing system - Google Patents

Register control processing system

Info

Publication number
CA1200319A
CA1200319A CA000431511A CA431511A CA1200319A CA 1200319 A CA1200319 A CA 1200319A CA 000431511 A CA000431511 A CA 000431511A CA 431511 A CA431511 A CA 431511A CA 1200319 A CA1200319 A CA 1200319A
Authority
CA
Canada
Prior art keywords
register
registers
instruction
virtual
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000431511A
Other languages
English (en)
French (fr)
Inventor
Toshio Matsumoto
Kiyosumi Sato
Motokazu Kato
Yoshihiro Mizushima
Katsumi Ohnishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of CA1200319A publication Critical patent/CA1200319A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30043—LOAD or STORE instructions; Clear instruction
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30101—Special purpose registers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30138—Extension of register space, e.g. register cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System (AREA)
CA000431511A 1982-06-30 1983-06-29 Register control processing system Expired CA1200319A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP57-113470 1982-06-30
JP57113470A JPS593642A (ja) 1982-06-30 1982-06-30 制御レジスタ処理方式

Publications (1)

Publication Number Publication Date
CA1200319A true CA1200319A (en) 1986-02-04

Family

ID=14613061

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000431511A Expired CA1200319A (en) 1982-06-30 1983-06-29 Register control processing system

Country Status (9)

Country Link
US (1) US4623962A (enExample)
EP (1) EP0098172B1 (enExample)
JP (1) JPS593642A (enExample)
KR (1) KR890000100B1 (enExample)
AU (1) AU546572B2 (enExample)
BR (1) BR8303527A (enExample)
CA (1) CA1200319A (enExample)
DE (1) DE3379848D1 (enExample)
ES (1) ES523751A0 (enExample)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5960652A (ja) * 1982-09-30 1984-04-06 Fujitsu Ltd デ−タ処理装置
US5249266A (en) * 1985-10-22 1993-09-28 Texas Instruments Incorporated Data processing apparatus with self-emulation capability
US5140687A (en) * 1985-10-22 1992-08-18 Texas Instruments Incorporated Data processing apparatus with self-emulation capability
US5293631A (en) * 1991-08-06 1994-03-08 Hewlett-Packard Company Analysis and optimization of array variables in compiler for instruction level parallel processor
US5666556A (en) * 1993-12-30 1997-09-09 Intel Corporation Method and apparatus for redirecting register access requests wherein the register set is separate from a central processing unit
US5758117A (en) * 1995-12-14 1998-05-26 International Business Machines Corporation Method and system for efficiently utilizing rename buffers to reduce dispatch unit stalls in a superscalar processor
US6298435B1 (en) * 1996-04-16 2001-10-02 International Business Machines Corporation Methods and apparatus for exploiting virtual buffers to increase instruction parallelism in a pipelined processor
US6003126A (en) * 1997-07-01 1999-12-14 International Business Machines Special instruction register including allocation field utilized for temporary designation of physical registers as general registers
GB2460280A (en) * 2008-05-23 2009-11-25 Advanced Risc Mach Ltd Using a memory-abort register in the emulation of memory access operations
US9229745B2 (en) 2012-09-12 2016-01-05 International Business Machines Corporation Identifying load-hit-store conflicts
US10761983B2 (en) * 2017-11-14 2020-09-01 International Business Machines Corporation Memory based configuration state registers
US10592164B2 (en) 2017-11-14 2020-03-17 International Business Machines Corporation Portions of configuration state registers in-memory
US10901738B2 (en) * 2017-11-14 2021-01-26 International Business Machines Corporation Bulk store and load operations of configuration state registers
CN116226021B (zh) * 2023-05-06 2023-07-25 摩尔线程智能科技(北京)有限责任公司 数据收发方法、装置以及图形处理器

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3701107A (en) 1970-10-01 1972-10-24 Rca Corp Computer with probability means to transfer pages from large memory to fast memory
US3902164A (en) 1972-07-21 1975-08-26 Ibm Method and means for reducing the amount of address translation in a virtual memory data processing system
US4010451A (en) 1972-10-03 1977-03-01 National Research Development Corporation Data structure processor
JPS5615066B2 (enExample) 1974-06-13 1981-04-08
US4351024A (en) * 1975-04-21 1982-09-21 Honeywell Information Systems Inc. Switch system base mechanism
JPS52149444A (en) 1976-06-08 1977-12-12 Fujitsu Ltd Multiplex virtual space processing data processing system
US4136385A (en) 1977-03-24 1979-01-23 International Business Machines Corporation Synonym control means for multiple virtual storage systems
JPS5439539A (en) * 1977-09-05 1979-03-27 Hitachi Ltd Data processor
US4355355A (en) 1980-03-19 1982-10-19 International Business Machines Corp. Address generating mechanism for multiple virtual spaces
JPS5853079A (ja) 1981-09-25 1983-03-29 Fujitsu Ltd Ｓｔｏスタツク制御方式

Also Published As

Publication number Publication date
BR8303527A (pt) 1984-02-07
ES8405176A1 (es) 1984-05-16
EP0098172A2 (en) 1984-01-11
EP0098172A3 (en) 1985-10-09
KR890000100B1 (ko) 1989-03-07
JPS593642A (ja) 1984-01-10
JPH0517577B2 (enExample) 1993-03-09
EP0098172B1 (en) 1989-05-10
AU546572B2 (en) 1985-09-05
US4623962A (en) 1986-11-18
DE3379848D1 (en) 1989-06-15
ES523751A0 (es) 1984-05-16
AU1640983A (en) 1984-01-05

Similar Documents

Publication Publication Date Title
CA1200319A (en) Register control processing system
US4975836A (en) Virtual computer system
EP0026590B1 (en) Improved memory protection system using capability registers
US8479050B2 (en) Identifying access states for variables
US7269718B2 (en) Method and apparatus for verifying data types to be used for instructions and casting data types if needed
US5335334A (en) Data processing apparatus having a real memory region with a corresponding fixed memory protection key value and method for allocating memories therefor
CN1877547B (zh) 提供扩展的存储器保护
Case et al. Architecture of the IBM System/370
US7712104B2 (en) Multi OS configuration method and computer system
JP2960415B2 (ja) 記憶保護方法および装置
US5038281A (en) Acceleration of system interrupts between operating systems in guest-host relationship
US4679140A (en) Data processor with control of the significant bit lengths of general purpose registers
US20080229156A1 (en) Method and Apparatus for Hardware Awareness of Data Types
EP0213843A2 (en) Digital processor control
EP0130467A2 (en) Efficient trace method adaptable to multiprocessors
US4866599A (en) Call instruction, return instruction and trap procedure for ring crossing architecture
EP0137191A2 (en) Virtual machine system controller
KR20070080589A (ko) 메모리 속성들을 사용하기 위한 기술
CN114297101A (zh) 一种记录内存访问来源的方法及系统
US20060149940A1 (en) Implementation to save and restore processor registers on a context switch
JPH0883193A (ja) インサーキットエミュレータ
US7328374B2 (en) Method and apparatus for implementing assertions in hardware
US5463778A (en) User controlled trap handler
CN113553145B (zh) 一种对象访问的方法及装置
CA1267442A (en) Information processing system with enhanced instruction execution and support control

Legal Events

Date Code Title Description
MKEX Expiry