CA1078077A - Self-registering method of fabricating field effect transistors - Google Patents

Self-registering method of fabricating field effect transistors

Info

Publication number
CA1078077A
CA1078077A CA279,093A CA279093A CA1078077A CA 1078077 A CA1078077 A CA 1078077A CA 279093 A CA279093 A CA 279093A CA 1078077 A CA1078077 A CA 1078077A
Authority
CA
Canada
Prior art keywords
layer
source
drain regions
gate electrode
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA279,093A
Other languages
English (en)
French (fr)
Inventor
Robert H. Dennard
Vincent L. Rideout
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of CA1078077A publication Critical patent/CA1078077A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6304—Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6306—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials
    • H10P14/6308—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors
    • H10P14/6309—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors of silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6322—Formation by thermal treatments
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/662—Laminate layers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/694—Inorganic materials composed of nitrides
    • H10P14/6943—Inorganic materials composed of nitrides containing silicon
    • H10P14/69433—Inorganic materials composed of nitrides containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/975—Substrate or mask aligning feature

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Formation Of Insulating Films (AREA)
CA279,093A 1976-06-30 1977-05-25 Self-registering method of fabricating field effect transistors Expired CA1078077A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/701,442 US4035198A (en) 1976-06-30 1976-06-30 Method of fabricating field effect transistors having self-registering electrical connections between gate electrodes and metallic interconnection lines, and fabrication of integrated circuits containing the transistors

Publications (1)

Publication Number Publication Date
CA1078077A true CA1078077A (en) 1980-05-20

Family

ID=24817396

Family Applications (1)

Application Number Title Priority Date Filing Date
CA279,093A Expired CA1078077A (en) 1976-06-30 1977-05-25 Self-registering method of fabricating field effect transistors

Country Status (7)

Country Link
US (1) US4035198A (ref)
JP (1) JPS533780A (ref)
CA (1) CA1078077A (ref)
DE (1) DE2723374A1 (ref)
FR (1) FR2357066A1 (ref)
GB (1) GB1520718A (ref)
IT (1) IT1115346B (ref)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5293278A (en) * 1976-01-30 1977-08-05 Matsushita Electronics Corp Manufacture for mos type semiconductor intergrated circuit
FR2398386A1 (fr) * 1977-07-18 1979-02-16 Mostek Corp Procede et structure pour faire se croiser des signaux d'information dans un dispositif a circuit integre
US4216573A (en) * 1978-05-08 1980-08-12 International Business Machines Corporation Three mask process for making field effect transistors
US4192059A (en) * 1978-06-06 1980-03-11 Rockwell International Corporation Process for and structure of high density VLSI circuits, having inherently self-aligned gates and contacts for FET devices and conducting lines
US4208597A (en) * 1978-06-22 1980-06-17 Westinghouse Electric Corp. Stator core cooling for dynamoelectric machines
DE2902665A1 (de) * 1979-01-24 1980-08-07 Siemens Ag Verfahren zum herstellen von integrierten mos-schaltungen in silizium-gate- technologie
DE2923995C2 (de) * 1979-06-13 1985-11-07 Siemens AG, 1000 Berlin und 8000 München Verfahren zum Herstellen von integrierten MOS-Schaltungen mit MOS-Transistoren und MNOS-Speichertransistoren in Silizium-Gate-Technologie
US4329773A (en) * 1980-12-10 1982-05-18 International Business Machines Corp. Method of making low leakage shallow junction IGFET devices
JPS6055655A (ja) * 1983-09-07 1985-03-30 Nissan Motor Co Ltd 梁構造体を有する半導体装置
JPH056965A (ja) * 1991-06-26 1993-01-14 Nec Ic Microcomput Syst Ltd 半導体集積回路及びその製造方法
TW278240B (ref) * 1994-08-31 1996-06-11 Nippon Steel Corp
US5817564A (en) * 1996-06-28 1998-10-06 Harris Corporation Double diffused MOS device and method
US7608927B2 (en) * 2002-08-29 2009-10-27 Micron Technology, Inc. Localized biasing for silicon on insulator structures
KR100507344B1 (ko) 2003-04-17 2005-08-08 삼성에스디아이 주식회사 박막 트랜지스터 및 그의 제조 방법
KR100501706B1 (ko) * 2003-10-16 2005-07-18 삼성에스디아이 주식회사 게이트-바디콘택 박막 트랜지스터
US11417369B2 (en) * 2019-12-31 2022-08-16 Etron Technology, Inc. Semiconductor device structure with an underground interconnection embedded into a silicon substrate

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5615148B2 (ref) * 1973-07-30 1981-04-08
IN140846B (ref) * 1973-08-06 1976-12-25 Rca Corp
JPS5431793B2 (ref) * 1973-10-12 1979-10-09
US3899363A (en) * 1974-06-28 1975-08-12 Ibm Method and device for reducing sidewall conduction in recessed oxide pet arrays
JPS52117079A (en) * 1976-03-29 1977-10-01 Oki Electric Ind Co Ltd Preparation of semiconductor device

Also Published As

Publication number Publication date
JPS533780A (en) 1978-01-13
FR2357066A1 (fr) 1978-01-27
DE2723374A1 (de) 1978-01-05
FR2357066B1 (ref) 1980-12-19
GB1520718A (en) 1978-08-09
JPS571147B2 (ref) 1982-01-09
US4035198A (en) 1977-07-12
IT1115346B (it) 1986-02-03

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