BRPI0918467A8 - Circuito integrado tendo voltagem de malha acentuada e método para o mesmo - Google Patents

Circuito integrado tendo voltagem de malha acentuada e método para o mesmo

Info

Publication number
BRPI0918467A8
BRPI0918467A8 BRPI0918467A BRPI0918467A BRPI0918467A8 BR PI0918467 A8 BRPI0918467 A8 BR PI0918467A8 BR PI0918467 A BRPI0918467 A BR PI0918467A BR PI0918467 A BRPI0918467 A BR PI0918467A BR PI0918467 A8 BRPI0918467 A8 BR PI0918467A8
Authority
BR
Brazil
Prior art keywords
voltage
voltage converters
integrated circuit
converters
power supply
Prior art date
Application number
BRPI0918467A
Other languages
English (en)
Inventor
U Kenkare Prashant
L Cooper Troy
Original Assignee
Freescale Semiconductor Inc
Nxp Usa Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc, Nxp Usa Inc filed Critical Freescale Semiconductor Inc
Publication of BRPI0918467A2 publication Critical patent/BRPI0918467A2/pt
Publication of BRPI0918467A8 publication Critical patent/BRPI0918467A8/pt

Links

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J1/00—Circuit arrangements for dc mains or dc distribution networks
    • H02J1/10—Parallel operation of dc sources
    • H02J1/102—Parallel operation of dc sources being switching converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J1/00—Circuit arrangements for dc mains or dc distribution networks
    • H02J1/08—Three-wire systems; Systems having more than three wires
    • H02J1/082—Plural DC voltage, e.g. DC supply voltage with at least two different DC voltage levels

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Dc-Dc Converters (AREA)
  • Dram (AREA)
  • Logic Circuits (AREA)

Abstract

CIRCUITO INTEGRADO TENDO VOLTAGEM DE MALHA ACENTUADA E MÉTODO PARA O MESMO. Um circuito integrado (10) compreende um condutor de fornecimento de energia global (12), uma pluralidade de blocos de circuito (16-20), uma pluralidade de conversores de voltagem (25-29), e lógica de controle (21-23). O condutor de fornecimento de energia global (12) é configurado para distribuir uma voltagem de alimentação (VDD). Os blocos de circuito (16-20)são seletivamente acoplados ao condutor de fornecimento de energia global (12). A pluralidade de conversores de voltagem (25-29) é acoplada ao condutor de fornecimento de energia global (12). Uma voltagem de saída dos conversores de voltagem individuais da pluralidade de conversores de voltagem é seletivamente acoplada a um ou mais blocos de pluralidade de blocos de circuito (16-20). A lógica de controle (21-23) é configurada para controlar o acoplamento seletivo de pelo menos uma dentre a voltagem de fornecimento e a voltagem de saída dos conversores de voltagem individuais da pluralidade de conversores de voltagem para os os correspondentes da pluralidade de blocos de circuito (16-20). Outrossim, a lógica de controle (21-23) controla a magnitude da voltagem de saída dos conversores de voltagem individuais da pluralidade de conversores de voltagem (25-29).
BRPI0918467A 2008-09-19 2009-08-05 Circuito integrado tendo voltagem de malha acentuada e método para o mesmo BRPI0918467A8 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/233,913 US8031549B2 (en) 2008-09-19 2008-09-19 Integrated circuit having boosted array voltage and method therefor
PCT/US2009/052812 WO2010033316A1 (en) 2008-09-19 2009-08-05 Integrated circuit having boosted array voltage and method therefor

Publications (2)

Publication Number Publication Date
BRPI0918467A2 BRPI0918467A2 (pt) 2015-11-24
BRPI0918467A8 true BRPI0918467A8 (pt) 2017-10-10

Family

ID=42036899

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI0918467A BRPI0918467A8 (pt) 2008-09-19 2009-08-05 Circuito integrado tendo voltagem de malha acentuada e método para o mesmo

Country Status (5)

Country Link
US (1) US8031549B2 (pt)
CN (1) CN102160117B (pt)
BR (1) BRPI0918467A8 (pt)
TW (1) TWI515746B (pt)
WO (1) WO2010033316A1 (pt)

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US8686698B2 (en) 2008-04-16 2014-04-01 Enpirion, Inc. Power converter with controller operable in selected modes of operation
US8541991B2 (en) 2008-04-16 2013-09-24 Enpirion, Inc. Power converter with controller operable in selected modes of operation
US8692532B2 (en) 2008-04-16 2014-04-08 Enpirion, Inc. Power converter with controller operable in selected modes of operation
US9548714B2 (en) 2008-12-29 2017-01-17 Altera Corporation Power converter with a dynamically configurable controller and output filter
US8698463B2 (en) 2008-12-29 2014-04-15 Enpirion, Inc. Power converter with a dynamically configurable controller based on a power conversion mode
US8232819B2 (en) * 2009-12-02 2012-07-31 Lsi Corporation Closed-loop soft error rate sensitivity control
US8867295B2 (en) 2010-12-17 2014-10-21 Enpirion, Inc. Power converter for a memory module
US8767354B1 (en) 2011-12-08 2014-07-01 Western Digital Technologies, Inc. Data storage device employing cascaded voltage regulators during power failure
US9093105B2 (en) 2011-12-09 2015-07-28 Western Digital Technologies, Inc. Disk drive charging capacitor using motor supply voltage during power failure
US8724422B1 (en) * 2012-02-29 2014-05-13 Western Digital Technologies, Inc. System and method for charging back-up charge storage element for data storage device using spindle phase switching elements
KR101652295B1 (ko) * 2012-03-25 2016-08-30 인텔 코포레이션 메모리의 충전 펌프 리던던시
US9547034B2 (en) * 2013-07-03 2017-01-17 Xilinx, Inc. Monolithic integrated circuit die having modular die regions stitched together
US9647453B2 (en) * 2013-08-02 2017-05-09 Samsung Electronics Co., Ltd. Dual supply memory
JP6327099B2 (ja) 2014-10-08 2018-05-23 株式会社デンソー 半導体装置
US9509217B2 (en) 2015-04-20 2016-11-29 Altera Corporation Asymmetric power flow controller for a power converter and method of operating the same
US9940996B1 (en) 2017-03-01 2018-04-10 Nxp Usa, Inc. Memory circuit having increased write margin and method therefor
US9934846B1 (en) 2017-03-01 2018-04-03 Nxp Usa, Inc. Memory circuit and method for increased write margin
CN109285572B (zh) * 2017-07-21 2021-06-22 中芯国际集成电路制造(上海)有限公司 一种负升压电路、半导体器件及电子装置
US10522217B1 (en) 2018-08-08 2019-12-31 Globalfoundries Inc. Column-dependent positive voltage boost for memory cell supply voltage
DE112019007425T5 (de) * 2019-05-31 2022-02-24 Micron Technology, Inc. Intelligente Ladungspumpenarchitektur für Flash-Arrays
US10790007B1 (en) * 2019-11-22 2020-09-29 Winbond Electronics Corp. Memory device and method for assiting read operation
JP2023032169A (ja) * 2021-08-26 2023-03-09 キオクシア株式会社 半導体記憶装置及びメモリシステム

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Also Published As

Publication number Publication date
TWI515746B (zh) 2016-01-01
CN102160117B (zh) 2014-12-03
WO2010033316A1 (en) 2010-03-25
TW201027551A (en) 2010-07-16
US20100072816A1 (en) 2010-03-25
CN102160117A (zh) 2011-08-17
US8031549B2 (en) 2011-10-04
BRPI0918467A2 (pt) 2015-11-24

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Legal Events

Date Code Title Description
B25A Requested transfer of rights approved

Owner name: NXP USA, INC. (US)

B06F Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]
B15K Others concerning applications: alteration of classification

Free format text: AS CLASSIFICACOES ANTERIORES ERAM: G11C 5/14 , G11C 11/41

Ipc: H02J 1/10 (1968.09), H02J 1/00 (1968.09)

B06T Formal requirements before examination [chapter 6.20 patent gazette]
B07A Application suspended after technical examination (opinion) [chapter 7.1 patent gazette]
B09B Patent application refused [chapter 9.2 patent gazette]
B09B Patent application refused [chapter 9.2 patent gazette]

Free format text: MANTIDO O INDEFERIMENTO UMA VEZ QUE NAO FOI APRESENTADO RECURSO DENTRO DO PRAZO LEGAL