BR9500680A - Circuito integrado, somador de múltiplos Bits e método de configuração de um circuito integrado - Google Patents

Circuito integrado, somador de múltiplos Bits e método de configuração de um circuito integrado

Info

Publication number
BR9500680A
BR9500680A BR9500680A BR9500680A BR9500680A BR 9500680 A BR9500680 A BR 9500680A BR 9500680 A BR9500680 A BR 9500680A BR 9500680 A BR9500680 A BR 9500680A BR 9500680 A BR9500680 A BR 9500680A
Authority
BR
Brazil
Prior art keywords
integrated circuit
configuration method
bit adder
circuit configuration
adder
Prior art date
Application number
BR9500680A
Other languages
English (en)
Inventor
Kenneth Austin
Original Assignee
Pilkington Germany No 2 Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pilkington Germany No 2 Ltd filed Critical Pilkington Germany No 2 Ltd
Publication of BR9500680A publication Critical patent/BR9500680A/pt

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
BR9500680A 1994-02-17 1995-02-17 Circuito integrado, somador de múltiplos Bits e método de configuração de um circuito integrado BR9500680A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9403030A GB9403030D0 (en) 1994-02-17 1994-02-17 Re-configurable application specific device

Publications (1)

Publication Number Publication Date
BR9500680A true BR9500680A (pt) 1995-11-07

Family

ID=10750492

Family Applications (1)

Application Number Title Priority Date Filing Date
BR9500680A BR9500680A (pt) 1994-02-17 1995-02-17 Circuito integrado, somador de múltiplos Bits e método de configuração de um circuito integrado

Country Status (10)

Country Link
EP (1) EP0668659A2 (pt)
JP (1) JPH08101761A (pt)
KR (1) KR950034751A (pt)
CN (1) CN1126340A (pt)
AU (1) AU1228695A (pt)
BR (1) BR9500680A (pt)
CA (1) CA2142407A1 (pt)
GB (2) GB9403030D0 (pt)
RU (1) RU95102140A (pt)
TW (1) TW357458B (pt)

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Also Published As

Publication number Publication date
EP0668659A2 (en) 1995-08-23
CA2142407A1 (en) 1995-08-18
RU95102140A (ru) 1997-01-10
KR950034751A (ko) 1995-12-28
GB9503003D0 (en) 1995-04-05
GB9403030D0 (en) 1994-04-06
JPH08101761A (ja) 1996-04-16
TW357458B (en) 1999-05-01
AU1228695A (en) 1995-08-24
GB2286737A (en) 1995-08-23
CN1126340A (zh) 1996-07-10

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Legal Events

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FA10 Dismissal: dismissal - article 33 of industrial property law