BR9103929A - Metodo e aparelho para a otimizacao da arbitragem de barra durante transferencia de dados com acesso direto a memoria - Google Patents

Metodo e aparelho para a otimizacao da arbitragem de barra durante transferencia de dados com acesso direto a memoria

Info

Publication number
BR9103929A
BR9103929A BR919103929A BR9103929A BR9103929A BR 9103929 A BR9103929 A BR 9103929A BR 919103929 A BR919103929 A BR 919103929A BR 9103929 A BR9103929 A BR 9103929A BR 9103929 A BR9103929 A BR 9103929A
Authority
BR
Brazil
Prior art keywords
appliance
memory
data transfer
direct access
during data
Prior art date
Application number
BR919103929A
Other languages
English (en)
Inventor
George Bohoslaw Marenin
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BR9103929A publication Critical patent/BR9103929A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/30—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal with priority control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
BR919103929A 1990-09-21 1991-09-12 Metodo e aparelho para a otimizacao da arbitragem de barra durante transferencia de dados com acesso direto a memoria BR9103929A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US58634990A 1990-09-21 1990-09-21

Publications (1)

Publication Number Publication Date
BR9103929A true BR9103929A (pt) 1992-05-26

Family

ID=24345380

Family Applications (1)

Application Number Title Priority Date Filing Date
BR919103929A BR9103929A (pt) 1990-09-21 1991-09-12 Metodo e aparelho para a otimizacao da arbitragem de barra durante transferencia de dados com acesso direto a memoria

Country Status (18)

Country Link
US (1) US5195185A (pt)
EP (1) EP0476990B1 (pt)
JP (1) JPH0810445B2 (pt)
KR (1) KR950014505B1 (pt)
CN (1) CN1037553C (pt)
AU (1) AU639589B2 (pt)
BR (1) BR9103929A (pt)
CA (1) CA2050129C (pt)
CZ (1) CZ282214B6 (pt)
DE (1) DE69132344T2 (pt)
FI (1) FI914429A (pt)
HU (1) HU215867B (pt)
MX (1) MX173460B (pt)
NO (1) NO913707L (pt)
PL (1) PL167608B1 (pt)
PT (1) PT99006A (pt)
RU (1) RU2110838C1 (pt)
SG (1) SG42853A1 (pt)

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US5559969A (en) * 1994-08-09 1996-09-24 Unisys Corporation Method and apparatus for efficiently interfacing variable width data streams to a fixed width memory
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JP3320233B2 (ja) * 1995-02-06 2002-09-03 キヤノン株式会社 記録装置
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CN111478840A (zh) * 2020-04-15 2020-07-31 联合华芯电子有限公司 用于总线系统的双速率仲裁中继设备
CN113821470A (zh) * 2020-06-19 2021-12-21 平头哥(上海)半导体技术有限公司 总线设备、嵌入式系统和片上系统
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Also Published As

Publication number Publication date
PT99006A (pt) 1993-10-29
EP0476990B1 (en) 2000-08-02
HUT58931A (en) 1992-03-30
EP0476990A2 (en) 1992-03-25
EP0476990A3 (en) 1993-08-04
PL167608B1 (pl) 1995-09-30
CA2050129A1 (en) 1992-03-22
CN1037553C (zh) 1998-02-25
NO913707D0 (no) 1991-09-20
CS287491A3 (en) 1992-04-15
FI914429A0 (fi) 1991-09-20
US5195185A (en) 1993-03-16
MX173460B (es) 1994-03-04
JPH04246758A (ja) 1992-09-02
CN1060166A (zh) 1992-04-08
CA2050129C (en) 1996-05-14
AU639589B2 (en) 1993-07-29
DE69132344D1 (de) 2000-09-07
PL291778A1 (en) 1992-06-01
HU215867B (hu) 1999-03-29
KR920006858A (ko) 1992-04-28
NO913707L (no) 1992-03-23
FI914429A (fi) 1992-03-22
DE69132344T2 (de) 2001-02-15
RU2110838C1 (ru) 1998-05-10
KR950014505B1 (ko) 1995-12-02
JPH0810445B2 (ja) 1996-01-31
CZ282214B6 (cs) 1997-06-11
HU913024D0 (en) 1992-01-28
SG42853A1 (en) 1997-10-17
AU8261291A (en) 1992-03-26

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FD5 Application fees: dismissal - article 86 of industrial property law