BR8900603A - Mecanismo para fornecer suporte a dois tipos diferentes de espacos enderecaveis e metodo de traducao de enderecos virtuais para enderecos reais - Google Patents

Mecanismo para fornecer suporte a dois tipos diferentes de espacos enderecaveis e metodo de traducao de enderecos virtuais para enderecos reais

Info

Publication number
BR8900603A
BR8900603A BR898900603A BR8900603A BR8900603A BR 8900603 A BR8900603 A BR 8900603A BR 898900603 A BR898900603 A BR 898900603A BR 8900603 A BR8900603 A BR 8900603A BR 8900603 A BR8900603 A BR 8900603A
Authority
BR
Brazil
Prior art keywords
addresses
additable
spaces
different types
provide support
Prior art date
Application number
BR898900603A
Other languages
English (en)
Inventor
Casper Anthony Scalzi
Richard John Schmalz
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BR8900603A publication Critical patent/BR8900603A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1466—Key-lock mechanism
    • G06F12/1475—Key-lock mechanism in a virtual system, e.g. with translation means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1036—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
BR898900603A 1988-02-10 1989-02-10 Mecanismo para fornecer suporte a dois tipos diferentes de espacos enderecaveis e metodo de traducao de enderecos virtuais para enderecos reais BR8900603A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/154,688 US5008811A (en) 1988-02-10 1988-02-10 Control mechanism for zero-origin data spaces

Publications (1)

Publication Number Publication Date
BR8900603A true BR8900603A (pt) 1989-10-10

Family

ID=22552340

Family Applications (1)

Application Number Title Priority Date Filing Date
BR898900603A BR8900603A (pt) 1988-02-10 1989-02-10 Mecanismo para fornecer suporte a dois tipos diferentes de espacos enderecaveis e metodo de traducao de enderecos virtuais para enderecos reais

Country Status (5)

Country Link
US (1) US5008811A (pt)
EP (1) EP0327798B1 (pt)
JP (1) JPH077363B2 (pt)
BR (1) BR8900603A (pt)
DE (1) DE68923627T2 (pt)

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US5239635A (en) * 1988-06-06 1993-08-24 Digital Equipment Corporation Virtual address to physical address translation using page tables in virtual memory
US5134696A (en) * 1988-07-28 1992-07-28 International Business Machines Corp. Virtual lookaside facility
JPH0290349A (ja) * 1988-09-28 1990-03-29 Hitachi Ltd 仮想記憶システムのアドレス空間制御装置
US5226132A (en) * 1988-09-30 1993-07-06 Hitachi, Ltd. Multiple virtual addressing using/comparing translation pairs of addresses comprising a space address and an origin address (sto) while using space registers as storage devices for a data processing system
US5404476A (en) * 1989-02-10 1995-04-04 Nec Corporation Multiprocessing system having a single translation lookaside buffer with reduced processor overhead
JPH0650480B2 (ja) * 1989-05-02 1994-06-29 株式会社日立製作所 多重仮想記憶システムおよびアドレス制御装置
JP2768503B2 (ja) * 1989-07-25 1998-06-25 富士通株式会社 仮想記憶アドレス空間アクセス制御方式
JP2825550B2 (ja) * 1989-09-21 1998-11-18 株式会社日立製作所 多重仮想空間アドレス制御方法および計算機システム
JPH0679296B2 (ja) * 1989-09-22 1994-10-05 株式会社日立製作所 多重仮想アドレス空間アクセス方法およびデータ処理装置
US5265227A (en) * 1989-11-14 1993-11-23 Intel Corporation Parallel protection checking in an address translation look-aside buffer
US5469556A (en) * 1989-12-12 1995-11-21 Harris Corporation Resource access security system for controlling access to resources of a data processing system
US5319761A (en) * 1991-08-12 1994-06-07 International Business Machines Corporation Directory look-aside table for a virtual storage system including means for minimizing synonym entries
US5390312A (en) * 1991-09-24 1995-02-14 International Business Machines Corporation Access look-aside facility
CA2285089C (en) * 1991-11-12 2000-05-09 Ibm Canada Limited-Ibm Canada Limitee Logical mapping of data objects using data spaces
US5426748A (en) * 1992-01-03 1995-06-20 International Business Machines Corporation Guest/host extended addressing method and means with contiguous access list entries
US5388266A (en) * 1992-03-30 1995-02-07 International Business Machines Corporation Management of data objects used intain state information for shared data at a local complex
US5428757A (en) * 1992-04-29 1995-06-27 International Business Machines Corporation Method for reducing translation look aside buffer purges in a multitasking system
US5479631A (en) * 1992-11-19 1995-12-26 International Business Machines Corporation System for designating real main storage addresses in instructions while dynamic address translation is on
JP3098344B2 (ja) * 1992-12-18 2000-10-16 富士通株式会社 データ転送処理方法及びデータ転送処理装置
US5377337A (en) * 1993-06-08 1994-12-27 International Business Machines Corporation Method and means for enabling virtual addressing control by software users over a hardware page transfer control entity
US6427162B1 (en) * 1996-05-02 2002-07-30 Sun Microsystems, Inc. Separate code and data contexts: an architectural approach to virtual text sharing
US6681239B1 (en) 1996-12-23 2004-01-20 International Business Machines Corporation Computer system having shared address space among multiple virtual address spaces
US6289432B1 (en) 1998-03-25 2001-09-11 International Business Machines Corporation Sharing segments of storage by enabling the sharing of page tables
JP4116346B2 (ja) * 2002-07-05 2008-07-09 富士通株式会社 演算処理装置及びそのアドレス変換方法
JP4085328B2 (ja) 2003-04-11 2008-05-14 ソニー株式会社 情報処理装置および方法、記録媒体、プログラム、並びに撮像装置
US6981125B2 (en) * 2003-04-22 2005-12-27 International Business Machines Corporation Method and apparatus for managing shared virtual storage in an information handling system
US8037278B2 (en) * 2008-01-11 2011-10-11 International Business Machines Corporation Dynamic address translation with format control
US8019964B2 (en) * 2008-01-11 2011-09-13 International Buisness Machines Corporation Dynamic address translation with DAT protection
US8041923B2 (en) * 2008-01-11 2011-10-18 International Business Machines Corporation Load page table entry address instruction execution based on an address translation format control field
US8103851B2 (en) * 2008-01-11 2012-01-24 International Business Machines Corporation Dynamic address translation with translation table entry format control for indentifying format of the translation table entry
US8041922B2 (en) * 2008-01-11 2011-10-18 International Business Machines Corporation Enhanced dynamic address translation with load real address function
US8677098B2 (en) 2008-01-11 2014-03-18 International Business Machines Corporation Dynamic address translation with fetch protection
US8082405B2 (en) * 2008-01-11 2011-12-20 International Business Machines Corporation Dynamic address translation with fetch protection
US8117417B2 (en) 2008-01-11 2012-02-14 International Business Machines Corporation Dynamic address translation with change record override
US8095773B2 (en) 2008-02-26 2012-01-10 International Business Machines Corporation Dynamic address translation with translation exception qualifier
US8285968B2 (en) * 2009-09-29 2012-10-09 International Business Machines Corporation Performing memory accesses while omitting unnecessary address translations
US8806179B2 (en) * 2009-12-15 2014-08-12 International Business Machines Corporation Non-quiescing key setting facility
JP6809393B2 (ja) 2017-06-20 2021-01-06 トヨタ自動車株式会社 車両用動力伝達装置の潤滑装置

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US4042911A (en) * 1976-04-30 1977-08-16 International Business Machines Corporation Outer and asynchronous storage extension system
JPS52144929A (en) * 1976-05-28 1977-12-02 Fujitsu Ltd Multiplex virtual space processing data processing system
JPS52149444A (en) * 1976-06-08 1977-12-12 Fujitsu Ltd Multiplex virtual space processing data processing system
US4136385A (en) * 1977-03-24 1979-01-23 International Business Machines Corporation Synonym control means for multiple virtual storage systems
US4096573A (en) * 1977-04-25 1978-06-20 International Business Machines Corporation DLAT Synonym control means for common portions of all address spaces
US4355355A (en) * 1980-03-19 1982-10-19 International Business Machines Corp. Address generating mechanism for multiple virtual spaces
US4366537A (en) * 1980-05-23 1982-12-28 International Business Machines Corp. Authorization mechanism for transfer of program control or data between different address spaces having different storage protect keys
US4430705A (en) * 1980-05-23 1984-02-07 International Business Machines Corp. Authorization mechanism for establishing addressability to information in another address space
US4500952A (en) * 1980-05-23 1985-02-19 International Business Machines Corporation Mechanism for control of address translation by a program using a plurality of translation tables
US4521846A (en) * 1981-02-20 1985-06-04 International Business Machines Corporation Mechanism for accessing multiple virtual address spaces
JPS6091462A (ja) * 1983-10-26 1985-05-22 Toshiba Corp 演算制御装置
JPS61845A (ja) * 1984-06-13 1986-01-06 Fujitsu Ltd 仮想ペ−ジリザ−ブ方式
JPS61148551A (ja) * 1984-12-24 1986-07-07 Hitachi Ltd アドレス変換方式
US4758951A (en) * 1985-04-09 1988-07-19 Tektronix, Inc. Method for translating virtual addresses into real addresses
US4868738A (en) * 1985-08-15 1989-09-19 Lanier Business Products, Inc. Operating system independent virtual memory computer system
JPH0658650B2 (ja) * 1986-03-14 1994-08-03 株式会社日立製作所 仮想計算機システム
JPS62237547A (ja) * 1986-04-09 1987-10-17 Hitachi Ltd アドレス変換方式
US4785392A (en) * 1986-10-14 1988-11-15 Amdahl Corporation Addressing multiple storage spaces
US4943913A (en) * 1988-02-10 1990-07-24 International Business Machines Corporation Operating system accessing control blocks by using home address space segment table to control instruction and operand fetch and store operations

Also Published As

Publication number Publication date
JPH027142A (ja) 1990-01-11
EP0327798A3 (en) 1990-11-28
US5008811A (en) 1991-04-16
DE68923627T2 (de) 1996-04-25
EP0327798A2 (en) 1989-08-16
DE68923627D1 (de) 1995-09-07
EP0327798B1 (en) 1995-08-02
JPH077363B2 (ja) 1995-01-30

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Legal Events

Date Code Title Description
KF Request for proof of payment of annual fee
FD5 Application fees: dismissal - article 86 of industrial property law