BR112013004461A2 - dispositivo e método de processamento de dados, e, método de codificação de bits de informação - Google Patents

dispositivo e método de processamento de dados, e, método de codificação de bits de informação

Info

Publication number
BR112013004461A2
BR112013004461A2 BR112013004461A BR112013004461A BR112013004461A2 BR 112013004461 A2 BR112013004461 A2 BR 112013004461A2 BR 112013004461 A BR112013004461 A BR 112013004461A BR 112013004461 A BR112013004461 A BR 112013004461A BR 112013004461 A2 BR112013004461 A2 BR 112013004461A2
Authority
BR
Brazil
Prior art keywords
data processing
processing device
information bit
bit coding
coding method
Prior art date
Application number
BR112013004461A
Other languages
English (en)
Inventor
Atsushi Kikuchi
Makiko Yamamoto
Takashi Yokokawa
Yuji Shinohara
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of BR112013004461A2 publication Critical patent/BR112013004461A2/pt

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/033—Theoretical methods to calculate these checking codes
    • H03M13/036—Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/35—Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
    • H03M13/356—Unequal error protection [UEP]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6522—Intended application, e.g. transmission or communication standard
    • H03M13/6552—DVB-T2
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/36—Modulator circuits; Transmitter circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Multimedia (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Error Detection And Correction (AREA)
BR112013004461A 2010-09-03 2011-08-25 dispositivo e método de processamento de dados, e, método de codificação de bits de informação BR112013004461A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2010197393A JP5500379B2 (ja) 2010-09-03 2010-09-03 データ処理装置、及びデータ処理方法
PCT/JP2011/069110 WO2012029614A1 (ja) 2010-09-03 2011-08-25 データ処理装置、及びデータ処理方法

Publications (1)

Publication Number Publication Date
BR112013004461A2 true BR112013004461A2 (pt) 2016-06-07

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
BR112013004461A BR112013004461A2 (pt) 2010-09-03 2011-08-25 dispositivo e método de processamento de dados, e, método de codificação de bits de informação

Country Status (10)

Country Link
US (1) US9106256B2 (pt)
EP (1) EP2613443B1 (pt)
JP (1) JP5500379B2 (pt)
CN (1) CN103181082B (pt)
AU (1) AU2011297270B2 (pt)
BR (1) BR112013004461A2 (pt)
CA (1) CA2808813A1 (pt)
ES (1) ES2544610T3 (pt)
MX (1) MX2013002215A (pt)
WO (1) WO2012029614A1 (pt)

Families Citing this family (46)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5500379B2 (ja) 2010-09-03 2014-05-21 ソニー株式会社 データ処理装置、及びデータ処理方法
JP5505725B2 (ja) * 2010-09-16 2014-05-28 ソニー株式会社 データ処理装置、及びデータ処理方法
JP5601182B2 (ja) * 2010-12-07 2014-10-08 ソニー株式会社 データ処理装置、及びデータ処理方法
JP5630278B2 (ja) 2010-12-28 2014-11-26 ソニー株式会社 データ処理装置、及びデータ処理方法
JP5637393B2 (ja) * 2011-04-28 2014-12-10 ソニー株式会社 データ処理装置、及び、データ処理方法
JP5648852B2 (ja) 2011-05-27 2015-01-07 ソニー株式会社 データ処理装置、及び、データ処理方法
US9213593B2 (en) * 2013-01-16 2015-12-15 Maxlinear, Inc. Efficient memory architecture for low density parity check decoding
CN104205648B (zh) 2013-02-08 2018-06-26 索尼公司 数据处理装置和数据处理方法
KR102091888B1 (ko) 2013-02-08 2020-04-14 소니 주식회사 데이터 처리 장치, 및 데이터 처리 방법
WO2014145217A1 (en) * 2013-03-15 2014-09-18 Hughes Network Systems, Llc Low density parity check (ldpc) encoding and decoding for small terminal applications
KR102023558B1 (ko) 2013-06-12 2019-09-23 새턴 라이센싱 엘엘씨 데이터 처리 장치, 및 데이터 처리 방법
EP3011732B1 (en) 2013-06-19 2020-04-08 LG Electronics Inc. Method and apparatus for transmitting/receiving broadcast signals
CN105531935B (zh) 2013-09-20 2020-03-31 索尼公司 数据处理装置和数据处理方法
KR20160060026A (ko) * 2013-09-20 2016-05-27 소니 주식회사 데이터 처리 장치 및 데이터 처리 방법
JPWO2015045912A1 (ja) * 2013-09-24 2017-03-09 ソニー株式会社 データ処理装置、及びデータ処理方法
EP2858249A1 (en) 2013-10-07 2015-04-08 Electronics and Telecommunications Research Institute Low density parity check encoder
US9787470B2 (en) * 2013-12-12 2017-10-10 Samsung Electronics Co., Ltd. Method and apparatus of joint security advanced LDPC cryptcoding
US9577678B2 (en) 2014-01-29 2017-02-21 Electronics And Telecommunications Research Institute Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 7/15 and quadrature phase shift keying, and bit interleaving method using same
US9602135B2 (en) 2014-02-20 2017-03-21 Electronics And Telecommunications Research Institute Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 5/15 and 64-symbol mapping, and bit interleaving method using same
US9602136B2 (en) 2014-03-06 2017-03-21 Electronics And Telecommunications Research Institute Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 4/15 and 256-symbol mapping, and bit interleaving method using same
KR101775704B1 (ko) * 2014-05-21 2017-09-19 삼성전자주식회사 송신 장치 및 그의 인터리빙 방법
KR102260775B1 (ko) 2014-05-22 2021-06-07 한국전자통신연구원 길이가 16200이며, 부호율이 10/15인 ldpc 부호어 및 256-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법
US9600367B2 (en) 2014-05-22 2017-03-21 Electronics And Telecommunications Research Institute Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 4/15 and 16-symbol mapping, and bit interleaving method using same
CA2989608C (en) 2014-05-22 2021-03-09 Electronics And Telecommunications Research Institute Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 10/15 and 256-symbol mapping, and bit interleaving method using same
US10361720B2 (en) 2014-05-22 2019-07-23 Electronics And Telecommunications Research Institute Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 3/15 and 64-symbol mapping, and bit interleaving method using same
KR102260767B1 (ko) 2014-05-22 2021-06-07 한국전자통신연구원 길이가 16200이며, 부호율이 3/15인 ldpc 부호어 및 64-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법
US10326471B2 (en) 2014-05-22 2019-06-18 Electronics And Telecommunications Research Institute Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 3/15 and quadrature phase shift keying, and bit interleaving method using same
KR102541321B1 (ko) * 2014-07-11 2023-06-08 삼성전자주식회사 공동 보안 어드벤스드 ldpc 암호화 코딩 방법 및 장치
CA2963841C (en) 2014-08-14 2019-08-20 Electronics And Telecommunications Research Institute Low density parity check encoder having length of 64800 and code rate of 2/15, and low denisty parity check encoding method using the same
US9489259B2 (en) 2014-08-14 2016-11-08 Electronics And Telecommunications Research Institute Low density parity check encoder having length of 16200 and code rate of 2/15, and low density parity check encoding method using the same
KR102240745B1 (ko) 2015-01-20 2021-04-16 한국전자통신연구원 길이가 64800이며, 부호율이 4/15인 ldpc 부호어 및 qpsk를 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법
KR102240748B1 (ko) 2015-01-20 2021-04-16 한국전자통신연구원 길이가 64800이며, 부호율이 3/15인 ldpc 부호어 및 qpsk를 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법
KR102240750B1 (ko) 2015-01-20 2021-04-16 한국전자통신연구원 길이가 64800이며, 부호율이 2/15인 ldpc 부호어 및 qpsk를 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법
KR102240736B1 (ko) 2015-01-27 2021-04-16 한국전자통신연구원 길이가 64800이며, 부호율이 3/15인 ldpc 부호어 및 64-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법
KR102240741B1 (ko) 2015-01-27 2021-04-16 한국전자통신연구원 길이가 16200이며, 부호율이 2/15인 ldpc 부호어 및 64-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법
KR102240744B1 (ko) 2015-01-27 2021-04-16 한국전자통신연구원 길이가 16200이며, 부호율이 2/15인 ldpc 부호어 및 16-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법
KR102240740B1 (ko) 2015-01-27 2021-04-16 한국전자통신연구원 길이가 16200이며, 부호율이 2/15인 ldpc 부호어 및 256-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법
KR102240728B1 (ko) 2015-01-27 2021-04-16 한국전자통신연구원 길이가 64800이며, 부호율이 4/15인 ldpc 부호어 및 64-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법
CN112134605B (zh) 2015-11-13 2024-04-09 华为技术有限公司 数据传输方法和装置
JP6930374B2 (ja) * 2017-10-31 2021-09-01 ソニーグループ株式会社 送信装置及び送信方法
JP6930372B2 (ja) * 2017-10-31 2021-09-01 ソニーグループ株式会社 送信装置及び送信方法
JP6930375B2 (ja) 2017-10-31 2021-09-01 ソニーグループ株式会社 送信装置及び送信方法
JP6930376B2 (ja) 2017-10-31 2021-09-01 ソニーグループ株式会社 送信装置及び送信方法
JP6930377B2 (ja) * 2017-10-31 2021-09-01 ソニーグループ株式会社 送信装置及び送信方法
JP6930373B2 (ja) 2017-10-31 2021-09-01 ソニーグループ株式会社 送信装置及び送信方法
CN110601792B (zh) * 2019-07-31 2022-02-01 苏州门海微电子科技有限公司 一种用于宽带电力载波通讯的前端编解码系统及方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1008316B (zh) * 1985-05-08 1990-06-06 索尼公司 纠错码的译码方法和系统
US5359606A (en) * 1992-02-12 1994-10-25 Storage Technology Corporation Data quality analysis in a data signal processing channel
US6757122B1 (en) * 2002-01-29 2004-06-29 Seagate Technology Llc Method and decoding apparatus using linear code with parity check matrices composed from circulants
JP4224777B2 (ja) 2003-05-13 2009-02-18 ソニー株式会社 復号方法および復号装置、並びにプログラム
US7234098B2 (en) * 2003-10-27 2007-06-19 The Directv Group, Inc. Method and apparatus for providing reduced memory low density parity check (LDPC) codes
CN100546205C (zh) * 2006-04-29 2009-09-30 北京泰美世纪科技有限公司 构造低密度奇偶校验码的方法、译码方法及其传输系统
CN100446427C (zh) * 2006-08-07 2008-12-24 北京泰美世纪科技有限公司 移动数字多媒体广播系统中ldpc码的构造方法
CN101601187B (zh) * 2007-01-24 2014-08-20 高通股份有限公司 对可变大小分组进行ldpc编码和译码
TWI410055B (zh) * 2007-11-26 2013-09-21 Sony Corp Data processing device, data processing method and program product for performing data processing method on computer
JP2011176783A (ja) * 2010-02-26 2011-09-08 Sony Corp データ処理装置、及びデータ処理方法
JP2011176784A (ja) * 2010-02-26 2011-09-08 Sony Corp データ処理装置、及びデータ処理方法
JP2011176782A (ja) * 2010-02-26 2011-09-08 Sony Corp データ処理装置、及びデータ処理方法
JP5500379B2 (ja) 2010-09-03 2014-05-21 ソニー株式会社 データ処理装置、及びデータ処理方法
JP2012085196A (ja) 2010-10-14 2012-04-26 Sony Corp データ処理装置、及びデータ処理方法
EP2477335B1 (en) 2011-01-18 2019-05-29 Samsung Electronics Co., Ltd. Apparatus and method for transmitting and reveiving data in communication/broadcasting system
US8566667B2 (en) * 2011-07-29 2013-10-22 Stec, Inc. Low density parity check code decoding system and method

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Publication number Publication date
EP2613443A1 (en) 2013-07-10
ES2544610T3 (es) 2015-09-02
CA2808813A1 (en) 2012-03-08
JP5500379B2 (ja) 2014-05-21
RU2013108081A (ru) 2014-08-27
EP2613443B1 (en) 2015-07-22
MX2013002215A (es) 2013-03-22
AU2011297270B2 (en) 2015-05-28
US9106256B2 (en) 2015-08-11
CN103181082A (zh) 2013-06-26
AU2011297270A2 (en) 2013-03-14
EP2613443A4 (en) 2014-03-19
CN103181082B (zh) 2016-02-17
US20130254617A1 (en) 2013-09-26
WO2012029614A1 (ja) 2012-03-08
JP2012054853A (ja) 2012-03-15
AU2011297270A1 (en) 2013-03-14

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