BR112012018793A2 - redução da energia da memória num estado de espera - Google Patents

redução da energia da memória num estado de espera

Info

Publication number
BR112012018793A2
BR112012018793A2 BR112012018793A BR112012018793A BR112012018793A2 BR 112012018793 A2 BR112012018793 A2 BR 112012018793A2 BR 112012018793 A BR112012018793 A BR 112012018793A BR 112012018793 A BR112012018793 A BR 112012018793A BR 112012018793 A2 BR112012018793 A2 BR 112012018793A2
Authority
BR
Brazil
Prior art keywords
standby state
memory
volatile memory
memory power
power
Prior art date
Application number
BR112012018793A
Other languages
English (en)
Inventor
Derek Iwamoto
Original Assignee
Apple Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Apple Inc filed Critical Apple Inc
Publication of BR112012018793A2 publication Critical patent/BR112012018793A2/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3275—Power saving in memory, e.g. RAM, cache
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/141—Battery and back-up supplies
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/148—Details of power up or power down circuits, standby circuits or recovery circuits
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Sources (AREA)

Abstract

patente de invenção: "redução da energia da memória num estado de espera". a presente invenção refere-se a um sistema de processamento de dados que usa redução de energia de memória um estado de espera. o sistema pode inclui uma memória volátil e pelo menos uma entrada de dados periférica e um circuito lógico que é configurado para gerir o consumo de energia do sistema de processamento de dados para um estado de espera do sistema. o circuito lógico pode ser acoplado à memória volátil e pode ser configurado para desligar a energia volátil, em resposta a um evento, ocorrendo durante o estado de espera, mas de outra forma, permanece no estado de espera. o estado de espera pode ser um estado de espera s3 compatível em acpi no qual a memória volátil, tal como a dram, é desligada após um período de inatividade do usuário durante o estado de espera s3.
BR112012018793A 2010-01-28 2011-01-26 redução da energia da memória num estado de espera BR112012018793A2 (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US29929510P 2010-01-28 2010-01-28
US12/895,702 US20110185208A1 (en) 2010-01-28 2010-09-30 Memory power reduction in a sleep state
PCT/US2011/022590 WO2011094323A1 (en) 2010-01-28 2011-01-26 Memory power reduction in a sleep state

Publications (1)

Publication Number Publication Date
BR112012018793A2 true BR112012018793A2 (pt) 2016-05-03

Family

ID=44309880

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112012018793A BR112012018793A2 (pt) 2010-01-28 2011-01-26 redução da energia da memória num estado de espera

Country Status (11)

Country Link
US (1) US20110185208A1 (pt)
EP (1) EP2513753A1 (pt)
JP (1) JP2013518350A (pt)
KR (1) KR20120127624A (pt)
CN (1) CN102725709A (pt)
AU (1) AU2011209591A1 (pt)
BR (1) BR112012018793A2 (pt)
DE (1) DE112011100386T5 (pt)
MX (1) MX2012008736A (pt)
TW (1) TW201203271A (pt)
WO (1) WO2011094323A1 (pt)

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Also Published As

Publication number Publication date
JP2013518350A (ja) 2013-05-20
US20110185208A1 (en) 2011-07-28
EP2513753A1 (en) 2012-10-24
CN102725709A (zh) 2012-10-10
KR20120127624A (ko) 2012-11-22
AU2011209591A1 (en) 2012-08-09
MX2012008736A (es) 2012-08-31
WO2011094323A1 (en) 2011-08-04
DE112011100386T5 (de) 2013-01-03
TW201203271A (en) 2012-01-16

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B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 5A ANUIDADE.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: EM VIRTUDE DO ARQUIVAMENTO PUBLICADO NA RPI 2384 DE 13-09-2016 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDO O ARQUIVAMENTO DO PEDIDO DE PATENTE, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013.