BR112016024712A2 - unidades de modo de energia com base em latência para controlar modos de energia de núcleos de processador e métodos e sistemas relacionados - Google Patents
unidades de modo de energia com base em latência para controlar modos de energia de núcleos de processador e métodos e sistemas relacionadosInfo
- Publication number
- BR112016024712A2 BR112016024712A2 BR112016024712A BR112016024712A BR112016024712A2 BR 112016024712 A2 BR112016024712 A2 BR 112016024712A2 BR 112016024712 A BR112016024712 A BR 112016024712A BR 112016024712 A BR112016024712 A BR 112016024712A BR 112016024712 A2 BR112016024712 A2 BR 112016024712A2
- Authority
- BR
- Brazil
- Prior art keywords
- processor core
- power
- threads
- latency
- systems
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
- G06F1/3228—Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3243—Power saving in microcontroller unit
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
- G06F9/4893—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues taking into account power or heat criteria
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
unidades de modo de energia baseados em latência para controlar modos de energia de núcleos de processador, e métodos e sistemas relacionados são revelados. em um aspecto, as unidades de modo de energia são configuradas para reduzir energia fornecida ao núcleo de processador quando o núcleo de processador tem um ou mais thread em status pendente e nenhum thread em status ativo. um operando de uma instrução sendo processado por um thread pode ser dados em memória localizada fora do núcleo de processador. se o núcleo de processador não exigir tanta energia para operar enquanto um thread espera por uma solicitação a partir do exterior do núcleo de processador, a energia consumida pelo núcleo de processador pode ser reduzida durante esses períodos de espera. energia pode ser conservada no núcleo de processador mesmo quando threads estão sendo processados se os únicos threads sendo processados estiverem em status pendente, e pode reduzir o consumo geral de energia no núcleo de processador e sua cpu correspondente.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/258,541 US9552033B2 (en) | 2014-04-22 | 2014-04-22 | Latency-based power mode units for controlling power modes of processor cores, and related methods and systems |
PCT/US2015/022014 WO2015164011A1 (en) | 2014-04-22 | 2015-03-23 | Latency-based power mode units for controlling power modes of processor cores, and related methods and systems |
Publications (1)
Publication Number | Publication Date |
---|---|
BR112016024712A2 true BR112016024712A2 (pt) | 2017-08-15 |
Family
ID=52829351
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR112016024712A BR112016024712A2 (pt) | 2014-04-22 | 2015-03-23 | unidades de modo de energia com base em latência para controlar modos de energia de núcleos de processador e métodos e sistemas relacionados |
Country Status (8)
Country | Link |
---|---|
US (1) | US9552033B2 (pt) |
EP (1) | EP3134805B1 (pt) |
JP (1) | JP6151465B1 (pt) |
KR (1) | KR101826088B1 (pt) |
CN (1) | CN106233225B (pt) |
BR (1) | BR112016024712A2 (pt) |
TW (1) | TWI595353B (pt) |
WO (1) | WO2015164011A1 (pt) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10317974B2 (en) * | 2016-04-08 | 2019-06-11 | Intel Corporation | Power supply unit (PSU) switching |
US10459517B2 (en) * | 2017-03-31 | 2019-10-29 | Qualcomm Incorporated | System and methods for scheduling software tasks based on central processing unit power characteristics |
US10726879B2 (en) * | 2017-12-08 | 2020-07-28 | Samsung Electronics Co., Ltd. | Low-power data transfer from buffer to flash memory |
US20220129171A1 (en) * | 2020-10-23 | 2022-04-28 | Pure Storage, Inc. | Preserving data in a storage system operating in a reduced power mode |
US11899944B2 (en) | 2021-03-18 | 2024-02-13 | Micron Technology, Inc. | Strategic power mode transition in a multi-memory device |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6233690B1 (en) | 1998-09-17 | 2001-05-15 | Intel Corporation | Mechanism for saving power on long latency stalls |
US7363474B2 (en) * | 2001-12-31 | 2008-04-22 | Intel Corporation | Method and apparatus for suspending execution of a thread until a specified memory access occurs |
US7653906B2 (en) * | 2002-10-23 | 2010-01-26 | Intel Corporation | Apparatus and method for reducing power consumption on simultaneous multi-threading systems |
GB0407384D0 (en) * | 2004-03-31 | 2004-05-05 | Ignios Ltd | Resource management in a multicore processor |
US7500123B2 (en) * | 2004-06-28 | 2009-03-03 | Ati Technologies Ulc | Apparatus and method for reducing power consumption in a graphics processing device |
US20060200684A1 (en) * | 2005-03-01 | 2006-09-07 | Vasudev Bibikar | Power mode change voltage control in computerized system |
US7627770B2 (en) * | 2005-04-14 | 2009-12-01 | Mips Technologies, Inc. | Apparatus and method for automatic low power mode invocation in a multi-threaded processor |
US8214662B2 (en) * | 2007-04-09 | 2012-07-03 | Panasonic Corporation | Multiprocessor control unit, control method performed by the same, and integrated circuit |
US20090172434A1 (en) | 2007-12-31 | 2009-07-02 | Kwa Seh W | Latency based platform coordination |
GB2465599B8 (en) * | 2008-11-24 | 2010-11-10 | 1E Ltd | Power management of computers. |
JP4858862B2 (ja) * | 2009-06-24 | 2012-01-18 | コニカミノルタビジネステクノロジーズ株式会社 | 画像形成装置 |
US8190939B2 (en) * | 2009-06-26 | 2012-05-29 | Microsoft Corporation | Reducing power consumption of computing devices by forecasting computing performance needs |
US9235251B2 (en) | 2010-01-11 | 2016-01-12 | Qualcomm Incorporated | Dynamic low power mode implementation for computing devices |
US8850236B2 (en) | 2010-06-18 | 2014-09-30 | Samsung Electronics Co., Ltd. | Power gating of cores by an SoC |
US8862917B2 (en) | 2011-09-19 | 2014-10-14 | Qualcomm Incorporated | Dynamic sleep for multicore computing devices |
US20130275791A1 (en) | 2012-04-12 | 2013-10-17 | Qualcomm Incorporated | Method and System for Tracking and Selecting Optimal Power Conserving Modes of a PCD |
US9015510B2 (en) | 2012-06-29 | 2015-04-21 | Intel Corporation | Optimizing energy efficiency using device idle duration information and latency tolerance based on a pre-wake configuration of a platform associated to the device |
US9003209B2 (en) * | 2012-06-29 | 2015-04-07 | Intel Corporation | Efficient integrated switching voltage regulator comprising switches coupled to bridge drivers to provide regulated power supply to power domains |
-
2014
- 2014-04-22 US US14/258,541 patent/US9552033B2/en not_active Expired - Fee Related
-
2015
- 2015-03-23 CN CN201580019999.7A patent/CN106233225B/zh not_active Expired - Fee Related
- 2015-03-23 EP EP15716240.5A patent/EP3134805B1/en active Active
- 2015-03-23 WO PCT/US2015/022014 patent/WO2015164011A1/en active Application Filing
- 2015-03-23 KR KR1020167029018A patent/KR101826088B1/ko active IP Right Grant
- 2015-03-23 BR BR112016024712A patent/BR112016024712A2/pt not_active Application Discontinuation
- 2015-03-23 JP JP2016563437A patent/JP6151465B1/ja not_active Expired - Fee Related
- 2015-03-25 TW TW104109610A patent/TWI595353B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
US20150301573A1 (en) | 2015-10-22 |
KR101826088B1 (ko) | 2018-02-06 |
WO2015164011A1 (en) | 2015-10-29 |
CN106233225B (zh) | 2017-10-10 |
JP2017519274A (ja) | 2017-07-13 |
JP6151465B1 (ja) | 2017-06-21 |
CN106233225A (zh) | 2016-12-14 |
EP3134805B1 (en) | 2019-07-31 |
EP3134805A1 (en) | 2017-03-01 |
KR20160145595A (ko) | 2016-12-20 |
TW201544947A (zh) | 2015-12-01 |
US9552033B2 (en) | 2017-01-24 |
TWI595353B (zh) | 2017-08-11 |
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Legal Events
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B06U | Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette] | ||
B11B | Dismissal acc. art. 36, par 1 of ipl - no reply within 90 days to fullfil the necessary requirements | ||
B350 | Update of information on the portal [chapter 15.35 patent gazette] |