BR0316994A - Métodos para fabricar um cartão de circuito integrado de interface dupla e cartão de circuito integrado de interface dupla - Google Patents

Métodos para fabricar um cartão de circuito integrado de interface dupla e cartão de circuito integrado de interface dupla

Info

Publication number
BR0316994A
BR0316994A BR0316994-4A BR0316994A BR0316994A BR 0316994 A BR0316994 A BR 0316994A BR 0316994 A BR0316994 A BR 0316994A BR 0316994 A BR0316994 A BR 0316994A
Authority
BR
Brazil
Prior art keywords
integrated circuit
circuit card
interface integrated
dual interface
manufacturing
Prior art date
Application number
BR0316994-4A
Other languages
English (en)
Inventor
Hong Jun Yu
Jung Ho Kim
Original Assignee
Jt Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020020077164A external-priority patent/KR20040049981A/ko
Priority claimed from KR1020030002366A external-priority patent/KR100545127B1/ko
Priority claimed from KR10-2003-0002592A external-priority patent/KR100515001B1/ko
Application filed by Jt Corp filed Critical Jt Corp
Publication of BR0316994A publication Critical patent/BR0316994A/pt

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/0772Physical layout of the record carrier
    • G06K19/07722Physical layout of the record carrier the record carrier being multilayered, e.g. laminated sheets
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745Mounting details of integrated circuit chips
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/0775Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/07773Antenna details
    • G06K19/07777Antenna details the antenna being of the inductive type
    • G06K19/07779Antenna details the antenna being of the inductive type the inductive antenna being a coil
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05568Disposition the whole external layer protruding from the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05573Single external layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Credit Cards Or The Like (AREA)

Abstract

"MéTODOS PARA FABRICAR UM CARTãO DE CIRCUITO INTEGRADO DE INTERFACE DUPLA E CARTãO DE CIRCUITO INTEGRADO DE INTERFACE DUPLA" A presente invenção apresenta um processo de fabricar cartão de CI laminando uma pluralidade de finas folhas metálicas. O processo da presente invenção inclui as etapas de aplicar um COB, com o eletrodo de contato do COB voltado para baixo, assentando pelo menos duas folhas munidas de um orifício, em que o COB é inserido nos ditos respectivos orifícios das folhas, tendo uma folha desprovida de um orifício sobre a folhas munidas de orifício e efetuando a compressão de todas as folhas.
BR0316994-4A 2002-12-06 2003-02-13 Métodos para fabricar um cartão de circuito integrado de interface dupla e cartão de circuito integrado de interface dupla BR0316994A (pt)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR1020020077164A KR20040049981A (ko) 2002-12-06 2002-12-06 호일 적층을 통한 ic카드 제조방법
KR1020030002366A KR100545127B1 (ko) 2003-01-14 2003-01-14 호일 적층을 통한 콤비형 ic 카드 반제품 및 그 제조방법
KR10-2003-0002592A KR100515001B1 (ko) 2003-01-15 2003-01-15 호일 적층을 통한 콤비형 ic 카드 반제품 및 그 제조방법
PCT/KR2003/000304 WO2004053787A1 (en) 2002-12-06 2003-02-13 Method for manufacturing ic card by laminating a plurality of foils

Publications (1)

Publication Number Publication Date
BR0316994A true BR0316994A (pt) 2005-10-25

Family

ID=36165433

Family Applications (1)

Application Number Title Priority Date Filing Date
BR0316994-4A BR0316994A (pt) 2002-12-06 2003-02-13 Métodos para fabricar um cartão de circuito integrado de interface dupla e cartão de circuito integrado de interface dupla

Country Status (7)

Country Link
US (1) US7253024B2 (pt)
EP (1) EP1570421A4 (pt)
JP (1) JP2006510130A (pt)
AU (1) AU2003208049B2 (pt)
BR (1) BR0316994A (pt)
MX (1) MXPA05005820A (pt)
WO (1) WO2004053787A1 (pt)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100602621B1 (ko) * 2004-06-16 2006-07-19 한국조폐공사 조립식 콤비카드 및 이의 제조방법
DE102005058101B4 (de) * 2005-12-05 2019-04-25 Smartrac Ip B.V. Chipkarte und Verfahren zur Herstellung einer Chipkarte
US20070290048A1 (en) * 2006-06-20 2007-12-20 Innovatier, Inc. Embedded electronic device and method for manufacturing an embedded electronic device
US20080076474A1 (en) * 2006-09-21 2008-03-27 Taisys Technologies Co., Ltd. Laminated card assembly
CN101986773B (zh) * 2010-11-03 2012-07-04 东莞红板多层线路板有限公司 软硬结合线路板的制作方法
US8763912B1 (en) * 2013-03-29 2014-07-01 Identive Group, Inc. Dual interface module and dual interface card having a dual interface module
US9167691B2 (en) 2013-04-16 2015-10-20 Identive Group, Inc. Dual interface module and dual interface card having a dual interface module manufactured using laser welding
JP5989198B2 (ja) * 2015-07-17 2016-09-07 株式会社トッパンTdkレーベル 非接触通信媒体の製造方法、及びアンテナと回路装置の接続方法
KR102064187B1 (ko) * 2018-06-21 2020-01-09 쎄네스테크놀로지(주) 접합 성능이 개선된 콤비카드 제조방법

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6134687A (ja) 1984-07-26 1986-02-18 Dainippon Printing Co Ltd Icカ−ド
JPS61131185A (ja) 1984-11-30 1986-06-18 Casio Comput Co Ltd Icカ−ド
JPH03112690A (ja) 1989-09-28 1991-05-14 Toppan Printing Co Ltd Icカードおよびその製造方法
US5528222A (en) * 1994-09-09 1996-06-18 International Business Machines Corporation Radio frequency circuit and memory in thin flexible package
DE19609636C1 (de) * 1996-03-12 1997-08-14 Siemens Ag Chipkarte und Verfahren zur Herstellung einer Chipkarte
US6259158B1 (en) * 1996-12-26 2001-07-10 Hitachi, Ltd. Semiconductor device utilizing an external electrode with a small pitch connected to a substrate
JPH10255011A (ja) * 1997-03-11 1998-09-25 Nippon Telegr & Teleph Corp <Ntt> 非接触型icカードの保護方法およびその装置
JP3418322B2 (ja) * 1997-08-28 2003-06-23 日本電信電話株式会社 使用状態表示機能付きicカードおよびicカードシステム
JP2000315249A (ja) 1999-04-30 2000-11-14 Matsushita Electric Ind Co Ltd 接触・非接触兼用icカードとその製造方法
DE10107072B4 (de) * 2001-02-13 2009-11-19 Hid Global Gmbh Verfahren zur Herstellung einer Chipkarte
WO2003015169A1 (fr) * 2001-08-07 2003-02-20 Renesas Technology Corp. Dispositif semi-conducteur et carte ci

Also Published As

Publication number Publication date
US7253024B2 (en) 2007-08-07
EP1570421A4 (en) 2009-05-27
US20050224941A1 (en) 2005-10-13
WO2004053787A1 (en) 2004-06-24
JP2006510130A (ja) 2006-03-23
AU2003208049B2 (en) 2007-04-05
MXPA05005820A (es) 2006-02-08
AU2003208049A1 (en) 2004-06-30
EP1570421A1 (en) 2005-09-07

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Legal Events

Date Code Title Description
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 5A,6A E 7A ANUIDADES.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE AO DESPACHO 8.6 PUBLICADO NA RPI 2073 DE 28/09/2010.