MXPA05005820A - Metodo para la fabricacion de tarjeta de circuito integrado mediante laminacion de varias hojas. - Google Patents

Metodo para la fabricacion de tarjeta de circuito integrado mediante laminacion de varias hojas.

Info

Publication number
MXPA05005820A
MXPA05005820A MXPA05005820A MXPA05005820A MXPA05005820A MX PA05005820 A MXPA05005820 A MX PA05005820A MX PA05005820 A MXPA05005820 A MX PA05005820A MX PA05005820 A MXPA05005820 A MX PA05005820A MX PA05005820 A MXPA05005820 A MX PA05005820A
Authority
MX
Mexico
Prior art keywords
foils
laminating
card
manufacturing
cob
Prior art date
Application number
MXPA05005820A
Other languages
English (en)
Inventor
Hong Jun Yu
Original Assignee
Jt Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020020077164A external-priority patent/KR20040049981A/ko
Priority claimed from KR1020030002366A external-priority patent/KR100545127B1/ko
Priority claimed from KR10-2003-0002592A external-priority patent/KR100515001B1/ko
Application filed by Jt Corp filed Critical Jt Corp
Publication of MXPA05005820A publication Critical patent/MXPA05005820A/es

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/0772—Physical layout of the record carrier
    • G06K19/07722—Physical layout of the record carrier the record carrier being multilayered, e.g. laminated sheets
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/07773—Antenna details
    • G06K19/07777—Antenna details the antenna being of the inductive type
    • G06K19/07779—Antenna details the antenna being of the inductive type the inductive antenna being a coil
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05568—Disposition the whole external layer protruding from the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05573—Single external layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Credit Cards Or The Like (AREA)

Abstract

La presente invencion ofrece un metodo para la fabricacion de tarjetas de circuito integrado mediante la laminacion de varias hojas. El metodo de la presente invencion incluye los pasos de colocar un COB, un electrodo de contacto del COB que hace frente hacia abajo; colocar por lo menos dos hojas que tienen un orifico, en donde dicho COB es insertado en dichos orificios respectivos de las hojas; colocar una hoja que no tiene orificio en las hojas que tienen un orificio; y comprimir todas las hojas.
MXPA05005820A 2002-12-06 2003-02-13 Metodo para la fabricacion de tarjeta de circuito integrado mediante laminacion de varias hojas. MXPA05005820A (es)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR1020020077164A KR20040049981A (ko) 2002-12-06 2002-12-06 호일 적층을 통한 ｉｃ카드 제조방법
KR1020030002366A KR100545127B1 (ko) 2003-01-14 2003-01-14 호일 적층을 통한 콤비형 ｉｃ 카드 반제품 및 그 제조방법
KR10-2003-0002592A KR100515001B1 (ko) 2003-01-15 2003-01-15 호일 적층을 통한 콤비형 ｉｃ 카드 반제품 및 그 제조방법
PCT/KR2003/000304 WO2004053787A1 (en) 2002-12-06 2003-02-13 Method for manufacturing ic card by laminating a plurality of foils

Publications (1)

Publication Number Publication Date
MXPA05005820A true MXPA05005820A (es) 2006-02-08

Family

ID=36165433

Family Applications (1)

Application Number Title Priority Date Filing Date
MXPA05005820A MXPA05005820A (es) 2002-12-06 2003-02-13 Metodo para la fabricacion de tarjeta de circuito integrado mediante laminacion de varias hojas.

Country Status (7)

Country Link
US (1) US7253024B2 (es)
EP (1) EP1570421A4 (es)
JP (1) JP2006510130A (es)
AU (1) AU2003208049B2 (es)
BR (1) BR0316994A (es)
MX (1) MXPA05005820A (es)
WO (1) WO2004053787A1 (es)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100602621B1 (ko) * 2004-06-16 2006-07-19 한국조폐공사 조립식 콤비카드 및 이의 제조방법
DE102005058101B4 (de) * 2005-12-05 2019-04-25 Smartrac Ip B.V. Chipkarte und Verfahren zur Herstellung einer Chipkarte
US20070290048A1 (en) * 2006-06-20 2007-12-20 Innovatier, Inc. Embedded electronic device and method for manufacturing an embedded electronic device
US20080076474A1 (en) * 2006-09-21 2008-03-27 Taisys Technologies Co., Ltd. Laminated card assembly
CN101986773B (zh) * 2010-11-03 2012-07-04 东莞红板多层线路板有限公司 软硬结合线路板的制作方法
US8763912B1 (en) * 2013-03-29 2014-07-01 Identive Group, Inc. Dual interface module and dual interface card having a dual interface module
US9167691B2 (en) 2013-04-16 2015-10-20 Identive Group, Inc. Dual interface module and dual interface card having a dual interface module manufactured using laser welding
JP5989198B2 (ja) * 2015-07-17 2016-09-07 株式会社トッパンＴｄｋレーベル 非接触通信媒体の製造方法、及びアンテナと回路装置の接続方法
KR102064187B1 (ko) * 2018-06-21 2020-01-09 쎄네스테크놀로지(주) 접합 성능이 개선된 콤비카드 제조방법

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6134687A (ja) * 1984-07-26 1986-02-18 Dainippon Printing Co Ltd Ｉｃカ−ド
JPS61131185A (ja) * 1984-11-30 1986-06-18 Casio Comput Co Ltd Ｉｃカ−ド
JPH03112690A (ja) * 1989-09-28 1991-05-14 Toppan Printing Co Ltd Ｉｃカードおよびその製造方法
US5528222A (en) * 1994-09-09 1996-06-18 International Business Machines Corporation Radio frequency circuit and memory in thin flexible package
DE19609636C1 (de) * 1996-03-12 1997-08-14 Siemens Ag Chipkarte und Verfahren zur Herstellung einer Chipkarte
US6259158B1 (en) * 1996-12-26 2001-07-10 Hitachi, Ltd. Semiconductor device utilizing an external electrode with a small pitch connected to a substrate
JPH10255011A (ja) 1997-03-11 1998-09-25 Nippon Telegr & Teleph Corp <Ntt> 非接触型ｉｃカードの保護方法およびその装置
JP3418322B2 (ja) * 1997-08-28 2003-06-23 日本電信電話株式会社 使用状態表示機能付きｉｃカードおよびｉｃカードシステム
JP2000315249A (ja) * 1999-04-30 2000-11-14 Matsushita Electric Ind Co Ltd 接触・非接触兼用ｉｃカードとその製造方法
DE10107072B4 (de) * 2001-02-13 2009-11-19 Hid Global Gmbh Verfahren zur Herstellung einer Chipkarte
US20040212017A1 (en) * 2001-08-07 2004-10-28 Hirotaka Mizuno Semiconductor device and ic card

Also Published As

Publication number Publication date
AU2003208049B2 (en) 2007-04-05
US7253024B2 (en) 2007-08-07
US20050224941A1 (en) 2005-10-13
WO2004053787A1 (en) 2004-06-24
EP1570421A1 (en) 2005-09-07
JP2006510130A (ja) 2006-03-23
EP1570421A4 (en) 2009-05-27
AU2003208049A1 (en) 2004-06-30
BR0316994A (pt) 2005-10-25

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