AU578772B2 - Data processor system and method - Google Patents

Data processor system and method

Info

Publication number
AU578772B2
AU578772B2 AU51118/85A AU5111885A AU578772B2 AU 578772 B2 AU578772 B2 AU 578772B2 AU 51118/85 A AU51118/85 A AU 51118/85A AU 5111885 A AU5111885 A AU 5111885A AU 578772 B2 AU578772 B2 AU 578772B2
Authority
AU
Australia
Prior art keywords
data
memory
processors
plural
system bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
AU51118/85A
Other languages
English (en)
Other versions
AU5111885A (en
Inventor
Tadao Ishihara
Yoshio Kitamura
Hiroshi Takizuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of AU5111885A publication Critical patent/AU5111885A/en
Application granted granted Critical
Publication of AU578772B2 publication Critical patent/AU578772B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1647—Handling requests for interconnection or transfer for access to memory bus based on arbitration with interleaved bank access
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Multi Processors (AREA)
  • Hardware Redundancy (AREA)
  • Image Processing (AREA)
  • Processing Or Creating Images (AREA)
  • Advance Control (AREA)
  • Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
AU51118/85A 1984-12-24 1985-12-11 Data processor system and method Ceased AU578772B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP59280817A JPS61150059A (ja) 1984-12-24 1984-12-24 デ−タ処理装置
JP59-280817 1984-12-24

Publications (2)

Publication Number Publication Date
AU5111885A AU5111885A (en) 1986-07-03
AU578772B2 true AU578772B2 (en) 1988-11-03

Family

ID=17630389

Family Applications (1)

Application Number Title Priority Date Filing Date
AU51118/85A Ceased AU578772B2 (en) 1984-12-24 1985-12-11 Data processor system and method

Country Status (7)

Country Link
US (1) US4928234A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
EP (1) EP0187518B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS61150059A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
KR (1) KR940005816B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
AT (1) ATE73242T1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
AU (1) AU578772B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE3585519D1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

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US5369775A (en) * 1988-12-20 1994-11-29 Mitsubishi Denki Kabushiki Kaisha Data-flow processing system having an input packet limiting section for preventing packet input based upon a threshold value indicative of an optimum pipeline processing capacity
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JPH0740241B2 (ja) * 1989-01-17 1995-05-01 富士通株式会社 リクエストキャンセル方式
KR930002316B1 (ko) * 1989-05-10 1993-03-29 미쯔비시덴끼 가부시끼가이샤 버스제어방법 및 화상처리 장치
JPH03142678A (ja) * 1989-10-30 1991-06-18 Toshiba Corp 電子ファイリングシステム
GB2248322B (en) * 1990-09-25 1994-04-06 Sony Broadcast & Communication Memory apparatus
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US5420965A (en) * 1992-06-05 1995-05-30 Software Projects, Inc. Single pass method of compressing data transmitted to command driven terminal
JP2679540B2 (ja) * 1992-07-15 1997-11-19 ヤマハ株式会社 メモリ制御装置
US5732041A (en) * 1993-08-19 1998-03-24 Mmc Networks, Inc. Memory interface unit, shared memory switch system and associated method
US5440523A (en) * 1993-08-19 1995-08-08 Multimedia Communications, Inc. Multiple-port shared memory interface and associated method
US5717950A (en) * 1994-01-11 1998-02-10 Hitachi, Ltd. Input/output device information management system for multi-computer system
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JPH08241214A (ja) * 1995-03-06 1996-09-17 Hitachi Ltd データ処理システム
US5872729A (en) * 1995-11-27 1999-02-16 Sun Microsystems, Inc. Accumulation buffer method and apparatus for graphical image processing
FR2746527B1 (fr) * 1996-03-21 1998-05-07 Suisse Electronique Microtech Dispositif de traitement d'information comportant plusieurs processeurs en parallele
US6370585B1 (en) 1997-09-05 2002-04-09 Sun Microsystems, Inc. Multiprocessing computer system employing a cluster communication launching and addressing mechanism
US5930484A (en) * 1997-09-18 1999-07-27 International Business Machines Corporation Method and system for input/output control in a multiprocessor system utilizing simultaneous variable-width bus access
US6170046B1 (en) 1997-10-28 2001-01-02 Mmc Networks, Inc. Accessing a memory system via a data or address bus that provides access to more than one part
US6378072B1 (en) * 1998-02-03 2002-04-23 Compaq Computer Corporation Cryptographic system
US6182196B1 (en) * 1998-02-20 2001-01-30 Ati International Srl Method and apparatus for arbitrating access requests to a memory
JP3139998B2 (ja) 1998-12-01 2001-03-05 株式会社東京精密 外観検査装置及び方法
US6952215B1 (en) 1999-03-31 2005-10-04 International Business Machines Corporation Method and system for graphics rendering using captured graphics hardware instructions
US6611796B1 (en) * 1999-10-20 2003-08-26 Texas Instruments Incorporated Method and apparatus for combining memory blocks for in circuit emulation
GB2381338B (en) * 2001-10-26 2006-04-26 Hewlett Packard Co Improvements in or relating to processing data
US8732368B1 (en) * 2005-02-17 2014-05-20 Hewlett-Packard Development Company, L.P. Control system for resource selection between or among conjoined-cores
US20070239897A1 (en) * 2006-03-29 2007-10-11 Rothman Michael A Compressing or decompressing packet communications from diverse sources
KR100813256B1 (ko) * 2006-06-23 2008-03-13 삼성전자주식회사 버스 중재 장치 및 방법
WO2008145194A1 (en) * 2007-05-31 2008-12-04 Abilis Systems Sàrl Device and method to process ofdm-based symbols in wireless network
WO2009012409A2 (en) 2007-07-17 2009-01-22 Opvista Incorporated Optical ring networks having node-to-node optical communication channels for carrying data traffic
US9170844B2 (en) * 2009-01-02 2015-10-27 International Business Machines Corporation Prioritization for conflict arbitration in transactional memory management
US9054832B2 (en) 2009-12-08 2015-06-09 Treq Labs, Inc. Management, monitoring and performance optimization of optical networks
US8705741B2 (en) 2010-02-22 2014-04-22 Vello Systems, Inc. Subchannel security at the optical layer
US20120066444A1 (en) * 2010-09-14 2012-03-15 Advanced Micro Devices, Inc. Resolution Enhancement of Video Stream Based on Spatial and Temporal Correlation
US8542999B2 (en) 2011-02-01 2013-09-24 Vello Systems, Inc. Minimizing bandwidth narrowing penalties in a wavelength selective switch optical network
US10241941B2 (en) * 2015-06-29 2019-03-26 Nxp Usa, Inc. Systems and methods for asymmetric memory access to memory banks within integrated circuit systems

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Also Published As

Publication number Publication date
US4928234A (en) 1990-05-22
JPS61150059A (ja) 1986-07-08
KR940005816B1 (ko) 1994-06-23
DE3585519D1 (de) 1992-04-09
ATE73242T1 (de) 1992-03-15
AU5111885A (en) 1986-07-03
KR860005284A (ko) 1986-07-21
EP0187518B1 (en) 1992-03-04
JPH0542702B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-06-29
EP0187518A2 (en) 1986-07-16
EP0187518A3 (en) 1988-08-03

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