AU5786900A - Semiconductor device arrangement having configuration via adjacent bond pad coding - Google Patents

Semiconductor device arrangement having configuration via adjacent bond pad coding

Info

Publication number
AU5786900A
AU5786900A AU57869/00A AU5786900A AU5786900A AU 5786900 A AU5786900 A AU 5786900A AU 57869/00 A AU57869/00 A AU 57869/00A AU 5786900 A AU5786900 A AU 5786900A AU 5786900 A AU5786900 A AU 5786900A
Authority
AU
Australia
Prior art keywords
semiconductor device
bond pad
device arrangement
configuration via
adjacent bond
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU57869/00A
Other languages
English (en)
Inventor
Philippe Silvestre
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Philips Semiconductors Inc
Original Assignee
Philips Semiconductors Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Semiconductors Inc filed Critical Philips Semiconductors Inc
Publication of AU5786900A publication Critical patent/AU5786900A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00—Electrical arrangements for controlling or matching impedance
    • H10W44/20—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF]
    • H10W44/203—Electrical connections
    • H10W44/206—Wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07551—Controlling the environment, e.g. atmosphere composition or temperature characterised by changes in properties of the bond wires during the connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H10W72/5473—Dispositions of multiple bond wires multiple bond wires connected to a common bond pad
AU57869/00A 1999-07-07 2000-07-05 Semiconductor device arrangement having configuration via adjacent bond pad coding Abandoned AU5786900A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09348793 1999-07-07
US09/348,793 US6246107B1 (en) 1999-07-07 1999-07-07 Semiconductor device arrangement having configuration via adjacent bond pad coding
PCT/US2000/018435 WO2001004952A1 (en) 1999-07-07 2000-07-05 Semiconductor device arrangement having configuration via adjacent bond pad coding

Publications (1)

Publication Number Publication Date
AU5786900A true AU5786900A (en) 2001-01-30

Family

ID=23369559

Family Applications (1)

Application Number Title Priority Date Filing Date
AU57869/00A Abandoned AU5786900A (en) 1999-07-07 2000-07-05 Semiconductor device arrangement having configuration via adjacent bond pad coding

Country Status (6)

Country Link
US (1) US6246107B1 (https=)
EP (1) EP1118121B1 (https=)
JP (1) JP4902917B2 (https=)
AU (1) AU5786900A (https=)
DE (1) DE60043922D1 (https=)
WO (1) WO2001004952A1 (https=)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6798076B2 (en) * 1999-12-21 2004-09-28 Intel Corporation Method and apparatus for encoding information in an IC package
US7088002B2 (en) * 2000-12-18 2006-08-08 Intel Corporation Interconnect
US6903448B1 (en) 2002-11-12 2005-06-07 Marvell International Ltd. High performance leadframe in electronic package
US7119448B1 (en) * 2004-10-18 2006-10-10 National Semiconductor Corporation Main power inductance based on bond wires for a switching power converter
DE102006044016A1 (de) * 2006-09-15 2008-04-03 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Stapelbare Funktionsschicht für ein modulares mikroelektronisches System
DE102007040871A1 (de) * 2007-08-29 2009-03-12 Osram Gesellschaft mit beschränkter Haftung Verbindungselement
US7825527B2 (en) * 2008-06-13 2010-11-02 Altera Corporation Return loss techniques in wirebond packages for high-speed data communications
US8829685B2 (en) * 2009-03-31 2014-09-09 Semiconductor Components Industries, Llc Circuit device having funnel shaped lead and method for manufacturing the same
TWI607548B (zh) * 2016-02-05 2017-12-01 友達光電股份有限公司 自發光型顯示器

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3478229A (en) 1968-04-29 1969-11-11 American Micro Syst Multifunction circuit device
US3648116A (en) 1970-09-17 1972-03-07 Rca Corp Multicircuit hybrid module and method for making
JPS59165439A (ja) * 1983-03-09 1984-09-18 Fujitsu Ltd 半導体装置
US4558345A (en) 1983-10-27 1985-12-10 Rca Corporation Multiple connection bond pad for an integrated circuit device and method of making same
KR960013630B1 (ko) * 1986-06-30 1996-10-10 페어차일드 세미콘덕터 코퍼레이션 집적회로에서의 접지 변동 감소 장치
US5066831A (en) 1987-10-23 1991-11-19 Honeywell Inc. Universal semiconductor chip package
US5161124A (en) 1988-10-27 1992-11-03 Texas Instruments Incorporated Bond programmable integrated circuit
NL9100321A (nl) 1991-02-22 1992-09-16 Tulip Computers International Inrichting voor het op n verschillende manieren met bedradingssporen op een printplaat verbinden van de aansluitpennen van een in een dual-in-line (dil)-behuizing ondergebrachte geintegreerde schakeling.
JPH04307943A (ja) 1991-04-05 1992-10-30 Mitsubishi Electric Corp 半導体装置
JP2681427B2 (ja) 1992-01-06 1997-11-26 三菱電機株式会社 半導体装置
JPH05215504A (ja) 1992-02-05 1993-08-24 Mitsubishi Electric Corp 位置検出装置
US5264664A (en) 1992-04-20 1993-11-23 International Business Machines Corporation Programmable chip to circuit board connection
JPH06310558A (ja) 1993-04-20 1994-11-04 Sanyo Electric Co Ltd Ｉｃチップ
JPH07202111A (ja) * 1993-12-28 1995-08-04 Toshiba Corp 樹脂封止型半導体装置用リ−ドフレ−ム及び樹脂封止型半導体装置
US5698903A (en) 1995-05-09 1997-12-16 United Memories, Inc. Bond pad option for integrated circuits
US5646451A (en) 1995-06-07 1997-07-08 Lucent Technologies Inc. Multifunctional chip wire bonds
US5675178A (en) 1995-11-22 1997-10-07 Cypress Semiconductor Corp. No-bond integrated circuit inputs
US5701234A (en) 1995-12-06 1997-12-23 Pacesetter, Inc. Surface mount component for selectively configuring a printed circuit board and method for using the same
US5703759A (en) 1995-12-07 1997-12-30 Xilinx, Inc. Multi-chip electrically reconfigurable module with predominantly extra-package inter-chip connections
US5754879A (en) 1996-09-23 1998-05-19 Motorola, Inc. Integrated circuit for external bus interface having programmable mode select by selectively bonding one of the bond pads to a reset terminal via a conductive wire
US5805428A (en) 1996-12-20 1998-09-08 Compaq Computer Corporation Transistor/resistor printed circuit board layout
US6097098A (en) * 1997-02-14 2000-08-01 Micron Technology, Inc. Die interconnections using intermediate connection elements secured to the die face
CA2232843C (en) * 1997-03-25 2002-03-12 Koichi Haruta Plastic package, semiconductor device, and method of manufacturing plastic package
JP3545200B2 (ja) * 1997-04-17 2004-07-21 シャープ株式会社 半導体装置
JPH1131777A (ja) * 1997-07-11 1999-02-02 Mitsubishi Electric Corp リードフレームおよび半導体装置とその製造方法
US6008533A (en) * 1997-12-08 1999-12-28 Micron Technology, Inc. Controlling impedances of an integrated circuit
US5914529A (en) * 1998-02-20 1999-06-22 Micron Technology, Inc. Bus bar structure on lead frame of semiconductor device package

Also Published As

Publication number Publication date
EP1118121A1 (en) 2001-07-25
US6246107B1 (en) 2001-06-12
JP2003504874A (ja) 2003-02-04
DE60043922D1 (de) 2010-04-15
EP1118121B1 (en) 2010-03-03
JP4902917B2 (ja) 2012-03-21
WO2001004952A1 (en) 2001-01-18

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase