AU1648801A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
AU1648801A
AU1648801A AU16488/01A AU1648801A AU1648801A AU 1648801 A AU1648801 A AU 1648801A AU 16488/01 A AU16488/01 A AU 16488/01A AU 1648801 A AU1648801 A AU 1648801A AU 1648801 A AU1648801 A AU 1648801A
Authority
AU
Australia
Prior art keywords
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU16488/01A
Inventor
Kazuhiko Kajigaya
Katsutaka Kimura
Tomonori Sekiguchi
Tsugio Takahashi
Riichiro Takemura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of AU1648801A publication Critical patent/AU1648801A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/09—Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/50—Peripheral circuit region structures
AU16488/01A 1999-12-03 2000-11-29 Semiconductor device Abandoned AU1648801A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP34424199 1999-12-03
JP11/344241 1999-12-03
PCT/JP2000/008424 WO2001041211A1 (en) 1999-12-03 2000-11-29 Semiconductor device

Publications (1)

Publication Number Publication Date
AU1648801A true AU1648801A (en) 2001-06-12

Family

ID=18367730

Family Applications (1)

Application Number Title Priority Date Filing Date
AU16488/01A Abandoned AU1648801A (en) 1999-12-03 2000-11-29 Semiconductor device

Country Status (6)

Country Link
US (4) US6400596B2 (en)
KR (1) KR100688237B1 (en)
CN (1) CN1260810C (en)
AU (1) AU1648801A (en)
TW (1) TW503396B (en)
WO (1) WO2001041211A1 (en)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW503396B (en) * 1999-12-03 2002-09-21 Hitachi Ltd Semiconductor device
JP2001273788A (en) * 2000-03-29 2001-10-05 Hitachi Ltd Semiconductor memory
JP4392680B2 (en) * 2002-09-05 2010-01-06 エルピーダメモリ株式会社 Semiconductor memory device
US7146596B2 (en) * 2003-08-29 2006-12-05 International Business Machines Corporation Integrated circuit chip having a ringed wiring layer interposed between a contact layer and a wiring grid
KR100706233B1 (en) 2004-10-08 2007-04-11 삼성전자주식회사 Semiconductor memory device and method of fabricating the same
US7547936B2 (en) * 2004-10-08 2009-06-16 Samsung Electronics Co., Ltd. Semiconductor memory devices including offset active regions
KR100621554B1 (en) * 2005-08-01 2006-09-11 삼성전자주식회사 Semiconductor memory device
JP4509887B2 (en) * 2005-08-05 2010-07-21 パナソニック株式会社 Semiconductor memory device
JP4907967B2 (en) * 2005-12-01 2012-04-04 ルネサスエレクトロニクス株式会社 Semiconductor memory device
KR100827694B1 (en) * 2006-11-09 2008-05-07 삼성전자주식회사 Layout structure for sub word line drivers for use in semiconductor memory device
US8243484B2 (en) * 2007-03-30 2012-08-14 Rambus Inc. Adjustable width strobe interface
US7800965B2 (en) 2008-03-10 2010-09-21 Micron Technology, Inc. Digit line equilibration using access devices at the edge of sub-arrays
JP2012043486A (en) * 2010-08-13 2012-03-01 Elpida Memory Inc Semiconductor device
KR20120018016A (en) * 2010-08-20 2012-02-29 삼성전자주식회사 Bit line sense amplifier layout array, layout method, and apparatus having the same
KR101906946B1 (en) * 2011-12-02 2018-10-12 삼성전자주식회사 High density semiconductor memory device
TWI630607B (en) * 2016-09-09 2018-07-21 東芝記憶體股份有限公司 Memory device
JP2019054102A (en) * 2017-09-14 2019-04-04 東芝メモリ株式会社 Memory device and method of manufacturing the same
CN114255802B (en) * 2020-09-22 2023-09-15 长鑫存储技术有限公司 integrated circuit
TWI746303B (en) * 2020-12-07 2021-11-11 華邦電子股份有限公司 Layout of wordline and method of forming the same

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6413290A (en) * 1987-07-07 1989-01-18 Oki Electric Ind Co Ltd Semiconductor memory
JP2691280B2 (en) * 1988-05-12 1997-12-17 三菱電機株式会社 Semiconductor memory device
JPH0541081A (en) 1991-08-02 1993-02-19 Fujitsu Ltd Dynamic ram
JP3302796B2 (en) * 1992-09-22 2002-07-15 株式会社東芝 Semiconductor storage device
US5838038A (en) * 1992-09-22 1998-11-17 Kabushiki Kaisha Toshiba Dynamic random access memory device with the combined open/folded bit-line pair arrangement
JPH08172169A (en) * 1994-12-16 1996-07-02 Toshiba Microelectron Corp Semiconductor storage device
JP3247573B2 (en) * 1995-04-12 2002-01-15 株式会社東芝 Dynamic semiconductor memory device
JP3305919B2 (en) * 1995-05-17 2002-07-24 株式会社東芝 Exposure mask and exposure method
JP2803712B2 (en) 1995-11-10 1998-09-24 日本電気株式会社 Semiconductor storage device
US6043562A (en) * 1996-01-26 2000-03-28 Micron Technology, Inc. Digit line architecture for dynamic memory
JP3633354B2 (en) * 1999-03-29 2005-03-30 株式会社日立製作所 Semiconductor device
TW503396B (en) * 1999-12-03 2002-09-21 Hitachi Ltd Semiconductor device

Also Published As

Publication number Publication date
US6538912B2 (en) 2003-03-25
US20010002702A1 (en) 2001-06-07
KR100688237B1 (en) 2007-02-28
CN1391702A (en) 2003-01-15
WO2001041211A1 (en) 2001-06-07
US6845028B2 (en) 2005-01-18
US20030142528A1 (en) 2003-07-31
CN1260810C (en) 2006-06-21
US20040080971A1 (en) 2004-04-29
US6671198B2 (en) 2003-12-30
US20020126520A1 (en) 2002-09-12
TW503396B (en) 2002-09-21
US6400596B2 (en) 2002-06-04
KR20020084062A (en) 2002-11-04

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase