AU2003298793A1 - Apparatus and method for a current limiting bleeder device shared by columns of different memory arrays - Google Patents

Apparatus and method for a current limiting bleeder device shared by columns of different memory arrays

Info

Publication number
AU2003298793A1
AU2003298793A1 AU2003298793A AU2003298793A AU2003298793A1 AU 2003298793 A1 AU2003298793 A1 AU 2003298793A1 AU 2003298793 A AU2003298793 A AU 2003298793A AU 2003298793 A AU2003298793 A AU 2003298793A AU 2003298793 A1 AU2003298793 A1 AU 2003298793A1
Authority
AU
Australia
Prior art keywords
columns
current limiting
memory arrays
different memory
device shared
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003298793A
Other languages
English (en)
Inventor
Howard C. Kirsch
George B. Raad
J. Wayne Thompson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of AU2003298793A1 publication Critical patent/AU2003298793A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4094Bit-line management or control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4097Bit-line organisation, e.g. bit-line layout, folded bit lines
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/005Transfer gates, i.e. gates coupling the sense amplifier output to data lines, I/O lines or global bit lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
AU2003298793A 2002-12-03 2003-12-01 Apparatus and method for a current limiting bleeder device shared by columns of different memory arrays Abandoned AU2003298793A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/309,572 US6934208B2 (en) 2002-12-03 2002-12-03 Apparatus and method for a current limiting bleeder device shared by columns of different memory arrays
US10/309,572 2002-12-03
PCT/US2003/038226 WO2004051662A2 (en) 2002-12-03 2003-12-01 Apparatus and method for a current limiting bleeder device shared by columns of different memory arrays

Publications (1)

Publication Number Publication Date
AU2003298793A1 true AU2003298793A1 (en) 2004-06-23

Family

ID=32392903

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003298793A Abandoned AU2003298793A1 (en) 2002-12-03 2003-12-01 Apparatus and method for a current limiting bleeder device shared by columns of different memory arrays

Country Status (8)

Country Link
US (1) US6934208B2 (enExample)
EP (1) EP1576347A2 (enExample)
JP (1) JP2006518523A (enExample)
KR (1) KR100788182B1 (enExample)
CN (1) CN101405809A (enExample)
AU (1) AU2003298793A1 (enExample)
TW (1) TWI285899B (enExample)
WO (1) WO2004051662A2 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6934208B2 (en) 2002-12-03 2005-08-23 Boise Technology, Inc. Apparatus and method for a current limiting bleeder device shared by columns of different memory arrays
KR100587080B1 (ko) * 2004-05-17 2006-06-08 주식회사 하이닉스반도체 메모리 장치의 감지 증폭기를 제어하여 컬럼성 페일을검출하는 방법 및 그 장치
US7698607B2 (en) * 2004-06-15 2010-04-13 Intel Corporation Repairing microdisplay frame buffers
US10020038B1 (en) 2017-04-14 2018-07-10 Micron Technology, Inc. Apparatuses and methods for controlling wordlines and sense amplifiers

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5235550A (en) * 1991-05-16 1993-08-10 Micron Technology, Inc. Method for maintaining optimum biasing voltage and standby current levels in a DRAM array having repaired row-to-column shorts
US5499211A (en) * 1995-03-13 1996-03-12 International Business Machines Corporation Bit-line precharge current limiter for CMOS dynamic memories
JP3782227B2 (ja) * 1997-03-11 2006-06-07 株式会社東芝 半導体記憶装置
US5896334A (en) * 1997-08-14 1999-04-20 Micron Technology, Inc. Circuit and method for memory device with defect current isolation
JP3505373B2 (ja) * 1997-11-14 2004-03-08 株式会社東芝 半導体記憶装置
JP2000077628A (ja) * 1998-06-19 2000-03-14 Toshiba Corp 半導体記憶装置
US6078538A (en) * 1998-08-20 2000-06-20 Micron Technology, Inc. Method and apparatus for reducing bleed currents within a DRAM array having row-to-column shorts
JP2001052476A (ja) * 1999-08-05 2001-02-23 Mitsubishi Electric Corp 半導体装置
US6356492B1 (en) * 2000-08-16 2002-03-12 Micron Technology, Inc. Method and apparatus for reducing current drain caused by row to column shorts in a memory device
US6333882B1 (en) * 2000-08-25 2001-12-25 Micron Technology, Inc. Equilibration/pre-charge circuit for a memory device
US6678199B1 (en) * 2002-06-19 2004-01-13 Micron Technology, Inc. Memory device with sense amp equilibration circuit
US6934208B2 (en) 2002-12-03 2005-08-23 Boise Technology, Inc. Apparatus and method for a current limiting bleeder device shared by columns of different memory arrays

Also Published As

Publication number Publication date
US6934208B2 (en) 2005-08-23
TW200428403A (en) 2004-12-16
US20040105333A1 (en) 2004-06-03
WO2004051662A2 (en) 2004-06-17
CN101405809A (zh) 2009-04-08
EP1576347A2 (en) 2005-09-21
KR20050084162A (ko) 2005-08-26
TWI285899B (en) 2007-08-21
JP2006518523A (ja) 2006-08-10
KR100788182B1 (ko) 2008-01-02

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase