AU2001242703A1 - A method of forming an opening or cavity in a substrate for receiving an electronic component - Google Patents

A method of forming an opening or cavity in a substrate for receiving an electronic component

Info

Publication number
AU2001242703A1
AU2001242703A1 AU2001242703A AU4270301A AU2001242703A1 AU 2001242703 A1 AU2001242703 A1 AU 2001242703A1 AU 2001242703 A AU2001242703 A AU 2001242703A AU 4270301 A AU4270301 A AU 4270301A AU 2001242703 A1 AU2001242703 A1 AU 2001242703A1
Authority
AU
Australia
Prior art keywords
cavity
substrate
receiving
opening
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001242703A
Other languages
English (en)
Inventor
John Gregory
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STS ATL Corp
Original Assignee
STS ATL Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GBGB0012754.8A external-priority patent/GB0012754D0/en
Application filed by STS ATL Corp filed Critical STS ATL Corp
Publication of AU2001242703A1 publication Critical patent/AU2001242703A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
    • H01L21/481—Insulating layers on insulating parts, with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0154—Polyimide
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0388—Other aspects of conductors
    • H05K2201/0397—Tab
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09063—Holes or slots in insulating substrate not used for electrical connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0207—Partly drilling through substrate until a controlled depth, e.g. with end-point detection
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/025—Abrading, e.g. grinding or sand blasting

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Optics & Photonics (AREA)
  • Laser Beam Processing (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Wire Bonding (AREA)
  • Manufacturing Of Printed Wiring (AREA)
AU2001242703A 2000-02-28 2001-02-26 A method of forming an opening or cavity in a substrate for receiving an electronic component Abandoned AU2001242703A1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US51425700A 2000-02-28 2000-02-28
US09514257 2000-02-28
GB0012754 2000-05-26
GBGB0012754.8A GB0012754D0 (en) 2000-02-28 2000-05-26 Apparatus for forming interconnects on a substrate and related method
PCT/IB2001/000555 WO2001065595A2 (fr) 2000-02-28 2001-02-26 Procede pour former dans un substrat une ouverture ou une cavite destinee a recevoir un composant electronique

Publications (1)

Publication Number Publication Date
AU2001242703A1 true AU2001242703A1 (en) 2001-09-12

Family

ID=26244351

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001242703A Abandoned AU2001242703A1 (en) 2000-02-28 2001-02-26 A method of forming an opening or cavity in a substrate for receiving an electronic component

Country Status (5)

Country Link
EP (1) EP1340414A2 (fr)
JP (1) JP2003526205A (fr)
CN (2) CN100366132C (fr)
AU (1) AU2001242703A1 (fr)
WO (1) WO2001065595A2 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10213879C1 (de) * 2002-03-27 2003-07-10 Infineon Technologies Ag Elektronisches Bauteil
DE10213881C1 (de) * 2002-03-27 2003-10-02 Infineon Technologies Ag Speichermodul mit aneinander haftenden Halbleiterchips und Herstellung sverfahren
WO2010006067A2 (fr) * 2008-07-09 2010-01-14 Fei Company Procédé et appareil d'usinage laser
CN102110866B (zh) * 2009-12-24 2013-08-28 深南电路有限公司 波导槽制作工艺

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3608410A1 (de) * 1986-03-13 1987-09-17 Siemens Ag Herstellung von feinstrukturen fuer die halbleiterkontaktierung
JPH0793485B2 (ja) * 1988-05-16 1995-10-09 カシオ計算機株式会社 Ｉｃユニットの接続方法
DE4326424A1 (de) * 1993-08-06 1995-02-09 Ant Nachrichtentech Verfahren zum Herstellen von TAB-Filmträgern
GB2286787A (en) * 1994-02-26 1995-08-30 Oxford Lasers Ltd Selective machining by dual wavelength laser
GB9420182D0 (en) * 1994-10-06 1994-11-23 Int Computers Ltd Printed circuit manufacture
JP3593234B2 (ja) * 1996-04-23 2004-11-24 日立電線株式会社 半導体装置用両面配線テープキャリアの製造方法
JPH1098081A (ja) * 1996-09-24 1998-04-14 Hitachi Cable Ltd 半導体チップ実装用のテープキャリア及びその製造方法
FR2766654B1 (fr) * 1997-07-28 2005-05-20 Matsushita Electric Works Ltd Procede de fabrication d'une carte de circuit imprime
JP3506002B2 (ja) * 1997-07-28 2004-03-15 松下電工株式会社 プリント配線板の製造方法

Also Published As

Publication number Publication date
EP1340414A2 (fr) 2003-09-03
WO2001065595A2 (fr) 2001-09-07
WO2001065595A3 (fr) 2002-01-03
CN100366132C (zh) 2008-01-30
JP2003526205A (ja) 2003-09-02
CN1406452A (zh) 2003-03-26
CN1668167A (zh) 2005-09-14

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