ATE77184T1 - Integrierte geschaltete uebertragungsschaltung. - Google Patents
Integrierte geschaltete uebertragungsschaltung.Info
- Publication number
- ATE77184T1 ATE77184T1 AT86306965T AT86306965T ATE77184T1 AT E77184 T1 ATE77184 T1 AT E77184T1 AT 86306965 T AT86306965 T AT 86306965T AT 86306965 T AT86306965 T AT 86306965T AT E77184 T1 ATE77184 T1 AT E77184T1
- Authority
- AT
- Austria
- Prior art keywords
- energisations
- transmission circuit
- control electrode
- pass transistor
- single signal
- Prior art date
Links
- 230000005540 biological transmission Effects 0.000 title 1
- 230000005669 field effect Effects 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
- 230000008054 signal transmission Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/1778—Structural details for adapting physical parameters
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/32—Circuit design at the digital level
- G06F30/33—Design verification, e.g. functional simulation or model checking
- G06F30/3308—Design verification, e.g. functional simulation or model checking using simulation
- G06F30/331—Design verification, e.g. functional simulation or model checking using simulation with hardware acceleration, e.g. by using field programmable gate array [FPGA] or emulation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/1733—Controllable logic circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/1733—Controllable logic circuits
- H03K19/1735—Controllable logic circuits by wiring, e.g. uncommitted logic arrays
- H03K19/1736—Controllable logic circuits by wiring, e.g. uncommitted logic arrays in which the wiring can be modified
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/02—Shaping pulses by amplifying
- H03K5/026—Shaping pulses by amplifying with a bidirectional operation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Mathematical Physics (AREA)
- General Engineering & Computer Science (AREA)
- Computing Systems (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Geometry (AREA)
- Nonlinear Science (AREA)
- Evolutionary Computation (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Logic Circuits (AREA)
- Transmitters (AREA)
- Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
- Vehicle Body Suspensions (AREA)
- Electronic Switches (AREA)
- Dram (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB858526143A GB8526143D0 (en) | 1985-10-23 | 1985-10-23 | Semiconductor integrated circuits |
GB868617705A GB8617705D0 (en) | 1986-07-19 | 1986-07-19 | Semiconductor integrated circuits/systems |
EP86306965A EP0220816B1 (de) | 1985-10-23 | 1986-09-10 | Integrierte geschaltete Übertragungsschaltung |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE77184T1 true ATE77184T1 (de) | 1992-06-15 |
Family
ID=26289921
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT86306965T ATE77184T1 (de) | 1985-10-23 | 1986-09-10 | Integrierte geschaltete uebertragungsschaltung. |
Country Status (7)
Country | Link |
---|---|
US (1) | US4868419A (de) |
EP (1) | EP0220816B1 (de) |
JP (1) | JPH07109710B2 (de) |
KR (1) | KR950001951B1 (de) |
AT (1) | ATE77184T1 (de) |
DE (1) | DE3685629T2 (de) |
GB (1) | GB2182220B (de) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB8621357D0 (en) * | 1986-09-04 | 1986-10-15 | Mcallister R I | Hinged barrier semiconductor integrated circuits |
DE68925121T2 (de) * | 1988-10-05 | 1996-06-13 | Quickturn Systems Inc | Verfahren zur verwendung einer elektronisch wiederkonfigurierbaren gatterfeld-logik und dadurch hergestelltes gerät |
US5452231A (en) * | 1988-10-05 | 1995-09-19 | Quickturn Design Systems, Inc. | Hierarchically connected reconfigurable logic assembly |
US5109353A (en) | 1988-12-02 | 1992-04-28 | Quickturn Systems, Incorporated | Apparatus for emulation of electronic hardware system |
US5329470A (en) * | 1988-12-02 | 1994-07-12 | Quickturn Systems, Inc. | Reconfigurable hardware emulation system |
US5322812A (en) | 1991-03-20 | 1994-06-21 | Crosspoint Solutions, Inc. | Improved method of fabricating antifuses in an integrated circuit device and resulting structure |
CA2158467A1 (en) * | 1993-03-17 | 1994-09-29 | Richard D. Freeman | Random access memory (ram) based configurable arrays |
US5680583A (en) * | 1994-02-16 | 1997-10-21 | Arkos Design, Inc. | Method and apparatus for a trace buffer in an emulation system |
JPH08139579A (ja) * | 1994-11-15 | 1996-05-31 | Mitsubishi Electric Corp | 電流源及び半導体集積回路装置 |
US5457418A (en) * | 1994-12-05 | 1995-10-10 | National Semiconductor Corporation | Track and hold circuit with an input transistor held on during hold mode |
US5541531A (en) * | 1995-05-01 | 1996-07-30 | Ford Motor Company | Switch capacitor interface circuit |
US5841967A (en) | 1996-10-17 | 1998-11-24 | Quickturn Design Systems, Inc. | Method and apparatus for design verification using emulation and simulation |
US5960191A (en) | 1997-05-30 | 1999-09-28 | Quickturn Design Systems, Inc. | Emulation system with time-multiplexed interconnect |
US5970240A (en) * | 1997-06-25 | 1999-10-19 | Quickturn Design Systems, Inc. | Method and apparatus for configurable memory emulation |
US7379859B2 (en) | 2001-04-24 | 2008-05-27 | Mentor Graphics Corporation | Emulator with switching network connections |
US9992436B2 (en) | 2014-08-04 | 2018-06-05 | Invisage Technologies, Inc. | Scaling down pixel sizes in image sensors |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3675144A (en) * | 1969-09-04 | 1972-07-04 | Rca Corp | Transmission gate and biasing circuits |
US3718915A (en) * | 1971-06-07 | 1973-02-27 | Motorola Inc | Opposite conductivity gating circuit for refreshing information in semiconductor memory cells |
US3909674A (en) * | 1974-03-28 | 1975-09-30 | Rockwell International Corp | Protection circuit for MOS driver |
GB2048596B (en) * | 1979-04-27 | 1983-11-02 | Ch Polt I | Device for switching dc circuits |
JPS5686526A (en) * | 1979-12-17 | 1981-07-14 | Nec Corp | Latch circuit |
DE3018501A1 (de) * | 1980-05-14 | 1981-11-19 | Siemens AG, 1000 Berlin und 8000 München | Schalter mit einem als source-folger betriebenen mis-pet |
JPS5859626A (ja) * | 1981-10-05 | 1983-04-08 | Nec Corp | トランスフア−ゲ−ト回路 |
JPS5883431A (ja) * | 1981-11-13 | 1983-05-19 | Toshiba Corp | Mos型転送ゲ−ト回路 |
US4535401A (en) * | 1982-06-30 | 1985-08-13 | Texas Instruments Incorporated | Apparatus and method for providing power from master controller to subcontrollers and data communication therebetween |
US4652773A (en) * | 1982-09-30 | 1987-03-24 | Rca Corporation | Integrated circuits with electrically erasable electrically programmable latch circuits therein for controlling operation |
JPS6083294A (ja) * | 1983-10-13 | 1985-05-11 | Nec Corp | 自動リフレツシユ回路 |
US4595845A (en) * | 1984-03-13 | 1986-06-17 | Mostek Corporation | Non-overlapping clock CMOS circuit with two threshold voltages |
-
1986
- 1986-09-10 US US06/905,846 patent/US4868419A/en not_active Expired - Lifetime
- 1986-09-10 JP JP61213699A patent/JPH07109710B2/ja not_active Expired - Lifetime
- 1986-09-10 KR KR1019860007612A patent/KR950001951B1/ko not_active IP Right Cessation
- 1986-09-10 AT AT86306965T patent/ATE77184T1/de not_active IP Right Cessation
- 1986-09-10 DE DE8686306965T patent/DE3685629T2/de not_active Expired - Lifetime
- 1986-09-10 EP EP86306965A patent/EP0220816B1/de not_active Expired - Lifetime
- 1986-09-10 GB GB8621819A patent/GB2182220B/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
GB2182220A (en) | 1987-05-07 |
EP0220816A2 (de) | 1987-05-06 |
KR870004525A (ko) | 1987-05-11 |
DE3685629T2 (de) | 1993-02-11 |
EP0220816B1 (de) | 1992-06-10 |
KR950001951B1 (ko) | 1995-03-07 |
JPS62124692A (ja) | 1987-06-05 |
DE3685629D1 (de) | 1992-07-16 |
JPH07109710B2 (ja) | 1995-11-22 |
GB2182220B (en) | 1989-10-11 |
US4868419A (en) | 1989-09-19 |
GB8621819D0 (en) | 1986-10-15 |
EP0220816A3 (en) | 1988-11-23 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
UEP | Publication of translation of european patent specification | ||
REN | Ceased due to non-payment of the annual fee |