ATE69321T1 - Schaltungsanordnung zur beschleunigten umladung des spannungspegels einer bus-leitung einer integrierten schaltung. - Google Patents

Schaltungsanordnung zur beschleunigten umladung des spannungspegels einer bus-leitung einer integrierten schaltung.

Info

Publication number
ATE69321T1
ATE69321T1 AT88104685T AT88104685T ATE69321T1 AT E69321 T1 ATE69321 T1 AT E69321T1 AT 88104685 T AT88104685 T AT 88104685T AT 88104685 T AT88104685 T AT 88104685T AT E69321 T1 ATE69321 T1 AT E69321T1
Authority
AT
Austria
Prior art keywords
bus line
recharging
voltage level
circuit
accelerated
Prior art date
Application number
AT88104685T
Other languages
English (en)
Inventor
Antonio De Dipl-Ing Oliveira
Jakob Dipl-Ing Staerk
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Application granted granted Critical
Publication of ATE69321T1 publication Critical patent/ATE69321T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers
    • G06F13/4077—Precharging or discharging

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Dc Digital Transmission (AREA)
  • Logic Circuits (AREA)
  • Small-Scale Networks (AREA)
AT88104685T 1987-04-28 1988-03-23 Schaltungsanordnung zur beschleunigten umladung des spannungspegels einer bus-leitung einer integrierten schaltung. ATE69321T1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE3714134 1987-04-28
DE3743932 1987-12-23
EP88104685A EP0288740B1 (de) 1987-04-28 1988-03-23 Schaltungsanordnung zur beschleunigten Umladung des Spannungspegels einer Bus-Leitung einer integrierten Schaltung

Publications (1)

Publication Number Publication Date
ATE69321T1 true ATE69321T1 (de) 1991-11-15

Family

ID=25855029

Family Applications (1)

Application Number Title Priority Date Filing Date
AT88104685T ATE69321T1 (de) 1987-04-28 1988-03-23 Schaltungsanordnung zur beschleunigten umladung des spannungspegels einer bus-leitung einer integrierten schaltung.

Country Status (5)

Country Link
US (1) US5004937A (de)
EP (1) EP0288740B1 (de)
JP (1) JPH0821954B2 (de)
AT (1) ATE69321T1 (de)
DE (1) DE3866003D1 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5239661A (en) * 1989-08-18 1993-08-24 Mitsubishi Denki Kabushiki Kaisha Hierarchical bus circuit having decoder generating local buses and devices select signals enabling switching elements to perform data transfer operations
DE19840086A1 (de) 1998-09-03 2000-03-09 Philips Corp Intellectual Pty Schaltungsanordnung zur BIAS Einstellung von Buspegeln
US6356115B1 (en) * 1999-08-04 2002-03-12 Intel Corporation Charge sharing and charge recycling for an on-chip bus
US6938110B2 (en) * 2002-09-23 2005-08-30 Asix Electronics Corp. Virtual processor through USB

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3774053A (en) * 1971-12-17 1973-11-20 North American Rockwell Clamping arrangement for reducing the effects of noise in field effect transistor logic circuits
DE3101802A1 (de) * 1981-01-21 1982-08-19 Siemens AG, 1000 Berlin und 8000 München Monolithisch integrierter halbleiterspeicher
JPS5833739A (ja) * 1981-08-21 1983-02-28 Toshiba Corp バスライン駆動回路
US4567561A (en) * 1981-12-24 1986-01-28 International Business Machines Corp. Large scale integration data processor signal transfer mechanism
US4498021A (en) * 1982-07-13 1985-02-05 Matsushita Electric Industrial Co., Ltd. Booster for transmitting digital signal
US4488066A (en) * 1982-11-08 1984-12-11 At&T Bell Laboratories Databus coupling arrangement using transistors of complementary conductivity type
DE3486000T2 (de) * 1983-09-12 1993-06-03 Fairchild Semiconductor Integrierte mikroprozessor-schaltung.
JPH063572B2 (ja) * 1984-09-06 1994-01-12 沖電気工業株式会社 Ｃｍｏｓ集積回路
US4621202A (en) * 1984-11-13 1986-11-04 Motorola, Inc. Bi-directional bus isolation circuit
US4707623A (en) * 1986-07-29 1987-11-17 Rca Corporation CMOS input level shifting buffer circuit

Also Published As

Publication number Publication date
EP0288740A1 (de) 1988-11-02
DE3866003D1 (de) 1991-12-12
JPS63285049A (ja) 1988-11-22
JPH0821954B2 (ja) 1996-03-04
US5004937A (en) 1991-04-02
EP0288740B1 (de) 1991-11-06

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Legal Events

Date Code Title Description
REN Ceased due to non-payment of the annual fee