JPS5658331A - Clock driver circuit - Google Patents
Clock driver circuitInfo
- Publication number
- JPS5658331A JPS5658331A JP13540279A JP13540279A JPS5658331A JP S5658331 A JPS5658331 A JP S5658331A JP 13540279 A JP13540279 A JP 13540279A JP 13540279 A JP13540279 A JP 13540279A JP S5658331 A JPS5658331 A JP S5658331A
- Authority
- JP
- Japan
- Prior art keywords
- node
- mosfet
- potential
- boosting
- capacity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
- H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
- H03K19/01714—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by bootstrapping, i.e. by positive feed-back
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
- Manipulation Of Pulses (AREA)
Abstract
PURPOSE:To speed up the charging speed by transistors, by detaching a boosting capacity from the node when the node (connecting point) is charged by an MOSFET and connecting the boosting capacity to the node only at boosting. CONSTITUTION:When a clock pulse is changed from a high level to a low level during its inversion, an MOSFET 20 is off, the potential at a node 22 starts increasing, and if this potential exceeds a threshold voltage VT of an MOSFET 5, the FET 5 starts turning on. Accordingly, the potential at a node 7 increases, an MOSFET 3 starts turning on, and charging to a load capacity 2 is made. In this case, an MOSFET 24 is off and a boosting capacitor 8 is not connected to the node 7. Further, with a delay circuit consisting of two stages of inverter circuits consisting of MOSFETs 12-16, after a given time from the potential increase at the node 22, an MOSFET 10 is off, the potential at a node 11 increases, an FET 24 is on, and the increment of potential increase is delivered to the node 7 via the boosting capacity 8.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13540279A JPS5658331A (en) | 1979-10-19 | 1979-10-19 | Clock driver circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13540279A JPS5658331A (en) | 1979-10-19 | 1979-10-19 | Clock driver circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5658331A true JPS5658331A (en) | 1981-05-21 |
JPS6346613B2 JPS6346613B2 (en) | 1988-09-16 |
Family
ID=15150872
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13540279A Granted JPS5658331A (en) | 1979-10-19 | 1979-10-19 | Clock driver circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5658331A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57133589A (en) * | 1981-02-12 | 1982-08-18 | Fujitsu Ltd | Semiconductor circuit |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH038607U (en) * | 1989-06-14 | 1991-01-28 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4919213U (en) * | 1972-05-22 | 1974-02-18 |
-
1979
- 1979-10-19 JP JP13540279A patent/JPS5658331A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4919213U (en) * | 1972-05-22 | 1974-02-18 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57133589A (en) * | 1981-02-12 | 1982-08-18 | Fujitsu Ltd | Semiconductor circuit |
JPH0319638B2 (en) * | 1981-02-12 | 1991-03-15 | Fujitsu Ltd |
Also Published As
Publication number | Publication date |
---|---|
JPS6346613B2 (en) | 1988-09-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
GB1524768A (en) | Timming signal generating circuits | |
JPS6437797A (en) | Eprom device | |
JPS57106227A (en) | Buffer circuit | |
GB1491846A (en) | Monostable multivibrator circuit | |
JPS56122526A (en) | Semiconductor integrated circuit | |
JPS55136723A (en) | Booster circuit | |
JPS5658331A (en) | Clock driver circuit | |
JPS55147038A (en) | Electronic circuit | |
JPS6429116A (en) | Output driver circuit | |
JPS54132150A (en) | Sample holding amplifier | |
JPS5710534A (en) | High-voltage mos inverter and its driving method | |
JPS6478520A (en) | Power-on reset circuit | |
JPS6423617A (en) | Fet capacitance driver logic circuit | |
JPS5583340A (en) | Buffer circuit | |
JPS6422109A (en) | Semiconductor device | |
JPS56157643A (en) | Dc power source device for car | |
SU1172003A1 (en) | Pulser based on insulated-gate field-effect transistors | |
JPS6434016A (en) | Output driver circuit | |
JPS55115730A (en) | Switching circuit | |
JPS6439113A (en) | Pulse generating circuit with pulse width varying function | |
JPS56114439A (en) | Invertor circuit | |
JPS5532419A (en) | Driving circuit for step motor | |
SU1051690A1 (en) | R-s flip-flop | |
JPS57112135A (en) | Mos type analogue switch integrated circuit | |
JPS5693185A (en) | Transfer pulse control system of charge transfer element |