JPS5532419A - Driving circuit for step motor - Google Patents

Driving circuit for step motor

Info

Publication number
JPS5532419A
JPS5532419A JP10337778A JP10337778A JPS5532419A JP S5532419 A JPS5532419 A JP S5532419A JP 10337778 A JP10337778 A JP 10337778A JP 10337778 A JP10337778 A JP 10337778A JP S5532419 A JPS5532419 A JP S5532419A
Authority
JP
Japan
Prior art keywords
turned
power
step motor
capacitor
effect transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10337778A
Other languages
Japanese (ja)
Inventor
Norio Kawaguchi
Fumio Isobe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nidec Precision Corp
Original Assignee
Nidec Copal Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nidec Copal Corp filed Critical Nidec Copal Corp
Priority to JP10337778A priority Critical patent/JPS5532419A/en
Publication of JPS5532419A publication Critical patent/JPS5532419A/en
Pending legal-status Critical Current

Links

Landscapes

  • Control Of Stepping Motors (AREA)

Abstract

PURPOSE:To drive a step motor under an optimal condition, by changing the width of driving pulses depending on the variation in the voltage of power. CONSTITUTION:When a clock signal is applied to an input terminal Vin, a field- effect transistor FET2 is turned on the another field-effect transistor FET3 is turned off and a capacitor C2 is quickly charged to the voltage VDD of power. When the potential of the clock signal becomes low the field-effect transistor FET2 is turned off and the other one FET3 is turned on and the capacitor C2 is discharged through the latter transistor FET3. When the terminal voltage of the capacitor C2 falls to a half of the power voltage VDD, the action of an inverter INV is switched over and an output pulse of width corresponding to the power voltage VDD appears on an output terminal Vout. The output oulse pulse is applied to the step motor.
JP10337778A 1978-08-26 1978-08-26 Driving circuit for step motor Pending JPS5532419A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10337778A JPS5532419A (en) 1978-08-26 1978-08-26 Driving circuit for step motor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10337778A JPS5532419A (en) 1978-08-26 1978-08-26 Driving circuit for step motor

Publications (1)

Publication Number Publication Date
JPS5532419A true JPS5532419A (en) 1980-03-07

Family

ID=14352397

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10337778A Pending JPS5532419A (en) 1978-08-26 1978-08-26 Driving circuit for step motor

Country Status (1)

Country Link
JP (1) JPS5532419A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01164515U (en) * 1988-05-07 1989-11-16
JPH0393496A (en) * 1989-09-06 1991-04-18 Oki Electric Ind Co Ltd Driving circuit for stepping motor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01164515U (en) * 1988-05-07 1989-11-16
JPH0393496A (en) * 1989-09-06 1991-04-18 Oki Electric Ind Co Ltd Driving circuit for stepping motor

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