ATE551698T1 - Fehlererkennung und -korrektur in einem speicher mit verschiedenen fehlerresistenten bit-status - Google Patents
Fehlererkennung und -korrektur in einem speicher mit verschiedenen fehlerresistenten bit-statusInfo
- Publication number
- ATE551698T1 ATE551698T1 AT09766089T AT09766089T ATE551698T1 AT E551698 T1 ATE551698 T1 AT E551698T1 AT 09766089 T AT09766089 T AT 09766089T AT 09766089 T AT09766089 T AT 09766089T AT E551698 T1 ATE551698 T1 AT E551698T1
- Authority
- AT
- Austria
- Prior art keywords
- memory
- error
- correction
- bit states
- attack
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/52—Protection of memory contents; Detection of errors in memory contents
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
- G11C11/4125—Cells incorporating circuit means for protecting against loss of information
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR0854055A FR2932904B1 (fr) | 2008-06-19 | 2008-06-19 | Procede de detection de correction d'erreurs pour une memoire dont la structure est a comportement dissymetrique |
| PCT/FR2009/051165 WO2009153527A2 (fr) | 2008-06-19 | 2009-06-18 | Procédé de détection et de correction d'erreurs pour une mémoire dont la structure est à comportement dissymétrique, memoire correspondante et son utilisation |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE551698T1 true ATE551698T1 (de) | 2012-04-15 |
Family
ID=40278909
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT09766089T ATE551698T1 (de) | 2008-06-19 | 2009-06-18 | Fehlererkennung und -korrektur in einem speicher mit verschiedenen fehlerresistenten bit-status |
Country Status (10)
| Country | Link |
|---|---|
| US (1) | US8856603B2 (de) |
| EP (1) | EP2289068B1 (de) |
| JP (1) | JP5551158B2 (de) |
| CN (1) | CN102084426B (de) |
| AT (1) | ATE551698T1 (de) |
| BR (1) | BRPI0914868A2 (de) |
| CA (1) | CA2726505C (de) |
| ES (1) | ES2386305T3 (de) |
| FR (1) | FR2932904B1 (de) |
| WO (1) | WO2009153527A2 (de) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9183086B2 (en) * | 2013-06-03 | 2015-11-10 | Sandisk Technologies Inc. | Selection of data for redundancy calculation in three dimensional nonvolatile memory |
| KR102519458B1 (ko) | 2016-11-01 | 2023-04-11 | 삼성전자주식회사 | 비휘발성 메모리 장치 및 그것의 동작 방법 |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59210591A (ja) * | 1983-05-13 | 1984-11-29 | Hitachi Micro Comput Eng Ltd | ダイナミツクメモリ |
| JPH01196794A (ja) * | 1988-01-30 | 1989-08-08 | Toshiba Corp | 不揮発性半導体記憶装置 |
| US5048023A (en) * | 1989-02-16 | 1991-09-10 | The United States Of America As Represented By The Administrator, National Aeronautics And Space Administration | Asymmetric soft-error resistant memory |
| JPH0357048A (ja) * | 1989-07-25 | 1991-03-12 | Sony Corp | 半導体メモリ |
| US5200963A (en) * | 1990-06-26 | 1993-04-06 | The United States Of America As Represented By The Administrator, National Aeronautics And Space Administration | Self-checking on-line testable static ram |
| JP3607407B2 (ja) * | 1995-04-26 | 2005-01-05 | 株式会社日立製作所 | 半導体記憶装置 |
| JP3749354B2 (ja) * | 1997-08-11 | 2006-02-22 | 富士通株式会社 | 不揮発性半導体記憶装置 |
| JP3605266B2 (ja) * | 1997-08-12 | 2004-12-22 | 新日本製鐵株式会社 | 半導体記憶装置及び読み出し方法並びに読み出し方法が記録された記録媒体 |
| JP2001043691A (ja) * | 1999-07-28 | 2001-02-16 | Hitachi Ltd | 不揮発性記憶回路およびマイクロコンピュータ |
| US6668341B1 (en) * | 1999-11-13 | 2003-12-23 | International Business Machines Corporation | Storage cell with integrated soft error detection and correction |
| US6785169B1 (en) * | 2002-04-05 | 2004-08-31 | T-Ram, Inc. | Memory cell error recovery |
| US6618281B1 (en) * | 2002-05-15 | 2003-09-09 | International Business Machines Corporation | Content addressable memory (CAM) with error checking and correction (ECC) capability |
| US6834017B2 (en) * | 2002-10-03 | 2004-12-21 | Hewlett-Packard Development Company, L.P. | Error detection system for an information storage device |
| WO2006106583A1 (ja) * | 2005-03-31 | 2006-10-12 | Fujitsu Limited | メモリセルのデータ読出し回路、メモリ回路、メモリセルのデータ読出し方法 |
| KR100681879B1 (ko) * | 2006-01-16 | 2007-02-15 | 주식회사 하이닉스반도체 | 온-다이 터미네이션 제어 장치 |
| US7495949B2 (en) * | 2006-02-10 | 2009-02-24 | International Business Machines Corporation | Asymmetrical random access memory cell, memory comprising asymmetrical memory cells and method to operate such a memory |
| US7362606B2 (en) * | 2006-03-29 | 2008-04-22 | International Business Machines Corporation | Asymmetrical memory cells and memories using the cells |
| JP2008097403A (ja) * | 2006-10-13 | 2008-04-24 | Nec Corp | 不揮発性メモリ装置 |
| FR2921193B1 (fr) * | 2007-09-14 | 2011-04-08 | E2V Semiconductors | Point memoire de memoire statique et application a un capteur d'image |
-
2008
- 2008-06-19 FR FR0854055A patent/FR2932904B1/fr not_active Expired - Fee Related
-
2009
- 2009-06-18 AT AT09766089T patent/ATE551698T1/de active
- 2009-06-18 CA CA2726505A patent/CA2726505C/fr not_active Expired - Fee Related
- 2009-06-18 WO PCT/FR2009/051165 patent/WO2009153527A2/fr active Application Filing
- 2009-06-18 ES ES09766089T patent/ES2386305T3/es active Active
- 2009-06-18 BR BRPI0914868-0A patent/BRPI0914868A2/pt not_active Application Discontinuation
- 2009-06-18 JP JP2011514102A patent/JP5551158B2/ja not_active Expired - Fee Related
- 2009-06-18 EP EP09766089A patent/EP2289068B1/de not_active Not-in-force
- 2009-06-18 US US12/999,485 patent/US8856603B2/en not_active Expired - Fee Related
- 2009-06-18 CN CN200980122673.1A patent/CN102084426B/zh not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CA2726505C (fr) | 2014-08-19 |
| JP5551158B2 (ja) | 2014-07-16 |
| BRPI0914868A2 (pt) | 2020-08-18 |
| FR2932904B1 (fr) | 2011-02-25 |
| ES2386305T3 (es) | 2012-08-16 |
| CN102084426B (zh) | 2016-07-06 |
| EP2289068A2 (de) | 2011-03-02 |
| FR2932904A1 (fr) | 2009-12-25 |
| WO2009153527A2 (fr) | 2009-12-23 |
| US8856603B2 (en) | 2014-10-07 |
| JP2011525022A (ja) | 2011-09-08 |
| CN102084426A (zh) | 2011-06-01 |
| CA2726505A1 (fr) | 2009-12-23 |
| EP2289068B1 (de) | 2012-03-28 |
| WO2009153527A3 (fr) | 2010-02-25 |
| US20110185245A1 (en) | 2011-07-28 |
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