ATE506649T1 - Korrektur von fehlern in einem speicherarray - Google Patents

Korrektur von fehlern in einem speicherarray

Info

Publication number
ATE506649T1
ATE506649T1 AT08807915T AT08807915T ATE506649T1 AT E506649 T1 ATE506649 T1 AT E506649T1 AT 08807915 T AT08807915 T AT 08807915T AT 08807915 T AT08807915 T AT 08807915T AT E506649 T1 ATE506649 T1 AT E506649T1
Authority
AT
Austria
Prior art keywords
group
memory
ecc bits
size
memory array
Prior art date
Application number
AT08807915T
Other languages
English (en)
Inventor
Eran Erez
Original Assignee
Sandisk Il Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sandisk Il Ltd filed Critical Sandisk Il Ltd
Application granted granted Critical
Publication of ATE506649T1 publication Critical patent/ATE506649T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Detection And Correction Of Errors (AREA)
AT08807915T 2007-12-06 2008-10-07 Korrektur von fehlern in einem speicherarray ATE506649T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/951,455 US8234539B2 (en) 2007-12-06 2007-12-06 Correction of errors in a memory array
PCT/IB2008/054108 WO2009072014A1 (en) 2007-12-06 2008-10-07 Correction of errors in a memory array

Publications (1)

Publication Number Publication Date
ATE506649T1 true ATE506649T1 (de) 2011-05-15

Family

ID=40365377

Family Applications (1)

Application Number Title Priority Date Filing Date
AT08807915T ATE506649T1 (de) 2007-12-06 2008-10-07 Korrektur von fehlern in einem speicherarray

Country Status (8)

Country Link
US (1) US8234539B2 (de)
EP (1) EP2218003B1 (de)
JP (1) JP5529751B2 (de)
KR (1) KR101572038B1 (de)
CN (1) CN101889267B (de)
AT (1) ATE506649T1 (de)
DE (1) DE602008006455D1 (de)
WO (1) WO2009072014A1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010045262A1 (en) * 2008-10-14 2010-04-22 Wanova Technologies, Ltd. Storage-network de-duplication
US8276039B2 (en) * 2009-02-27 2012-09-25 Globalfoundries Inc. Error detection device and methods thereof
US8484536B1 (en) * 2010-03-26 2013-07-09 Google Inc. Techniques for data storage, access, and maintenance
US8719675B1 (en) 2010-06-16 2014-05-06 Google Inc. Orthogonal coding for data storage, access, and maintenance
JP2012094132A (ja) * 2010-10-01 2012-05-17 Siglead Inc 不揮発性半導体メモリ装置とデータ誤り訂正方法
US8589761B2 (en) 2011-05-31 2013-11-19 Micron Technology, Inc. Apparatus and methods for providing data integrity
US8621317B1 (en) 2011-07-25 2013-12-31 Google Inc. Modified orthogonal coding techniques for storing data
US8615698B1 (en) 2011-09-28 2013-12-24 Google Inc. Skewed orthogonal coding techniques
JP5768654B2 (ja) * 2011-10-25 2015-08-26 ソニー株式会社 記憶制御装置、記憶装置、情報処理システム、および、記憶制御方法
US8856619B1 (en) 2012-03-09 2014-10-07 Google Inc. Storing data across groups of storage nodes
US20140169102A1 (en) * 2012-12-19 2014-06-19 Western Digital Technologies, Inc. Log-likelihood ratio and lumped log-likelihood ratio generation for data storage systems
US9213595B2 (en) * 2013-10-15 2015-12-15 International Business Machines Corporation Handling errors in ternary content addressable memories
US9520901B2 (en) * 2014-03-06 2016-12-13 Kabushiki Kaisha Toshiba Memory controller, memory system, and memory control method

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4712215A (en) * 1985-12-02 1987-12-08 Advanced Micro Devices, Inc. CRC calculation machine for separate calculation of checkbits for the header packet and data packet
US5233614A (en) * 1991-01-07 1993-08-03 International Business Machines Corporation Fault mapping apparatus for memory
KR950008789B1 (ko) * 1992-07-30 1995-08-08 삼성전자주식회사 멀티-이씨씨(ecc)회로를 내장하는 반도체 메모리 장치
US5603001A (en) * 1994-05-09 1997-02-11 Kabushiki Kaisha Toshiba Semiconductor disk system having a plurality of flash memories
US5847577A (en) * 1995-02-24 1998-12-08 Xilinx, Inc. DRAM memory cell for programmable logic devices
US5905858A (en) * 1996-11-01 1999-05-18 Micron Electronics, Inc. System for method memory error handling
JPH10207726A (ja) * 1997-01-23 1998-08-07 Oki Electric Ind Co Ltd 半導体ディスク装置
JP3184129B2 (ja) * 1997-09-29 2001-07-09 甲府日本電気株式会社 記憶装置
US7099997B2 (en) * 2003-02-27 2006-08-29 International Business Machines Corporation Read-modify-write avoidance using a boundary word storage mechanism
US7173852B2 (en) * 2003-10-03 2007-02-06 Sandisk Corporation Corrected data storage and handling methods
US7350044B2 (en) * 2004-01-30 2008-03-25 Micron Technology, Inc. Data move method and apparatus
US7308638B2 (en) 2004-06-29 2007-12-11 Hewlett-Packard Development Company, L.P. System and method for controlling application of an error correction code (ECC) algorithm in a memory subsystem
US8055979B2 (en) * 2006-01-20 2011-11-08 Marvell World Trade Ltd. Flash memory with coding and signal processing
US7810017B2 (en) * 2006-03-20 2010-10-05 Micron Technology, Inc. Variable sector-count ECC
EP2003653B1 (de) * 2006-04-06 2010-08-04 Advantest Corporation Testvorrichtung und testverfahren
US7840875B2 (en) * 2006-05-15 2010-11-23 Sandisk Corporation Convolutional coding methods for nonvolatile memory
CN100458718C (zh) * 2006-12-29 2009-02-04 福昭科技（深圳）有限公司 一种闪存存储装置及其数据读取和写入方法

Also Published As

Publication number Publication date
JP2011507066A (ja) 2011-03-03
EP2218003B1 (de) 2011-04-20
CN101889267A (zh) 2010-11-17
DE602008006455D1 (de) 2011-06-01
US20090150747A1 (en) 2009-06-11
EP2218003A1 (de) 2010-08-18
WO2009072014A1 (en) 2009-06-11
KR101572038B1 (ko) 2015-11-26
JP5529751B2 (ja) 2014-06-25
CN101889267B (zh) 2013-07-31
US8234539B2 (en) 2012-07-31
KR20100111680A (ko) 2010-10-15

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